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Linux kernel mirror (for testing)
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1/*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef __NOUVEAU_DRM_H__
26#define __NOUVEAU_DRM_H__
27
28#define DRM_NOUVEAU_EVENT_NVIF 0x80000000
29
30#include "drm.h"
31
32#if defined(__cplusplus)
33extern "C" {
34#endif
35
36#define NOUVEAU_GETPARAM_PCI_VENDOR 3
37#define NOUVEAU_GETPARAM_PCI_DEVICE 4
38#define NOUVEAU_GETPARAM_BUS_TYPE 5
39#define NOUVEAU_GETPARAM_FB_SIZE 8
40#define NOUVEAU_GETPARAM_AGP_SIZE 9
41#define NOUVEAU_GETPARAM_CHIPSET_ID 11
42#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
43#define NOUVEAU_GETPARAM_GRAPH_UNITS 13
44#define NOUVEAU_GETPARAM_PTIMER_TIME 14
45#define NOUVEAU_GETPARAM_HAS_BO_USAGE 15
46#define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16
47struct drm_nouveau_getparam {
48 __u64 param;
49 __u64 value;
50};
51
52struct drm_nouveau_channel_alloc {
53 __u32 fb_ctxdma_handle;
54 __u32 tt_ctxdma_handle;
55
56 __s32 channel;
57 __u32 pushbuf_domains;
58
59 /* Notifier memory */
60 __u32 notifier_handle;
61
62 /* DRM-enforced subchannel assignments */
63 struct {
64 __u32 handle;
65 __u32 grclass;
66 } subchan[8];
67 __u32 nr_subchan;
68};
69
70struct drm_nouveau_channel_free {
71 __s32 channel;
72};
73
74#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
75#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
76#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
77#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
78#define NOUVEAU_GEM_DOMAIN_COHERENT (1 << 4)
79/* The BO will never be shared via import or export. */
80#define NOUVEAU_GEM_DOMAIN_NO_SHARE (1 << 5)
81
82#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */
83#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
84#define NOUVEAU_GEM_TILE_16BPP 0x00000001
85#define NOUVEAU_GEM_TILE_32BPP 0x00000002
86#define NOUVEAU_GEM_TILE_ZETA 0x00000004
87#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008
88
89struct drm_nouveau_gem_info {
90 __u32 handle;
91 __u32 domain;
92 __u64 size;
93 __u64 offset;
94 __u64 map_handle;
95 __u32 tile_mode;
96 __u32 tile_flags;
97};
98
99struct drm_nouveau_gem_new {
100 struct drm_nouveau_gem_info info;
101 __u32 channel_hint;
102 __u32 align;
103};
104
105#define NOUVEAU_GEM_MAX_BUFFERS 1024
106struct drm_nouveau_gem_pushbuf_bo_presumed {
107 __u32 valid;
108 __u32 domain;
109 __u64 offset;
110};
111
112struct drm_nouveau_gem_pushbuf_bo {
113 __u64 user_priv;
114 __u32 handle;
115 __u32 read_domains;
116 __u32 write_domains;
117 __u32 valid_domains;
118 struct drm_nouveau_gem_pushbuf_bo_presumed presumed;
119};
120
121#define NOUVEAU_GEM_RELOC_LOW (1 << 0)
122#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
123#define NOUVEAU_GEM_RELOC_OR (1 << 2)
124#define NOUVEAU_GEM_MAX_RELOCS 1024
125struct drm_nouveau_gem_pushbuf_reloc {
126 __u32 reloc_bo_index;
127 __u32 reloc_bo_offset;
128 __u32 bo_index;
129 __u32 flags;
130 __u32 data;
131 __u32 vor;
132 __u32 tor;
133};
134
135#define NOUVEAU_GEM_MAX_PUSH 512
136struct drm_nouveau_gem_pushbuf_push {
137 __u32 bo_index;
138 __u32 pad;
139 __u64 offset;
140 __u64 length;
141#define NOUVEAU_GEM_PUSHBUF_NO_PREFETCH (1 << 23)
142};
143
144struct drm_nouveau_gem_pushbuf {
145 __u32 channel;
146 __u32 nr_buffers;
147 __u64 buffers;
148 __u32 nr_relocs;
149 __u32 nr_push;
150 __u64 relocs;
151 __u64 push;
152 __u32 suffix0;
153 __u32 suffix1;
154#define NOUVEAU_GEM_PUSHBUF_SYNC (1ULL << 0)
155 __u64 vram_available;
156 __u64 gart_available;
157};
158
159#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001
160#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004
161struct drm_nouveau_gem_cpu_prep {
162 __u32 handle;
163 __u32 flags;
164};
165
166struct drm_nouveau_gem_cpu_fini {
167 __u32 handle;
168};
169
170/**
171 * struct drm_nouveau_sync - sync object
172 *
173 * This structure serves as synchronization mechanism for (potentially)
174 * asynchronous operations such as EXEC or VM_BIND.
175 */
176struct drm_nouveau_sync {
177 /**
178 * @flags: the flags for a sync object
179 *
180 * The first 8 bits are used to determine the type of the sync object.
181 */
182 __u32 flags;
183#define DRM_NOUVEAU_SYNC_SYNCOBJ 0x0
184#define DRM_NOUVEAU_SYNC_TIMELINE_SYNCOBJ 0x1
185#define DRM_NOUVEAU_SYNC_TYPE_MASK 0xf
186 /**
187 * @handle: the handle of the sync object
188 */
189 __u32 handle;
190 /**
191 * @timeline_value:
192 *
193 * The timeline point of the sync object in case the syncobj is of
194 * type DRM_NOUVEAU_SYNC_TIMELINE_SYNCOBJ.
195 */
196 __u64 timeline_value;
197};
198
199/**
200 * struct drm_nouveau_vm_init - GPU VA space init structure
201 *
202 * Used to initialize the GPU's VA space for a user client, telling the kernel
203 * which portion of the VA space is managed by the UMD and kernel respectively.
204 *
205 * For the UMD to use the VM_BIND uAPI, this must be called before any BOs or
206 * channels are created; if called afterwards DRM_IOCTL_NOUVEAU_VM_INIT fails
207 * with -ENOSYS.
208 */
209struct drm_nouveau_vm_init {
210 /**
211 * @kernel_managed_addr: start address of the kernel managed VA space
212 * region
213 */
214 __u64 kernel_managed_addr;
215 /**
216 * @kernel_managed_size: size of the kernel managed VA space region in
217 * bytes
218 */
219 __u64 kernel_managed_size;
220};
221
222/**
223 * struct drm_nouveau_vm_bind_op - VM_BIND operation
224 *
225 * This structure represents a single VM_BIND operation. UMDs should pass
226 * an array of this structure via struct drm_nouveau_vm_bind's &op_ptr field.
227 */
228struct drm_nouveau_vm_bind_op {
229 /**
230 * @op: the operation type
231 */
232 __u32 op;
233/**
234 * @DRM_NOUVEAU_VM_BIND_OP_MAP:
235 *
236 * Map a GEM object to the GPU's VA space. Optionally, the
237 * &DRM_NOUVEAU_VM_BIND_SPARSE flag can be passed to instruct the kernel to
238 * create sparse mappings for the given range.
239 */
240#define DRM_NOUVEAU_VM_BIND_OP_MAP 0x0
241/**
242 * @DRM_NOUVEAU_VM_BIND_OP_UNMAP:
243 *
244 * Unmap an existing mapping in the GPU's VA space. If the region the mapping
245 * is located in is a sparse region, new sparse mappings are created where the
246 * unmapped (memory backed) mapping was mapped previously. To remove a sparse
247 * region the &DRM_NOUVEAU_VM_BIND_SPARSE must be set.
248 */
249#define DRM_NOUVEAU_VM_BIND_OP_UNMAP 0x1
250 /**
251 * @flags: the flags for a &drm_nouveau_vm_bind_op
252 */
253 __u32 flags;
254/**
255 * @DRM_NOUVEAU_VM_BIND_SPARSE:
256 *
257 * Indicates that an allocated VA space region should be sparse.
258 */
259#define DRM_NOUVEAU_VM_BIND_SPARSE (1 << 8)
260 /**
261 * @handle: the handle of the DRM GEM object to map
262 */
263 __u32 handle;
264 /**
265 * @pad: 32 bit padding, should be 0
266 */
267 __u32 pad;
268 /**
269 * @addr:
270 *
271 * the address the VA space region or (memory backed) mapping should be mapped to
272 */
273 __u64 addr;
274 /**
275 * @bo_offset: the offset within the BO backing the mapping
276 */
277 __u64 bo_offset;
278 /**
279 * @range: the size of the requested mapping in bytes
280 */
281 __u64 range;
282};
283
284/**
285 * struct drm_nouveau_vm_bind - structure for DRM_IOCTL_NOUVEAU_VM_BIND
286 */
287struct drm_nouveau_vm_bind {
288 /**
289 * @op_count: the number of &drm_nouveau_vm_bind_op
290 */
291 __u32 op_count;
292 /**
293 * @flags: the flags for a &drm_nouveau_vm_bind ioctl
294 */
295 __u32 flags;
296/**
297 * @DRM_NOUVEAU_VM_BIND_RUN_ASYNC:
298 *
299 * Indicates that the given VM_BIND operation should be executed asynchronously
300 * by the kernel.
301 *
302 * If this flag is not supplied the kernel executes the associated operations
303 * synchronously and doesn't accept any &drm_nouveau_sync objects.
304 */
305#define DRM_NOUVEAU_VM_BIND_RUN_ASYNC 0x1
306 /**
307 * @wait_count: the number of wait &drm_nouveau_syncs
308 */
309 __u32 wait_count;
310 /**
311 * @sig_count: the number of &drm_nouveau_syncs to signal when finished
312 */
313 __u32 sig_count;
314 /**
315 * @wait_ptr: pointer to &drm_nouveau_syncs to wait for
316 */
317 __u64 wait_ptr;
318 /**
319 * @sig_ptr: pointer to &drm_nouveau_syncs to signal when finished
320 */
321 __u64 sig_ptr;
322 /**
323 * @op_ptr: pointer to the &drm_nouveau_vm_bind_ops to execute
324 */
325 __u64 op_ptr;
326};
327
328/**
329 * struct drm_nouveau_exec_push - EXEC push operation
330 *
331 * This structure represents a single EXEC push operation. UMDs should pass an
332 * array of this structure via struct drm_nouveau_exec's &push_ptr field.
333 */
334struct drm_nouveau_exec_push {
335 /**
336 * @va: the virtual address of the push buffer mapping
337 */
338 __u64 va;
339 /**
340 * @va_len: the length of the push buffer mapping
341 */
342 __u32 va_len;
343 /**
344 * @flags: the flags for this push buffer mapping
345 */
346 __u32 flags;
347#define DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH 0x1
348};
349
350/**
351 * struct drm_nouveau_exec - structure for DRM_IOCTL_NOUVEAU_EXEC
352 */
353struct drm_nouveau_exec {
354 /**
355 * @channel: the channel to execute the push buffer in
356 */
357 __u32 channel;
358 /**
359 * @push_count: the number of &drm_nouveau_exec_push ops
360 */
361 __u32 push_count;
362 /**
363 * @wait_count: the number of wait &drm_nouveau_syncs
364 */
365 __u32 wait_count;
366 /**
367 * @sig_count: the number of &drm_nouveau_syncs to signal when finished
368 */
369 __u32 sig_count;
370 /**
371 * @wait_ptr: pointer to &drm_nouveau_syncs to wait for
372 */
373 __u64 wait_ptr;
374 /**
375 * @sig_ptr: pointer to &drm_nouveau_syncs to signal when finished
376 */
377 __u64 sig_ptr;
378 /**
379 * @push_ptr: pointer to &drm_nouveau_exec_push ops
380 */
381 __u64 push_ptr;
382};
383
384#define DRM_NOUVEAU_GETPARAM 0x00
385#define DRM_NOUVEAU_SETPARAM 0x01 /* deprecated */
386#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02
387#define DRM_NOUVEAU_CHANNEL_FREE 0x03
388#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 /* deprecated */
389#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 /* deprecated */
390#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 /* deprecated */
391#define DRM_NOUVEAU_NVIF 0x07
392#define DRM_NOUVEAU_SVM_INIT 0x08
393#define DRM_NOUVEAU_SVM_BIND 0x09
394#define DRM_NOUVEAU_VM_INIT 0x10
395#define DRM_NOUVEAU_VM_BIND 0x11
396#define DRM_NOUVEAU_EXEC 0x12
397#define DRM_NOUVEAU_GEM_NEW 0x40
398#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
399#define DRM_NOUVEAU_GEM_CPU_PREP 0x42
400#define DRM_NOUVEAU_GEM_CPU_FINI 0x43
401#define DRM_NOUVEAU_GEM_INFO 0x44
402
403struct drm_nouveau_svm_init {
404 __u64 unmanaged_addr;
405 __u64 unmanaged_size;
406};
407
408struct drm_nouveau_svm_bind {
409 __u64 header;
410 __u64 va_start;
411 __u64 va_end;
412 __u64 npages;
413 __u64 stride;
414 __u64 result;
415 __u64 reserved0;
416 __u64 reserved1;
417};
418
419#define NOUVEAU_SVM_BIND_COMMAND_SHIFT 0
420#define NOUVEAU_SVM_BIND_COMMAND_BITS 8
421#define NOUVEAU_SVM_BIND_COMMAND_MASK ((1 << 8) - 1)
422#define NOUVEAU_SVM_BIND_PRIORITY_SHIFT 8
423#define NOUVEAU_SVM_BIND_PRIORITY_BITS 8
424#define NOUVEAU_SVM_BIND_PRIORITY_MASK ((1 << 8) - 1)
425#define NOUVEAU_SVM_BIND_TARGET_SHIFT 16
426#define NOUVEAU_SVM_BIND_TARGET_BITS 32
427#define NOUVEAU_SVM_BIND_TARGET_MASK 0xffffffff
428
429/*
430 * Below is use to validate ioctl argument, userspace can also use it to make
431 * sure that no bit are set beyond known fields for a given kernel version.
432 */
433#define NOUVEAU_SVM_BIND_VALID_BITS 48
434#define NOUVEAU_SVM_BIND_VALID_MASK ((1ULL << NOUVEAU_SVM_BIND_VALID_BITS) - 1)
435
436
437/*
438 * NOUVEAU_BIND_COMMAND__MIGRATE: synchronous migrate to target memory.
439 * result: number of page successfuly migrate to the target memory.
440 */
441#define NOUVEAU_SVM_BIND_COMMAND__MIGRATE 0
442
443/*
444 * NOUVEAU_SVM_BIND_HEADER_TARGET__GPU_VRAM: target the GPU VRAM memory.
445 */
446#define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM (1UL << 31)
447
448
449#define DRM_IOCTL_NOUVEAU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GETPARAM, struct drm_nouveau_getparam)
450#define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_ALLOC, struct drm_nouveau_channel_alloc)
451#define DRM_IOCTL_NOUVEAU_CHANNEL_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_FREE, struct drm_nouveau_channel_free)
452
453#define DRM_IOCTL_NOUVEAU_SVM_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_INIT, struct drm_nouveau_svm_init)
454#define DRM_IOCTL_NOUVEAU_SVM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_BIND, struct drm_nouveau_svm_bind)
455
456#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
457#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf)
458#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep)
459#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini)
460#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info)
461
462#define DRM_IOCTL_NOUVEAU_VM_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_VM_INIT, struct drm_nouveau_vm_init)
463#define DRM_IOCTL_NOUVEAU_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_VM_BIND, struct drm_nouveau_vm_bind)
464#define DRM_IOCTL_NOUVEAU_EXEC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_EXEC, struct drm_nouveau_exec)
465#if defined(__cplusplus)
466}
467#endif
468
469#endif /* __NOUVEAU_DRM_H__ */