Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/leds.h>
18#include <linux/linkmode.h>
19#include <linux/netlink.h>
20#include <linux/mdio.h>
21#include <linux/mii.h>
22#include <linux/mii_timestamper.h>
23#include <linux/module.h>
24#include <linux/timer.h>
25#include <linux/workqueue.h>
26#include <linux/mod_devicetable.h>
27#include <linux/u64_stats_sync.h>
28#include <linux/irqreturn.h>
29#include <linux/iopoll.h>
30#include <linux/refcount.h>
31
32#include <linux/atomic.h>
33
34#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
35 SUPPORTED_TP | \
36 SUPPORTED_MII)
37
38#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
39 SUPPORTED_10baseT_Full)
40
41#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
42 SUPPORTED_100baseT_Full)
43
44#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
45 SUPPORTED_1000baseT_Full)
46
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
54extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
55extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
56extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
57
58#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
59#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
60#define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
61#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
62#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
63#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
64#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
65#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
66#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
67#define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
68
69extern const int phy_basic_ports_array[3];
70extern const int phy_fibre_port_array[1];
71extern const int phy_all_ports_features_array[7];
72extern const int phy_10_100_features_array[4];
73extern const int phy_basic_t1_features_array[3];
74extern const int phy_basic_t1s_p2mp_features_array[2];
75extern const int phy_gbit_features_array[2];
76extern const int phy_10gbit_features_array[1];
77
78/*
79 * Set phydev->irq to PHY_POLL if interrupts are not supported,
80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
81 * the attached MAC driver handles the interrupt
82 */
83#define PHY_POLL -1
84#define PHY_MAC_INTERRUPT -2
85
86#define PHY_IS_INTERNAL 0x00000001
87#define PHY_RST_AFTER_CLK_EN 0x00000002
88#define PHY_POLL_CABLE_TEST 0x00000004
89#define PHY_ALWAYS_CALL_SUSPEND 0x00000008
90#define MDIO_DEVICE_IS_PHY 0x80000000
91
92/**
93 * enum phy_interface_t - Interface Mode definitions
94 *
95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
97 * @PHY_INTERFACE_MODE_MII: Media-independent interface
98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
109 * @PHY_INTERFACE_MODE_SMII: Serial MII
110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
113 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
114 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
115 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
116 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
117 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
118 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
119 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
120 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
121 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
122 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
123 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
124 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
125 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
126 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
127 * @PHY_INTERFACE_MODE_MAX: Book keeping
128 *
129 * Describes the interface between the MAC and PHY.
130 */
131typedef enum {
132 PHY_INTERFACE_MODE_NA,
133 PHY_INTERFACE_MODE_INTERNAL,
134 PHY_INTERFACE_MODE_MII,
135 PHY_INTERFACE_MODE_GMII,
136 PHY_INTERFACE_MODE_SGMII,
137 PHY_INTERFACE_MODE_TBI,
138 PHY_INTERFACE_MODE_REVMII,
139 PHY_INTERFACE_MODE_RMII,
140 PHY_INTERFACE_MODE_REVRMII,
141 PHY_INTERFACE_MODE_RGMII,
142 PHY_INTERFACE_MODE_RGMII_ID,
143 PHY_INTERFACE_MODE_RGMII_RXID,
144 PHY_INTERFACE_MODE_RGMII_TXID,
145 PHY_INTERFACE_MODE_RTBI,
146 PHY_INTERFACE_MODE_SMII,
147 PHY_INTERFACE_MODE_XGMII,
148 PHY_INTERFACE_MODE_XLGMII,
149 PHY_INTERFACE_MODE_MOCA,
150 PHY_INTERFACE_MODE_QSGMII,
151 PHY_INTERFACE_MODE_TRGMII,
152 PHY_INTERFACE_MODE_100BASEX,
153 PHY_INTERFACE_MODE_1000BASEX,
154 PHY_INTERFACE_MODE_2500BASEX,
155 PHY_INTERFACE_MODE_5GBASER,
156 PHY_INTERFACE_MODE_RXAUI,
157 PHY_INTERFACE_MODE_XAUI,
158 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
159 PHY_INTERFACE_MODE_10GBASER,
160 PHY_INTERFACE_MODE_25GBASER,
161 PHY_INTERFACE_MODE_USXGMII,
162 /* 10GBASE-KR - with Clause 73 AN */
163 PHY_INTERFACE_MODE_10GKR,
164 PHY_INTERFACE_MODE_QUSGMII,
165 PHY_INTERFACE_MODE_1000BASEKX,
166 PHY_INTERFACE_MODE_MAX,
167} phy_interface_t;
168
169/* PHY interface mode bitmap handling */
170#define DECLARE_PHY_INTERFACE_MASK(name) \
171 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
172
173static inline void phy_interface_zero(unsigned long *intf)
174{
175 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
176}
177
178static inline bool phy_interface_empty(const unsigned long *intf)
179{
180 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
181}
182
183static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
184 const unsigned long *b)
185{
186 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
187}
188
189static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
190 const unsigned long *b)
191{
192 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
193}
194
195static inline void phy_interface_set_rgmii(unsigned long *intf)
196{
197 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
198 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
199 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
200 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
201}
202
203/*
204 * phy_supported_speeds - return all speeds currently supported by a PHY device
205 */
206unsigned int phy_supported_speeds(struct phy_device *phy,
207 unsigned int *speeds,
208 unsigned int size);
209
210/**
211 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
212 * @interface: enum phy_interface_t value
213 *
214 * Description: maps enum &phy_interface_t defined in this file
215 * into the device tree binding of 'phy-mode', so that Ethernet
216 * device driver can get PHY interface from device tree.
217 */
218static inline const char *phy_modes(phy_interface_t interface)
219{
220 switch (interface) {
221 case PHY_INTERFACE_MODE_NA:
222 return "";
223 case PHY_INTERFACE_MODE_INTERNAL:
224 return "internal";
225 case PHY_INTERFACE_MODE_MII:
226 return "mii";
227 case PHY_INTERFACE_MODE_GMII:
228 return "gmii";
229 case PHY_INTERFACE_MODE_SGMII:
230 return "sgmii";
231 case PHY_INTERFACE_MODE_TBI:
232 return "tbi";
233 case PHY_INTERFACE_MODE_REVMII:
234 return "rev-mii";
235 case PHY_INTERFACE_MODE_RMII:
236 return "rmii";
237 case PHY_INTERFACE_MODE_REVRMII:
238 return "rev-rmii";
239 case PHY_INTERFACE_MODE_RGMII:
240 return "rgmii";
241 case PHY_INTERFACE_MODE_RGMII_ID:
242 return "rgmii-id";
243 case PHY_INTERFACE_MODE_RGMII_RXID:
244 return "rgmii-rxid";
245 case PHY_INTERFACE_MODE_RGMII_TXID:
246 return "rgmii-txid";
247 case PHY_INTERFACE_MODE_RTBI:
248 return "rtbi";
249 case PHY_INTERFACE_MODE_SMII:
250 return "smii";
251 case PHY_INTERFACE_MODE_XGMII:
252 return "xgmii";
253 case PHY_INTERFACE_MODE_XLGMII:
254 return "xlgmii";
255 case PHY_INTERFACE_MODE_MOCA:
256 return "moca";
257 case PHY_INTERFACE_MODE_QSGMII:
258 return "qsgmii";
259 case PHY_INTERFACE_MODE_TRGMII:
260 return "trgmii";
261 case PHY_INTERFACE_MODE_1000BASEX:
262 return "1000base-x";
263 case PHY_INTERFACE_MODE_1000BASEKX:
264 return "1000base-kx";
265 case PHY_INTERFACE_MODE_2500BASEX:
266 return "2500base-x";
267 case PHY_INTERFACE_MODE_5GBASER:
268 return "5gbase-r";
269 case PHY_INTERFACE_MODE_RXAUI:
270 return "rxaui";
271 case PHY_INTERFACE_MODE_XAUI:
272 return "xaui";
273 case PHY_INTERFACE_MODE_10GBASER:
274 return "10gbase-r";
275 case PHY_INTERFACE_MODE_25GBASER:
276 return "25gbase-r";
277 case PHY_INTERFACE_MODE_USXGMII:
278 return "usxgmii";
279 case PHY_INTERFACE_MODE_10GKR:
280 return "10gbase-kr";
281 case PHY_INTERFACE_MODE_100BASEX:
282 return "100base-x";
283 case PHY_INTERFACE_MODE_QUSGMII:
284 return "qusgmii";
285 default:
286 return "unknown";
287 }
288}
289
290#define PHY_INIT_TIMEOUT 100000
291#define PHY_FORCE_TIMEOUT 10
292
293#define PHY_MAX_ADDR 32
294
295/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
296#define PHY_ID_FMT "%s:%02x"
297
298#define MII_BUS_ID_SIZE 61
299
300struct device;
301struct phylink;
302struct sfp_bus;
303struct sfp_upstream_ops;
304struct sk_buff;
305
306/**
307 * struct mdio_bus_stats - Statistics counters for MDIO busses
308 * @transfers: Total number of transfers, i.e. @writes + @reads
309 * @errors: Number of MDIO transfers that returned an error
310 * @writes: Number of write transfers
311 * @reads: Number of read transfers
312 * @syncp: Synchronisation for incrementing statistics
313 */
314struct mdio_bus_stats {
315 u64_stats_t transfers;
316 u64_stats_t errors;
317 u64_stats_t writes;
318 u64_stats_t reads;
319 /* Must be last, add new statistics above */
320 struct u64_stats_sync syncp;
321};
322
323/**
324 * struct phy_package_shared - Shared information in PHY packages
325 * @addr: Common PHY address used to combine PHYs in one package
326 * @refcnt: Number of PHYs connected to this shared data
327 * @flags: Initialization of PHY package
328 * @priv_size: Size of the shared private data @priv
329 * @priv: Driver private data shared across a PHY package
330 *
331 * Represents a shared structure between different phydev's in the same
332 * package, for example a quad PHY. See phy_package_join() and
333 * phy_package_leave().
334 */
335struct phy_package_shared {
336 int addr;
337 refcount_t refcnt;
338 unsigned long flags;
339 size_t priv_size;
340
341 /* private data pointer */
342 /* note that this pointer is shared between different phydevs and
343 * the user has to take care of appropriate locking. It is allocated
344 * and freed automatically by phy_package_join() and
345 * phy_package_leave().
346 */
347 void *priv;
348};
349
350/* used as bit number in atomic bitops */
351#define PHY_SHARED_F_INIT_DONE 0
352#define PHY_SHARED_F_PROBE_DONE 1
353
354/**
355 * struct mii_bus - Represents an MDIO bus
356 *
357 * @owner: Who owns this device
358 * @name: User friendly name for this MDIO device, or driver name
359 * @id: Unique identifier for this bus, typical from bus hierarchy
360 * @priv: Driver private data
361 *
362 * The Bus class for PHYs. Devices which provide access to
363 * PHYs should register using this structure
364 */
365struct mii_bus {
366 struct module *owner;
367 const char *name;
368 char id[MII_BUS_ID_SIZE];
369 void *priv;
370 /** @read: Perform a read transfer on the bus */
371 int (*read)(struct mii_bus *bus, int addr, int regnum);
372 /** @write: Perform a write transfer on the bus */
373 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
374 /** @read_c45: Perform a C45 read transfer on the bus */
375 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
376 /** @write_c45: Perform a C45 write transfer on the bus */
377 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
378 int regnum, u16 val);
379 /** @reset: Perform a reset of the bus */
380 int (*reset)(struct mii_bus *bus);
381
382 /** @stats: Statistic counters per device on the bus */
383 struct mdio_bus_stats stats[PHY_MAX_ADDR];
384
385 /**
386 * @mdio_lock: A lock to ensure that only one thing can read/write
387 * the MDIO bus at a time
388 */
389 struct mutex mdio_lock;
390
391 /** @parent: Parent device of this bus */
392 struct device *parent;
393 /** @state: State of bus structure */
394 enum {
395 MDIOBUS_ALLOCATED = 1,
396 MDIOBUS_REGISTERED,
397 MDIOBUS_UNREGISTERED,
398 MDIOBUS_RELEASED,
399 } state;
400
401 /** @dev: Kernel device representation */
402 struct device dev;
403
404 /** @mdio_map: list of all MDIO devices on bus */
405 struct mdio_device *mdio_map[PHY_MAX_ADDR];
406
407 /** @phy_mask: PHY addresses to be ignored when probing */
408 u32 phy_mask;
409
410 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
411 u32 phy_ignore_ta_mask;
412
413 /**
414 * @irq: An array of interrupts, each PHY's interrupt at the index
415 * matching its address
416 */
417 int irq[PHY_MAX_ADDR];
418
419 /** @reset_delay_us: GPIO reset pulse width in microseconds */
420 int reset_delay_us;
421 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
422 int reset_post_delay_us;
423 /** @reset_gpiod: Reset GPIO descriptor pointer */
424 struct gpio_desc *reset_gpiod;
425
426 /** @shared_lock: protect access to the shared element */
427 struct mutex shared_lock;
428
429 /** @shared: shared state across different PHYs */
430 struct phy_package_shared *shared[PHY_MAX_ADDR];
431};
432#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
433
434struct mii_bus *mdiobus_alloc_size(size_t size);
435
436/**
437 * mdiobus_alloc - Allocate an MDIO bus structure
438 *
439 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
440 * for the driver to register the bus.
441 */
442static inline struct mii_bus *mdiobus_alloc(void)
443{
444 return mdiobus_alloc_size(0);
445}
446
447int __mdiobus_register(struct mii_bus *bus, struct module *owner);
448int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
449 struct module *owner);
450#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
451#define devm_mdiobus_register(dev, bus) \
452 __devm_mdiobus_register(dev, bus, THIS_MODULE)
453
454void mdiobus_unregister(struct mii_bus *bus);
455void mdiobus_free(struct mii_bus *bus);
456struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
457static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
458{
459 return devm_mdiobus_alloc_size(dev, 0);
460}
461
462struct mii_bus *mdio_find_bus(const char *mdio_name);
463struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
464
465#define PHY_INTERRUPT_DISABLED false
466#define PHY_INTERRUPT_ENABLED true
467
468/**
469 * enum phy_state - PHY state machine states:
470 *
471 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
472 * should be called if and only if the PHY is in this state,
473 * given that the PHY device exists.
474 * - PHY driver probe function will set the state to @PHY_READY
475 *
476 * @PHY_READY: PHY is ready to send and receive packets, but the
477 * controller is not. By default, PHYs which do not implement
478 * probe will be set to this state by phy_probe().
479 * - start will set the state to UP
480 *
481 * @PHY_UP: The PHY and attached device are ready to do work.
482 * Interrupts should be started here.
483 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
484 *
485 * @PHY_NOLINK: PHY is up, but not currently plugged in.
486 * - irq or timer will set @PHY_RUNNING if link comes back
487 * - phy_stop moves to @PHY_HALTED
488 *
489 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
490 * and/or receiving packets
491 * - irq or timer will set @PHY_NOLINK if link goes down
492 * - phy_stop moves to @PHY_HALTED
493 *
494 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
495 * is not expected to work, carrier will be indicated as down. PHY will be
496 * poll once per second, or on interrupt for it current state.
497 * Once complete, move to UP to restart the PHY.
498 * - phy_stop aborts the running test and moves to @PHY_HALTED
499 *
500 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
501 * - phy_start moves to @PHY_UP
502 *
503 * @PHY_ERROR: PHY is up, but is in an error state.
504 * - phy_stop moves to @PHY_HALTED
505 */
506enum phy_state {
507 PHY_DOWN = 0,
508 PHY_READY,
509 PHY_HALTED,
510 PHY_ERROR,
511 PHY_UP,
512 PHY_RUNNING,
513 PHY_NOLINK,
514 PHY_CABLETEST,
515};
516
517#define MDIO_MMD_NUM 32
518
519/**
520 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
521 * @devices_in_package: IEEE 802.3 devices in package register value.
522 * @mmds_present: bit vector of MMDs present.
523 * @device_ids: The device identifer for each present device.
524 */
525struct phy_c45_device_ids {
526 u32 devices_in_package;
527 u32 mmds_present;
528 u32 device_ids[MDIO_MMD_NUM];
529};
530
531struct macsec_context;
532struct macsec_ops;
533
534/**
535 * struct phy_device - An instance of a PHY
536 *
537 * @mdio: MDIO bus this PHY is on
538 * @drv: Pointer to the driver for this PHY instance
539 * @devlink: Create a link between phy dev and mac dev, if the external phy
540 * used by current mac interface is managed by another mac interface.
541 * @phy_id: UID for this device found during discovery
542 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
543 * @is_c45: Set to true if this PHY uses clause 45 addressing.
544 * @is_internal: Set to true if this PHY is internal to a MAC.
545 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
546 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
547 * @has_fixups: Set to true if this PHY has fixups/quirks.
548 * @suspended: Set to true if this PHY has been suspended successfully.
549 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
550 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
551 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
552 * @downshifted_rate: Set true if link speed has been downshifted.
553 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
554 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
555 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
556 * enabled.
557 * @state: State of the PHY for management purposes
558 * @dev_flags: Device-specific flags used by the PHY driver.
559 *
560 * - Bits [15:0] are free to use by the PHY driver to communicate
561 * driver specific behavior.
562 * - Bits [23:16] are currently reserved for future use.
563 * - Bits [31:24] are reserved for defining generic
564 * PHY driver behavior.
565 * @irq: IRQ number of the PHY's interrupt (-1 if none)
566 * @phy_timer: The timer for handling the state machine
567 * @phylink: Pointer to phylink instance for this PHY
568 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
569 * @sfp_bus: SFP bus attached to this PHY's fiber port
570 * @attached_dev: The attached enet driver's device instance ptr
571 * @adjust_link: Callback for the enet controller to respond to changes: in the
572 * link state.
573 * @phy_link_change: Callback for phylink for notification of link change
574 * @macsec_ops: MACsec offloading ops.
575 *
576 * @speed: Current link speed
577 * @duplex: Current duplex
578 * @port: Current port
579 * @pause: Current pause
580 * @asym_pause: Current asymmetric pause
581 * @supported: Combined MAC/PHY supported linkmodes
582 * @advertising: Currently advertised linkmodes
583 * @adv_old: Saved advertised while power saving for WoL
584 * @supported_eee: supported PHY EEE linkmodes
585 * @advertising_eee: Currently advertised EEE linkmodes
586 * @eee_enabled: Flag indicating whether the EEE feature is enabled
587 * @lp_advertising: Current link partner advertised linkmodes
588 * @host_interfaces: PHY interface modes supported by host
589 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
590 * @autoneg: Flag autoneg being used
591 * @rate_matching: Current rate matching mode
592 * @link: Current link state
593 * @autoneg_complete: Flag auto negotiation of the link has completed
594 * @mdix: Current crossover
595 * @mdix_ctrl: User setting of crossover
596 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
597 * @interrupts: Flag interrupts have been enabled
598 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
599 * handling shall be postponed until PHY has resumed
600 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
601 * requiring a rerun of the interrupt handler after resume
602 * @interface: enum phy_interface_t value
603 * @skb: Netlink message for cable diagnostics
604 * @nest: Netlink nest used for cable diagnostics
605 * @ehdr: nNtlink header for cable diagnostics
606 * @phy_led_triggers: Array of LED triggers
607 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
608 * @led_link_trigger: LED trigger for link up/down
609 * @last_triggered: last LED trigger for link speed
610 * @leds: list of PHY LED structures
611 * @master_slave_set: User requested master/slave configuration
612 * @master_slave_get: Current master/slave advertisement
613 * @master_slave_state: Current master/slave configuration
614 * @mii_ts: Pointer to time stamper callbacks
615 * @psec: Pointer to Power Sourcing Equipment control struct
616 * @lock: Mutex for serialization access to PHY
617 * @state_queue: Work queue for state machine
618 * @link_down_events: Number of times link was lost
619 * @shared: Pointer to private data shared by phys in one package
620 * @priv: Pointer to driver private data
621 *
622 * interrupts currently only supports enabled or disabled,
623 * but could be changed in the future to support enabling
624 * and disabling specific interrupts
625 *
626 * Contains some infrastructure for polling and interrupt
627 * handling, as well as handling shifts in PHY hardware state
628 */
629struct phy_device {
630 struct mdio_device mdio;
631
632 /* Information about the PHY type */
633 /* And management functions */
634 struct phy_driver *drv;
635
636 struct device_link *devlink;
637
638 u32 phy_id;
639
640 struct phy_c45_device_ids c45_ids;
641 unsigned is_c45:1;
642 unsigned is_internal:1;
643 unsigned is_pseudo_fixed_link:1;
644 unsigned is_gigabit_capable:1;
645 unsigned has_fixups:1;
646 unsigned suspended:1;
647 unsigned suspended_by_mdio_bus:1;
648 unsigned sysfs_links:1;
649 unsigned loopback_enabled:1;
650 unsigned downshifted_rate:1;
651 unsigned is_on_sfp_module:1;
652 unsigned mac_managed_pm:1;
653 unsigned wol_enabled:1;
654
655 unsigned autoneg:1;
656 /* The most recently read link state */
657 unsigned link:1;
658 unsigned autoneg_complete:1;
659
660 /* Interrupts are enabled */
661 unsigned interrupts:1;
662 unsigned irq_suspended:1;
663 unsigned irq_rerun:1;
664
665 int rate_matching;
666
667 enum phy_state state;
668
669 u32 dev_flags;
670
671 phy_interface_t interface;
672
673 /*
674 * forced speed & duplex (no autoneg)
675 * partner speed & duplex & pause (autoneg)
676 */
677 int speed;
678 int duplex;
679 int port;
680 int pause;
681 int asym_pause;
682 u8 master_slave_get;
683 u8 master_slave_set;
684 u8 master_slave_state;
685
686 /* Union of PHY and Attached devices' supported link modes */
687 /* See ethtool.h for more info */
688 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
689 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
690 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
691 /* used with phy_speed_down */
692 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
693 /* used for eee validation */
694 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
695 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
696 bool eee_enabled;
697
698 /* Host supported PHY interface types. Should be ignored if empty. */
699 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
700
701 /* Energy efficient ethernet modes which should be prohibited */
702 u32 eee_broken_modes;
703
704#ifdef CONFIG_LED_TRIGGER_PHY
705 struct phy_led_trigger *phy_led_triggers;
706 unsigned int phy_num_led_triggers;
707 struct phy_led_trigger *last_triggered;
708
709 struct phy_led_trigger *led_link_trigger;
710#endif
711 struct list_head leds;
712
713 /*
714 * Interrupt number for this PHY
715 * -1 means no interrupt
716 */
717 int irq;
718
719 /* private data pointer */
720 /* For use by PHYs to maintain extra state */
721 void *priv;
722
723 /* shared data pointer */
724 /* For use by PHYs inside the same package that need a shared state. */
725 struct phy_package_shared *shared;
726
727 /* Reporting cable test results */
728 struct sk_buff *skb;
729 void *ehdr;
730 struct nlattr *nest;
731
732 /* Interrupt and Polling infrastructure */
733 struct delayed_work state_queue;
734
735 struct mutex lock;
736
737 /* This may be modified under the rtnl lock */
738 bool sfp_bus_attached;
739 struct sfp_bus *sfp_bus;
740 struct phylink *phylink;
741 struct net_device *attached_dev;
742 struct mii_timestamper *mii_ts;
743 struct pse_control *psec;
744
745 u8 mdix;
746 u8 mdix_ctrl;
747
748 int pma_extable;
749
750 unsigned int link_down_events;
751
752 void (*phy_link_change)(struct phy_device *phydev, bool up);
753 void (*adjust_link)(struct net_device *dev);
754
755#if IS_ENABLED(CONFIG_MACSEC)
756 /* MACsec management functions */
757 const struct macsec_ops *macsec_ops;
758#endif
759};
760
761/* Generic phy_device::dev_flags */
762#define PHY_F_NO_IRQ 0x80000000
763
764static inline struct phy_device *to_phy_device(const struct device *dev)
765{
766 return container_of(to_mdio_device(dev), struct phy_device, mdio);
767}
768
769/**
770 * struct phy_tdr_config - Configuration of a TDR raw test
771 *
772 * @first: Distance for first data collection point
773 * @last: Distance for last data collection point
774 * @step: Step between data collection points
775 * @pair: Bitmap of cable pairs to collect data for
776 *
777 * A structure containing possible configuration parameters
778 * for a TDR cable test. The driver does not need to implement
779 * all the parameters, but should report what is actually used.
780 * All distances are in centimeters.
781 */
782struct phy_tdr_config {
783 u32 first;
784 u32 last;
785 u32 step;
786 s8 pair;
787};
788#define PHY_PAIR_ALL -1
789
790/**
791 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
792 * Avoidance) Reconciliation Sublayer.
793 *
794 * @version: read-only PLCA register map version. -1 = not available. Ignored
795 * when setting the configuration. Format is the same as reported by the PLCA
796 * IDVER register (31.CA00). -1 = not available.
797 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
798 * set. 0 = disabled, anything else = enabled.
799 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
800 * Allowed values [0 .. 254]. 255 = node disabled.
801 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
802 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
803 * set. Allowed values [1 .. 255].
804 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
805 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
806 * more details. The to_timer shall be set equal over all nodes.
807 * -1 = not available / don't set. Allowed values [0 .. 255].
808 * @burst_cnt: controls how many additional frames a node is allowed to send in
809 * single transmit opportunity (TO). The default value of 0 means that the
810 * node is allowed exactly one frame per TO. A value of 1 allows two frames
811 * per TO, and so on. -1 = not available / don't set.
812 * Allowed values [0 .. 255].
813 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
814 * frame before interrupting the burst. This value should be set to a value
815 * greater than the MAC inter-packet gap (which is typically 96 bits).
816 * -1 = not available / don't set. Allowed values [0 .. 255].
817 *
818 * A structure containing configuration parameters for setting/getting the PLCA
819 * RS configuration. The driver does not need to implement all the parameters,
820 * but should report what is actually used.
821 */
822struct phy_plca_cfg {
823 int version;
824 int enabled;
825 int node_id;
826 int node_cnt;
827 int to_tmr;
828 int burst_cnt;
829 int burst_tmr;
830};
831
832/**
833 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
834 * Avoidance) Reconciliation Sublayer.
835 *
836 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
837 * register(31.CA03), indicating BEACON activity.
838 *
839 * A structure containing status information of the PLCA RS configuration.
840 * The driver does not need to implement all the parameters, but should report
841 * what is actually used.
842 */
843struct phy_plca_status {
844 bool pst;
845};
846
847/**
848 * struct phy_led: An LED driven by the PHY
849 *
850 * @list: List of LEDs
851 * @phydev: PHY this LED is attached to
852 * @led_cdev: Standard LED class structure
853 * @index: Number of the LED
854 */
855struct phy_led {
856 struct list_head list;
857 struct phy_device *phydev;
858 struct led_classdev led_cdev;
859 u8 index;
860};
861
862#define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
863
864/**
865 * struct phy_driver - Driver structure for a particular PHY type
866 *
867 * @mdiodrv: Data common to all MDIO devices
868 * @phy_id: The result of reading the UID registers of this PHY
869 * type, and ANDing them with the phy_id_mask. This driver
870 * only works for PHYs with IDs which match this field
871 * @name: The friendly name of this PHY type
872 * @phy_id_mask: Defines the important bits of the phy_id
873 * @features: A mandatory list of features (speed, duplex, etc)
874 * supported by this PHY
875 * @flags: A bitfield defining certain other features this PHY
876 * supports (like interrupts)
877 * @driver_data: Static driver data
878 *
879 * All functions are optional. If config_aneg or read_status
880 * are not implemented, the phy core uses the genphy versions.
881 * Note that none of these functions should be called from
882 * interrupt time. The goal is for the bus read/write functions
883 * to be able to block when the bus transaction is happening,
884 * and be freed up by an interrupt (The MPC85xx has this ability,
885 * though it is not currently supported in the driver).
886 */
887struct phy_driver {
888 struct mdio_driver_common mdiodrv;
889 u32 phy_id;
890 char *name;
891 u32 phy_id_mask;
892 const unsigned long * const features;
893 u32 flags;
894 const void *driver_data;
895
896 /**
897 * @soft_reset: Called to issue a PHY software reset
898 */
899 int (*soft_reset)(struct phy_device *phydev);
900
901 /**
902 * @config_init: Called to initialize the PHY,
903 * including after a reset
904 */
905 int (*config_init)(struct phy_device *phydev);
906
907 /**
908 * @probe: Called during discovery. Used to set
909 * up device-specific structures, if any
910 */
911 int (*probe)(struct phy_device *phydev);
912
913 /**
914 * @get_features: Probe the hardware to determine what
915 * abilities it has. Should only set phydev->supported.
916 */
917 int (*get_features)(struct phy_device *phydev);
918
919 /**
920 * @get_rate_matching: Get the supported type of rate matching for a
921 * particular phy interface. This is used by phy consumers to determine
922 * whether to advertise lower-speed modes for that interface. It is
923 * assumed that if a rate matching mode is supported on an interface,
924 * then that interface's rate can be adapted to all slower link speeds
925 * supported by the phy. If the interface is not supported, this should
926 * return %RATE_MATCH_NONE.
927 */
928 int (*get_rate_matching)(struct phy_device *phydev,
929 phy_interface_t iface);
930
931 /* PHY Power Management */
932 /** @suspend: Suspend the hardware, saving state if needed */
933 int (*suspend)(struct phy_device *phydev);
934 /** @resume: Resume the hardware, restoring state if needed */
935 int (*resume)(struct phy_device *phydev);
936
937 /**
938 * @config_aneg: Configures the advertisement and resets
939 * autonegotiation if phydev->autoneg is on,
940 * forces the speed to the current settings in phydev
941 * if phydev->autoneg is off
942 */
943 int (*config_aneg)(struct phy_device *phydev);
944
945 /** @aneg_done: Determines the auto negotiation result */
946 int (*aneg_done)(struct phy_device *phydev);
947
948 /** @read_status: Determines the negotiated speed and duplex */
949 int (*read_status)(struct phy_device *phydev);
950
951 /**
952 * @config_intr: Enables or disables interrupts.
953 * It should also clear any pending interrupts prior to enabling the
954 * IRQs and after disabling them.
955 */
956 int (*config_intr)(struct phy_device *phydev);
957
958 /** @handle_interrupt: Override default interrupt handling */
959 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
960
961 /** @remove: Clears up any memory if needed */
962 void (*remove)(struct phy_device *phydev);
963
964 /**
965 * @match_phy_device: Returns true if this is a suitable
966 * driver for the given phydev. If NULL, matching is based on
967 * phy_id and phy_id_mask.
968 */
969 int (*match_phy_device)(struct phy_device *phydev);
970
971 /**
972 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
973 * register changes to enable Wake on LAN, so set_wol is
974 * provided to be called in the ethernet driver's set_wol
975 * function.
976 */
977 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
978
979 /**
980 * @get_wol: See set_wol, but for checking whether Wake on LAN
981 * is enabled.
982 */
983 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
984
985 /**
986 * @link_change_notify: Called to inform a PHY device driver
987 * when the core is about to change the link state. This
988 * callback is supposed to be used as fixup hook for drivers
989 * that need to take action when the link state
990 * changes. Drivers are by no means allowed to mess with the
991 * PHY device structure in their implementations.
992 */
993 void (*link_change_notify)(struct phy_device *dev);
994
995 /**
996 * @read_mmd: PHY specific driver override for reading a MMD
997 * register. This function is optional for PHY specific
998 * drivers. When not provided, the default MMD read function
999 * will be used by phy_read_mmd(), which will use either a
1000 * direct read for Clause 45 PHYs or an indirect read for
1001 * Clause 22 PHYs. devnum is the MMD device number within the
1002 * PHY device, regnum is the register within the selected MMD
1003 * device.
1004 */
1005 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1006
1007 /**
1008 * @write_mmd: PHY specific driver override for writing a MMD
1009 * register. This function is optional for PHY specific
1010 * drivers. When not provided, the default MMD write function
1011 * will be used by phy_write_mmd(), which will use either a
1012 * direct write for Clause 45 PHYs, or an indirect write for
1013 * Clause 22 PHYs. devnum is the MMD device number within the
1014 * PHY device, regnum is the register within the selected MMD
1015 * device. val is the value to be written.
1016 */
1017 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1018 u16 val);
1019
1020 /** @read_page: Return the current PHY register page number */
1021 int (*read_page)(struct phy_device *dev);
1022 /** @write_page: Set the current PHY register page number */
1023 int (*write_page)(struct phy_device *dev, int page);
1024
1025 /**
1026 * @module_info: Get the size and type of the eeprom contained
1027 * within a plug-in module
1028 */
1029 int (*module_info)(struct phy_device *dev,
1030 struct ethtool_modinfo *modinfo);
1031
1032 /**
1033 * @module_eeprom: Get the eeprom information from the plug-in
1034 * module
1035 */
1036 int (*module_eeprom)(struct phy_device *dev,
1037 struct ethtool_eeprom *ee, u8 *data);
1038
1039 /** @cable_test_start: Start a cable test */
1040 int (*cable_test_start)(struct phy_device *dev);
1041
1042 /** @cable_test_tdr_start: Start a raw TDR cable test */
1043 int (*cable_test_tdr_start)(struct phy_device *dev,
1044 const struct phy_tdr_config *config);
1045
1046 /**
1047 * @cable_test_get_status: Once per second, or on interrupt,
1048 * request the status of the test.
1049 */
1050 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1051
1052 /* Get statistics from the PHY using ethtool */
1053 /** @get_sset_count: Number of statistic counters */
1054 int (*get_sset_count)(struct phy_device *dev);
1055 /** @get_strings: Names of the statistic counters */
1056 void (*get_strings)(struct phy_device *dev, u8 *data);
1057 /** @get_stats: Return the statistic counter values */
1058 void (*get_stats)(struct phy_device *dev,
1059 struct ethtool_stats *stats, u64 *data);
1060
1061 /* Get and Set PHY tunables */
1062 /** @get_tunable: Return the value of a tunable */
1063 int (*get_tunable)(struct phy_device *dev,
1064 struct ethtool_tunable *tuna, void *data);
1065 /** @set_tunable: Set the value of a tunable */
1066 int (*set_tunable)(struct phy_device *dev,
1067 struct ethtool_tunable *tuna,
1068 const void *data);
1069 /** @set_loopback: Set the loopback mood of the PHY */
1070 int (*set_loopback)(struct phy_device *dev, bool enable);
1071 /** @get_sqi: Get the signal quality indication */
1072 int (*get_sqi)(struct phy_device *dev);
1073 /** @get_sqi_max: Get the maximum signal quality indication */
1074 int (*get_sqi_max)(struct phy_device *dev);
1075
1076 /* PLCA RS interface */
1077 /** @get_plca_cfg: Return the current PLCA configuration */
1078 int (*get_plca_cfg)(struct phy_device *dev,
1079 struct phy_plca_cfg *plca_cfg);
1080 /** @set_plca_cfg: Set the PLCA configuration */
1081 int (*set_plca_cfg)(struct phy_device *dev,
1082 const struct phy_plca_cfg *plca_cfg);
1083 /** @get_plca_status: Return the current PLCA status info */
1084 int (*get_plca_status)(struct phy_device *dev,
1085 struct phy_plca_status *plca_st);
1086
1087 /**
1088 * @led_brightness_set: Set a PHY LED brightness. Index
1089 * indicates which of the PHYs led should be set. Value
1090 * follows the standard LED class meaning, e.g. LED_OFF,
1091 * LED_HALF, LED_FULL.
1092 */
1093 int (*led_brightness_set)(struct phy_device *dev,
1094 u8 index, enum led_brightness value);
1095
1096 /**
1097 * @led_blink_set: Set a PHY LED brightness. Index indicates
1098 * which of the PHYs led should be configured to blink. Delays
1099 * are in milliseconds and if both are zero then a sensible
1100 * default should be chosen. The call should adjust the
1101 * timings in that case and if it can't match the values
1102 * specified exactly.
1103 */
1104 int (*led_blink_set)(struct phy_device *dev, u8 index,
1105 unsigned long *delay_on,
1106 unsigned long *delay_off);
1107};
1108#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
1109 struct phy_driver, mdiodrv)
1110
1111#define PHY_ANY_ID "MATCH ANY PHY"
1112#define PHY_ANY_UID 0xffffffff
1113
1114#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1115#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1116#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1117
1118/**
1119 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1120 * @id1: first PHY ID
1121 * @id2: second PHY ID
1122 * @mask: the PHY ID mask, set bits are significant in matching
1123 *
1124 * Return true if the bits from @id1 and @id2 specified by @mask match.
1125 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1126 */
1127static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1128{
1129 return !((id1 ^ id2) & mask);
1130}
1131
1132/**
1133 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1134 * @phydev: the PHY device
1135 * @id: the PHY ID to be matched
1136 *
1137 * Compare the @phydev clause 22 ID with the provided @id and return true or
1138 * false depending whether it matches, using the bound driver mask. The
1139 * @phydev must be bound to a driver.
1140 */
1141static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1142{
1143 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1144}
1145
1146/* A Structure for boards to register fixups with the PHY Lib */
1147struct phy_fixup {
1148 struct list_head list;
1149 char bus_id[MII_BUS_ID_SIZE + 3];
1150 u32 phy_uid;
1151 u32 phy_uid_mask;
1152 int (*run)(struct phy_device *phydev);
1153};
1154
1155const char *phy_speed_to_str(int speed);
1156const char *phy_duplex_to_str(unsigned int duplex);
1157const char *phy_rate_matching_to_str(int rate_matching);
1158
1159int phy_interface_num_ports(phy_interface_t interface);
1160
1161/* A structure for mapping a particular speed and duplex
1162 * combination to a particular SUPPORTED and ADVERTISED value
1163 */
1164struct phy_setting {
1165 u32 speed;
1166 u8 duplex;
1167 u8 bit;
1168};
1169
1170const struct phy_setting *
1171phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1172 bool exact);
1173size_t phy_speeds(unsigned int *speeds, size_t size,
1174 unsigned long *mask);
1175void of_set_phy_supported(struct phy_device *phydev);
1176void of_set_phy_eee_broken(struct phy_device *phydev);
1177int phy_speed_down_core(struct phy_device *phydev);
1178
1179/**
1180 * phy_is_started - Convenience function to check whether PHY is started
1181 * @phydev: The phy_device struct
1182 */
1183static inline bool phy_is_started(struct phy_device *phydev)
1184{
1185 return phydev->state >= PHY_UP;
1186}
1187
1188void phy_resolve_aneg_pause(struct phy_device *phydev);
1189void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1190void phy_check_downshift(struct phy_device *phydev);
1191
1192/**
1193 * phy_read - Convenience function for reading a given PHY register
1194 * @phydev: the phy_device struct
1195 * @regnum: register number to read
1196 *
1197 * NOTE: MUST NOT be called from interrupt context,
1198 * because the bus read/write functions may wait for an interrupt
1199 * to conclude the operation.
1200 */
1201static inline int phy_read(struct phy_device *phydev, u32 regnum)
1202{
1203 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1204}
1205
1206#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1207 timeout_us, sleep_before_read) \
1208({ \
1209 int __ret, __val; \
1210 __ret = read_poll_timeout(__val = phy_read, val, \
1211 __val < 0 || (cond), \
1212 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1213 if (__val < 0) \
1214 __ret = __val; \
1215 if (__ret) \
1216 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1217 __ret; \
1218})
1219
1220/**
1221 * __phy_read - convenience function for reading a given PHY register
1222 * @phydev: the phy_device struct
1223 * @regnum: register number to read
1224 *
1225 * The caller must have taken the MDIO bus lock.
1226 */
1227static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1228{
1229 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1230}
1231
1232/**
1233 * phy_write - Convenience function for writing a given PHY register
1234 * @phydev: the phy_device struct
1235 * @regnum: register number to write
1236 * @val: value to write to @regnum
1237 *
1238 * NOTE: MUST NOT be called from interrupt context,
1239 * because the bus read/write functions may wait for an interrupt
1240 * to conclude the operation.
1241 */
1242static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1243{
1244 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1245}
1246
1247/**
1248 * __phy_write - Convenience function for writing a given PHY register
1249 * @phydev: the phy_device struct
1250 * @regnum: register number to write
1251 * @val: value to write to @regnum
1252 *
1253 * The caller must have taken the MDIO bus lock.
1254 */
1255static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1256{
1257 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1258 val);
1259}
1260
1261/**
1262 * __phy_modify_changed() - Convenience function for modifying a PHY register
1263 * @phydev: a pointer to a &struct phy_device
1264 * @regnum: register number
1265 * @mask: bit mask of bits to clear
1266 * @set: bit mask of bits to set
1267 *
1268 * Unlocked helper function which allows a PHY register to be modified as
1269 * new register value = (old register value & ~mask) | set
1270 *
1271 * Returns negative errno, 0 if there was no change, and 1 in case of change
1272 */
1273static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1274 u16 mask, u16 set)
1275{
1276 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1277 regnum, mask, set);
1278}
1279
1280/*
1281 * phy_read_mmd - Convenience function for reading a register
1282 * from an MMD on a given PHY.
1283 */
1284int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1285
1286/**
1287 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1288 * condition is met or a timeout occurs
1289 *
1290 * @phydev: The phy_device struct
1291 * @devaddr: The MMD to read from
1292 * @regnum: The register on the MMD to read
1293 * @val: Variable to read the register into
1294 * @cond: Break condition (usually involving @val)
1295 * @sleep_us: Maximum time to sleep between reads in us (0
1296 * tight-loops). Should be less than ~20ms since usleep_range
1297 * is used (see Documentation/timers/timers-howto.rst).
1298 * @timeout_us: Timeout in us, 0 means never timeout
1299 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1300 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1301 * case, the last read value at @args is stored in @val. Must not
1302 * be called from atomic context if sleep_us or timeout_us are used.
1303 */
1304#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1305 sleep_us, timeout_us, sleep_before_read) \
1306({ \
1307 int __ret, __val; \
1308 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1309 __val < 0 || (cond), \
1310 sleep_us, timeout_us, sleep_before_read, \
1311 phydev, devaddr, regnum); \
1312 if (__val < 0) \
1313 __ret = __val; \
1314 if (__ret) \
1315 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1316 __ret; \
1317})
1318
1319/*
1320 * __phy_read_mmd - Convenience function for reading a register
1321 * from an MMD on a given PHY.
1322 */
1323int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1324
1325/*
1326 * phy_write_mmd - Convenience function for writing a register
1327 * on an MMD on a given PHY.
1328 */
1329int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1330
1331/*
1332 * __phy_write_mmd - Convenience function for writing a register
1333 * on an MMD on a given PHY.
1334 */
1335int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1336
1337int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1338 u16 set);
1339int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1340 u16 set);
1341int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1342int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1343
1344int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1345 u16 mask, u16 set);
1346int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1347 u16 mask, u16 set);
1348int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1349 u16 mask, u16 set);
1350int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1351 u16 mask, u16 set);
1352
1353/**
1354 * __phy_set_bits - Convenience function for setting bits in a PHY register
1355 * @phydev: the phy_device struct
1356 * @regnum: register number to write
1357 * @val: bits to set
1358 *
1359 * The caller must have taken the MDIO bus lock.
1360 */
1361static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1362{
1363 return __phy_modify(phydev, regnum, 0, val);
1364}
1365
1366/**
1367 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1368 * @phydev: the phy_device struct
1369 * @regnum: register number to write
1370 * @val: bits to clear
1371 *
1372 * The caller must have taken the MDIO bus lock.
1373 */
1374static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1375 u16 val)
1376{
1377 return __phy_modify(phydev, regnum, val, 0);
1378}
1379
1380/**
1381 * phy_set_bits - Convenience function for setting bits in a PHY register
1382 * @phydev: the phy_device struct
1383 * @regnum: register number to write
1384 * @val: bits to set
1385 */
1386static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1387{
1388 return phy_modify(phydev, regnum, 0, val);
1389}
1390
1391/**
1392 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1393 * @phydev: the phy_device struct
1394 * @regnum: register number to write
1395 * @val: bits to clear
1396 */
1397static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1398{
1399 return phy_modify(phydev, regnum, val, 0);
1400}
1401
1402/**
1403 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1404 * on MMD
1405 * @phydev: the phy_device struct
1406 * @devad: the MMD containing register to modify
1407 * @regnum: register number to modify
1408 * @val: bits to set
1409 *
1410 * The caller must have taken the MDIO bus lock.
1411 */
1412static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1413 u32 regnum, u16 val)
1414{
1415 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1416}
1417
1418/**
1419 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1420 * on MMD
1421 * @phydev: the phy_device struct
1422 * @devad: the MMD containing register to modify
1423 * @regnum: register number to modify
1424 * @val: bits to clear
1425 *
1426 * The caller must have taken the MDIO bus lock.
1427 */
1428static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1429 u32 regnum, u16 val)
1430{
1431 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1432}
1433
1434/**
1435 * phy_set_bits_mmd - Convenience function for setting bits in a register
1436 * on MMD
1437 * @phydev: the phy_device struct
1438 * @devad: the MMD containing register to modify
1439 * @regnum: register number to modify
1440 * @val: bits to set
1441 */
1442static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1443 u32 regnum, u16 val)
1444{
1445 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1446}
1447
1448/**
1449 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1450 * on MMD
1451 * @phydev: the phy_device struct
1452 * @devad: the MMD containing register to modify
1453 * @regnum: register number to modify
1454 * @val: bits to clear
1455 */
1456static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1457 u32 regnum, u16 val)
1458{
1459 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1460}
1461
1462/**
1463 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1464 * @phydev: the phy_device struct
1465 *
1466 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1467 * PHY_MAC_INTERRUPT
1468 */
1469static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1470{
1471 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1472}
1473
1474/**
1475 * phy_polling_mode - Convenience function for testing whether polling is
1476 * used to detect PHY status changes
1477 * @phydev: the phy_device struct
1478 */
1479static inline bool phy_polling_mode(struct phy_device *phydev)
1480{
1481 if (phydev->state == PHY_CABLETEST)
1482 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1483 return true;
1484
1485 return phydev->irq == PHY_POLL;
1486}
1487
1488/**
1489 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1490 * @phydev: the phy_device struct
1491 */
1492static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1493{
1494 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1495}
1496
1497/**
1498 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1499 * @phydev: the phy_device struct
1500 */
1501static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1502{
1503 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1504}
1505
1506/**
1507 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1508 * PTP hardware clock capabilities.
1509 * @phydev: the phy_device struct
1510 */
1511static inline bool phy_has_tsinfo(struct phy_device *phydev)
1512{
1513 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1514}
1515
1516/**
1517 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1518 * @phydev: the phy_device struct
1519 */
1520static inline bool phy_has_txtstamp(struct phy_device *phydev)
1521{
1522 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1523}
1524
1525static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1526{
1527 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1528}
1529
1530static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1531 int type)
1532{
1533 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1534}
1535
1536static inline int phy_ts_info(struct phy_device *phydev,
1537 struct ethtool_ts_info *tsinfo)
1538{
1539 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1540}
1541
1542static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1543 int type)
1544{
1545 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1546}
1547
1548/**
1549 * phy_is_internal - Convenience function for testing if a PHY is internal
1550 * @phydev: the phy_device struct
1551 */
1552static inline bool phy_is_internal(struct phy_device *phydev)
1553{
1554 return phydev->is_internal;
1555}
1556
1557/**
1558 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1559 * @phydev: the phy_device struct
1560 */
1561static inline bool phy_on_sfp(struct phy_device *phydev)
1562{
1563 return phydev->is_on_sfp_module;
1564}
1565
1566/**
1567 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1568 * PHY interface mode is RGMII (all variants)
1569 * @mode: the &phy_interface_t enum
1570 */
1571static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1572{
1573 return mode >= PHY_INTERFACE_MODE_RGMII &&
1574 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1575};
1576
1577/**
1578 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1579 * negotiation
1580 * @mode: one of &enum phy_interface_t
1581 *
1582 * Returns true if the PHY interface mode uses the 16-bit negotiation
1583 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1584 */
1585static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1586{
1587 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1588 mode == PHY_INTERFACE_MODE_2500BASEX;
1589}
1590
1591/**
1592 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1593 * is RGMII (all variants)
1594 * @phydev: the phy_device struct
1595 */
1596static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1597{
1598 return phy_interface_mode_is_rgmii(phydev->interface);
1599};
1600
1601/**
1602 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1603 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1604 * @phydev: the phy_device struct
1605 */
1606static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1607{
1608 return phydev->is_pseudo_fixed_link;
1609}
1610
1611int phy_save_page(struct phy_device *phydev);
1612int phy_select_page(struct phy_device *phydev, int page);
1613int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1614int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1615int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1616int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1617 u16 mask, u16 set);
1618int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1619 u16 mask, u16 set);
1620
1621struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1622 bool is_c45,
1623 struct phy_c45_device_ids *c45_ids);
1624#if IS_ENABLED(CONFIG_PHYLIB)
1625int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1626struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1627struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1628struct phy_device *device_phy_find_device(struct device *dev);
1629struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1630struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1631int phy_device_register(struct phy_device *phy);
1632void phy_device_free(struct phy_device *phydev);
1633#else
1634static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1635{
1636 return 0;
1637}
1638static inline
1639struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1640{
1641 return 0;
1642}
1643
1644static inline
1645struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1646{
1647 return NULL;
1648}
1649
1650static inline struct phy_device *device_phy_find_device(struct device *dev)
1651{
1652 return NULL;
1653}
1654
1655static inline
1656struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1657{
1658 return NULL;
1659}
1660
1661static inline
1662struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1663{
1664 return NULL;
1665}
1666
1667static inline int phy_device_register(struct phy_device *phy)
1668{
1669 return 0;
1670}
1671
1672static inline void phy_device_free(struct phy_device *phydev) { }
1673#endif /* CONFIG_PHYLIB */
1674void phy_device_remove(struct phy_device *phydev);
1675int phy_get_c45_ids(struct phy_device *phydev);
1676int phy_init_hw(struct phy_device *phydev);
1677int phy_suspend(struct phy_device *phydev);
1678int phy_resume(struct phy_device *phydev);
1679int __phy_resume(struct phy_device *phydev);
1680int phy_loopback(struct phy_device *phydev, bool enable);
1681void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1682void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1683int phy_sfp_probe(struct phy_device *phydev,
1684 const struct sfp_upstream_ops *ops);
1685struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1686 phy_interface_t interface);
1687struct phy_device *phy_find_first(struct mii_bus *bus);
1688int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1689 u32 flags, phy_interface_t interface);
1690int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1691 void (*handler)(struct net_device *),
1692 phy_interface_t interface);
1693struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1694 void (*handler)(struct net_device *),
1695 phy_interface_t interface);
1696void phy_disconnect(struct phy_device *phydev);
1697void phy_detach(struct phy_device *phydev);
1698void phy_start(struct phy_device *phydev);
1699void phy_stop(struct phy_device *phydev);
1700int phy_config_aneg(struct phy_device *phydev);
1701int phy_start_aneg(struct phy_device *phydev);
1702int phy_aneg_done(struct phy_device *phydev);
1703int phy_speed_down(struct phy_device *phydev, bool sync);
1704int phy_speed_up(struct phy_device *phydev);
1705bool phy_check_valid(int speed, int duplex, unsigned long *features);
1706
1707int phy_restart_aneg(struct phy_device *phydev);
1708int phy_reset_after_clk_enable(struct phy_device *phydev);
1709
1710#if IS_ENABLED(CONFIG_PHYLIB)
1711int phy_start_cable_test(struct phy_device *phydev,
1712 struct netlink_ext_ack *extack);
1713int phy_start_cable_test_tdr(struct phy_device *phydev,
1714 struct netlink_ext_ack *extack,
1715 const struct phy_tdr_config *config);
1716#else
1717static inline
1718int phy_start_cable_test(struct phy_device *phydev,
1719 struct netlink_ext_ack *extack)
1720{
1721 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1722 return -EOPNOTSUPP;
1723}
1724static inline
1725int phy_start_cable_test_tdr(struct phy_device *phydev,
1726 struct netlink_ext_ack *extack,
1727 const struct phy_tdr_config *config)
1728{
1729 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1730 return -EOPNOTSUPP;
1731}
1732#endif
1733
1734int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1735int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1736 u16 cm);
1737
1738static inline void phy_device_reset(struct phy_device *phydev, int value)
1739{
1740 mdio_device_reset(&phydev->mdio, value);
1741}
1742
1743#define phydev_err(_phydev, format, args...) \
1744 dev_err(&_phydev->mdio.dev, format, ##args)
1745
1746#define phydev_err_probe(_phydev, err, format, args...) \
1747 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1748
1749#define phydev_info(_phydev, format, args...) \
1750 dev_info(&_phydev->mdio.dev, format, ##args)
1751
1752#define phydev_warn(_phydev, format, args...) \
1753 dev_warn(&_phydev->mdio.dev, format, ##args)
1754
1755#define phydev_dbg(_phydev, format, args...) \
1756 dev_dbg(&_phydev->mdio.dev, format, ##args)
1757
1758static inline const char *phydev_name(const struct phy_device *phydev)
1759{
1760 return dev_name(&phydev->mdio.dev);
1761}
1762
1763static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1764{
1765 mutex_lock(&phydev->mdio.bus->mdio_lock);
1766}
1767
1768static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1769{
1770 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1771}
1772
1773void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1774 __printf(2, 3);
1775char *phy_attached_info_irq(struct phy_device *phydev)
1776 __malloc;
1777void phy_attached_info(struct phy_device *phydev);
1778
1779/* Clause 22 PHY */
1780int genphy_read_abilities(struct phy_device *phydev);
1781int genphy_setup_forced(struct phy_device *phydev);
1782int genphy_restart_aneg(struct phy_device *phydev);
1783int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1784int genphy_config_eee_advert(struct phy_device *phydev);
1785int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1786int genphy_aneg_done(struct phy_device *phydev);
1787int genphy_update_link(struct phy_device *phydev);
1788int genphy_read_lpa(struct phy_device *phydev);
1789int genphy_read_status_fixed(struct phy_device *phydev);
1790int genphy_read_status(struct phy_device *phydev);
1791int genphy_read_master_slave(struct phy_device *phydev);
1792int genphy_suspend(struct phy_device *phydev);
1793int genphy_resume(struct phy_device *phydev);
1794int genphy_loopback(struct phy_device *phydev, bool enable);
1795int genphy_soft_reset(struct phy_device *phydev);
1796irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1797
1798static inline int genphy_config_aneg(struct phy_device *phydev)
1799{
1800 return __genphy_config_aneg(phydev, false);
1801}
1802
1803static inline int genphy_no_config_intr(struct phy_device *phydev)
1804{
1805 return 0;
1806}
1807int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1808 u16 regnum);
1809int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1810 u16 regnum, u16 val);
1811
1812/* Clause 37 */
1813int genphy_c37_config_aneg(struct phy_device *phydev);
1814int genphy_c37_read_status(struct phy_device *phydev);
1815
1816/* Clause 45 PHY */
1817int genphy_c45_restart_aneg(struct phy_device *phydev);
1818int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1819int genphy_c45_aneg_done(struct phy_device *phydev);
1820int genphy_c45_read_link(struct phy_device *phydev);
1821int genphy_c45_read_lpa(struct phy_device *phydev);
1822int genphy_c45_read_pma(struct phy_device *phydev);
1823int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1824int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1825int genphy_c45_an_config_aneg(struct phy_device *phydev);
1826int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1827int genphy_c45_read_mdix(struct phy_device *phydev);
1828int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1829int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1830int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1831int genphy_c45_read_status(struct phy_device *phydev);
1832int genphy_c45_baset1_read_status(struct phy_device *phydev);
1833int genphy_c45_config_aneg(struct phy_device *phydev);
1834int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1835int genphy_c45_pma_resume(struct phy_device *phydev);
1836int genphy_c45_pma_suspend(struct phy_device *phydev);
1837int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1838int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1839 struct phy_plca_cfg *plca_cfg);
1840int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1841 const struct phy_plca_cfg *plca_cfg);
1842int genphy_c45_plca_get_status(struct phy_device *phydev,
1843 struct phy_plca_status *plca_st);
1844int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1845 unsigned long *lp, bool *is_enabled);
1846int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1847 struct ethtool_eee *data);
1848int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1849 struct ethtool_eee *data);
1850int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1851int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1852int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1853
1854/* Generic C45 PHY driver */
1855extern struct phy_driver genphy_c45_driver;
1856
1857/* The gen10g_* functions are the old Clause 45 stub */
1858int gen10g_config_aneg(struct phy_device *phydev);
1859
1860static inline int phy_read_status(struct phy_device *phydev)
1861{
1862 if (!phydev->drv)
1863 return -EIO;
1864
1865 if (phydev->drv->read_status)
1866 return phydev->drv->read_status(phydev);
1867 else
1868 return genphy_read_status(phydev);
1869}
1870
1871void phy_driver_unregister(struct phy_driver *drv);
1872void phy_drivers_unregister(struct phy_driver *drv, int n);
1873int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1874int phy_drivers_register(struct phy_driver *new_driver, int n,
1875 struct module *owner);
1876void phy_error(struct phy_device *phydev);
1877void phy_state_machine(struct work_struct *work);
1878void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1879void phy_trigger_machine(struct phy_device *phydev);
1880void phy_mac_interrupt(struct phy_device *phydev);
1881void phy_start_machine(struct phy_device *phydev);
1882void phy_stop_machine(struct phy_device *phydev);
1883void phy_ethtool_ksettings_get(struct phy_device *phydev,
1884 struct ethtool_link_ksettings *cmd);
1885int phy_ethtool_ksettings_set(struct phy_device *phydev,
1886 const struct ethtool_link_ksettings *cmd);
1887int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1888int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1889int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1890int phy_disable_interrupts(struct phy_device *phydev);
1891void phy_request_interrupt(struct phy_device *phydev);
1892void phy_free_interrupt(struct phy_device *phydev);
1893void phy_print_status(struct phy_device *phydev);
1894int phy_get_rate_matching(struct phy_device *phydev,
1895 phy_interface_t iface);
1896void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1897void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1898void phy_advertise_supported(struct phy_device *phydev);
1899void phy_support_sym_pause(struct phy_device *phydev);
1900void phy_support_asym_pause(struct phy_device *phydev);
1901void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1902 bool autoneg);
1903void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1904bool phy_validate_pause(struct phy_device *phydev,
1905 struct ethtool_pauseparam *pp);
1906void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1907
1908s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1909 const int *delay_values, int size, bool is_rx);
1910
1911void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1912 bool *tx_pause, bool *rx_pause);
1913
1914int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1915 int (*run)(struct phy_device *));
1916int phy_register_fixup_for_id(const char *bus_id,
1917 int (*run)(struct phy_device *));
1918int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1919 int (*run)(struct phy_device *));
1920
1921int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1922int phy_unregister_fixup_for_id(const char *bus_id);
1923int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1924
1925int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1926int phy_get_eee_err(struct phy_device *phydev);
1927int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1928int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1929int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1930void phy_ethtool_get_wol(struct phy_device *phydev,
1931 struct ethtool_wolinfo *wol);
1932int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1933 struct ethtool_link_ksettings *cmd);
1934int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1935 const struct ethtool_link_ksettings *cmd);
1936int phy_ethtool_nway_reset(struct net_device *ndev);
1937int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1938void phy_package_leave(struct phy_device *phydev);
1939int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1940 int addr, size_t priv_size);
1941
1942int __init mdio_bus_init(void);
1943void mdio_bus_exit(void);
1944
1945int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1946int phy_ethtool_get_sset_count(struct phy_device *phydev);
1947int phy_ethtool_get_stats(struct phy_device *phydev,
1948 struct ethtool_stats *stats, u64 *data);
1949int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
1950 struct phy_plca_cfg *plca_cfg);
1951int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
1952 const struct phy_plca_cfg *plca_cfg,
1953 struct netlink_ext_ack *extack);
1954int phy_ethtool_get_plca_status(struct phy_device *phydev,
1955 struct phy_plca_status *plca_st);
1956
1957static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1958{
1959 struct phy_package_shared *shared = phydev->shared;
1960
1961 if (!shared)
1962 return -EIO;
1963
1964 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1965}
1966
1967static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1968{
1969 struct phy_package_shared *shared = phydev->shared;
1970
1971 if (!shared)
1972 return -EIO;
1973
1974 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1975}
1976
1977static inline int phy_package_write(struct phy_device *phydev,
1978 u32 regnum, u16 val)
1979{
1980 struct phy_package_shared *shared = phydev->shared;
1981
1982 if (!shared)
1983 return -EIO;
1984
1985 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1986}
1987
1988static inline int __phy_package_write(struct phy_device *phydev,
1989 u32 regnum, u16 val)
1990{
1991 struct phy_package_shared *shared = phydev->shared;
1992
1993 if (!shared)
1994 return -EIO;
1995
1996 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1997}
1998
1999static inline bool __phy_package_set_once(struct phy_device *phydev,
2000 unsigned int b)
2001{
2002 struct phy_package_shared *shared = phydev->shared;
2003
2004 if (!shared)
2005 return false;
2006
2007 return !test_and_set_bit(b, &shared->flags);
2008}
2009
2010static inline bool phy_package_init_once(struct phy_device *phydev)
2011{
2012 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2013}
2014
2015static inline bool phy_package_probe_once(struct phy_device *phydev)
2016{
2017 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2018}
2019
2020extern struct bus_type mdio_bus_type;
2021
2022struct mdio_board_info {
2023 const char *bus_id;
2024 char modalias[MDIO_NAME_SIZE];
2025 int mdio_addr;
2026 const void *platform_data;
2027};
2028
2029#if IS_ENABLED(CONFIG_MDIO_DEVICE)
2030int mdiobus_register_board_info(const struct mdio_board_info *info,
2031 unsigned int n);
2032#else
2033static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2034 unsigned int n)
2035{
2036 return 0;
2037}
2038#endif
2039
2040
2041/**
2042 * phy_module_driver() - Helper macro for registering PHY drivers
2043 * @__phy_drivers: array of PHY drivers to register
2044 * @__count: Numbers of members in array
2045 *
2046 * Helper macro for PHY drivers which do not do anything special in module
2047 * init/exit. Each module may only use this macro once, and calling it
2048 * replaces module_init() and module_exit().
2049 */
2050#define phy_module_driver(__phy_drivers, __count) \
2051static int __init phy_module_init(void) \
2052{ \
2053 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2054} \
2055module_init(phy_module_init); \
2056static void __exit phy_module_exit(void) \
2057{ \
2058 phy_drivers_unregister(__phy_drivers, __count); \
2059} \
2060module_exit(phy_module_exit)
2061
2062#define module_phy_driver(__phy_drivers) \
2063 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2064
2065bool phy_driver_is_genphy(struct phy_device *phydev);
2066bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2067
2068#endif /* __PHY_H */