Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2006, Intel Corporation.
4 *
5 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
6 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
7 */
8
9#ifndef __DMAR_H__
10#define __DMAR_H__
11
12#include <linux/acpi.h>
13#include <linux/types.h>
14#include <linux/msi.h>
15#include <linux/irqreturn.h>
16#include <linux/rwsem.h>
17#include <linux/rculist.h>
18
19struct acpi_dmar_header;
20
21#define DMAR_UNITS_SUPPORTED 1024
22
23/* DMAR Flags */
24#define DMAR_INTR_REMAP 0x1
25#define DMAR_X2APIC_OPT_OUT 0x2
26#define DMAR_PLATFORM_OPT_IN 0x4
27
28struct intel_iommu;
29
30struct dmar_dev_scope {
31 struct device __rcu *dev;
32 u8 bus;
33 u8 devfn;
34};
35
36#ifdef CONFIG_DMAR_TABLE
37extern struct acpi_table_header *dmar_tbl;
38struct dmar_drhd_unit {
39 struct list_head list; /* list of drhd units */
40 struct acpi_dmar_header *hdr; /* ACPI header */
41 u64 reg_base_addr; /* register base address*/
42 unsigned long reg_size; /* size of register set */
43 struct dmar_dev_scope *devices;/* target device array */
44 int devices_cnt; /* target device count */
45 u16 segment; /* PCI domain */
46 u8 ignored:1; /* ignore drhd */
47 u8 include_all:1;
48 u8 gfx_dedicated:1; /* graphic dedicated */
49 struct intel_iommu *iommu;
50};
51
52struct dmar_pci_path {
53 u8 bus;
54 u8 device;
55 u8 function;
56};
57
58struct dmar_pci_notify_info {
59 struct pci_dev *dev;
60 unsigned long event;
61 int bus;
62 u16 seg;
63 u16 level;
64 struct dmar_pci_path path[];
65} __attribute__((packed));
66
67extern struct rw_semaphore dmar_global_lock;
68extern struct list_head dmar_drhd_units;
69
70#define for_each_drhd_unit(drhd) \
71 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
72 dmar_rcu_check())
73
74#define for_each_active_drhd_unit(drhd) \
75 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
76 dmar_rcu_check()) \
77 if (drhd->ignored) {} else
78
79#define for_each_active_iommu(i, drhd) \
80 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
81 dmar_rcu_check()) \
82 if (i=drhd->iommu, drhd->ignored) {} else
83
84#define for_each_iommu(i, drhd) \
85 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
86 dmar_rcu_check()) \
87 if (i=drhd->iommu, 0) {} else
88
89static inline bool dmar_rcu_check(void)
90{
91 return rwsem_is_locked(&dmar_global_lock) ||
92 system_state == SYSTEM_BOOTING;
93}
94
95#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
96
97#define for_each_dev_scope(devs, cnt, i, tmp) \
98 for ((i) = 0; ((tmp) = (i) < (cnt) ? \
99 dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \
100 (i)++)
101
102#define for_each_active_dev_scope(devs, cnt, i, tmp) \
103 for_each_dev_scope((devs), (cnt), (i), (tmp)) \
104 if (!(tmp)) { continue; } else
105
106extern int dmar_table_init(void);
107extern int dmar_dev_scope_init(void);
108extern void dmar_register_bus_notifier(void);
109extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
110 struct dmar_dev_scope **devices, u16 segment);
111extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
112extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
113extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
114 void *start, void*end, u16 segment,
115 struct dmar_dev_scope *devices,
116 int devices_cnt);
117extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
118 u16 segment, struct dmar_dev_scope *devices,
119 int count);
120/* Intel IOMMU detection */
121void detect_intel_iommu(void);
122extern int enable_drhd_fault_handling(void);
123extern int dmar_device_add(acpi_handle handle);
124extern int dmar_device_remove(acpi_handle handle);
125
126static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
127{
128 return 0;
129}
130
131#ifdef CONFIG_DMAR_DEBUG
132void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id,
133 unsigned long long addr, u32 pasid);
134#else
135static inline void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id,
136 unsigned long long addr, u32 pasid) {}
137#endif
138
139#ifdef CONFIG_INTEL_IOMMU
140extern int iommu_detected, no_iommu;
141extern int intel_iommu_init(void);
142extern void intel_iommu_shutdown(void);
143extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
144extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
145extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
146extern int dmar_parse_one_satc(struct acpi_dmar_header *hdr, void *arg);
147extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
148extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
149extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
150#else /* !CONFIG_INTEL_IOMMU: */
151static inline int intel_iommu_init(void) { return -ENODEV; }
152static inline void intel_iommu_shutdown(void) { }
153
154#define dmar_parse_one_rmrr dmar_res_noop
155#define dmar_parse_one_atsr dmar_res_noop
156#define dmar_check_one_atsr dmar_res_noop
157#define dmar_release_one_atsr dmar_res_noop
158#define dmar_parse_one_satc dmar_res_noop
159
160static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
161{
162 return 0;
163}
164
165static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
166{
167 return 0;
168}
169#endif /* CONFIG_INTEL_IOMMU */
170
171#ifdef CONFIG_IRQ_REMAP
172extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
173#else /* CONFIG_IRQ_REMAP */
174static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
175{ return 0; }
176#endif /* CONFIG_IRQ_REMAP */
177
178extern bool dmar_platform_optin(void);
179
180#else /* CONFIG_DMAR_TABLE */
181
182static inline int dmar_device_add(void *handle)
183{
184 return 0;
185}
186
187static inline int dmar_device_remove(void *handle)
188{
189 return 0;
190}
191
192static inline bool dmar_platform_optin(void)
193{
194 return false;
195}
196
197static inline void detect_intel_iommu(void)
198{
199}
200
201#endif /* CONFIG_DMAR_TABLE */
202
203struct irte {
204 union {
205 struct {
206 union {
207 /* Shared between remapped and posted mode*/
208 struct {
209 __u64 present : 1, /* 0 */
210 fpd : 1, /* 1 */
211 __res0 : 6, /* 2 - 6 */
212 avail : 4, /* 8 - 11 */
213 __res1 : 3, /* 12 - 14 */
214 pst : 1, /* 15 */
215 vector : 8, /* 16 - 23 */
216 __res2 : 40; /* 24 - 63 */
217 };
218
219 /* Remapped mode */
220 struct {
221 __u64 r_present : 1, /* 0 */
222 r_fpd : 1, /* 1 */
223 dst_mode : 1, /* 2 */
224 redir_hint : 1, /* 3 */
225 trigger_mode : 1, /* 4 */
226 dlvry_mode : 3, /* 5 - 7 */
227 r_avail : 4, /* 8 - 11 */
228 r_res0 : 4, /* 12 - 15 */
229 r_vector : 8, /* 16 - 23 */
230 r_res1 : 8, /* 24 - 31 */
231 dest_id : 32; /* 32 - 63 */
232 };
233
234 /* Posted mode */
235 struct {
236 __u64 p_present : 1, /* 0 */
237 p_fpd : 1, /* 1 */
238 p_res0 : 6, /* 2 - 7 */
239 p_avail : 4, /* 8 - 11 */
240 p_res1 : 2, /* 12 - 13 */
241 p_urgent : 1, /* 14 */
242 p_pst : 1, /* 15 */
243 p_vector : 8, /* 16 - 23 */
244 p_res2 : 14, /* 24 - 37 */
245 pda_l : 26; /* 38 - 63 */
246 };
247 __u64 low;
248 };
249
250 union {
251 /* Shared between remapped and posted mode*/
252 struct {
253 __u64 sid : 16, /* 64 - 79 */
254 sq : 2, /* 80 - 81 */
255 svt : 2, /* 82 - 83 */
256 __res3 : 44; /* 84 - 127 */
257 };
258
259 /* Posted mode*/
260 struct {
261 __u64 p_sid : 16, /* 64 - 79 */
262 p_sq : 2, /* 80 - 81 */
263 p_svt : 2, /* 82 - 83 */
264 p_res3 : 12, /* 84 - 95 */
265 pda_h : 32; /* 96 - 127 */
266 };
267 __u64 high;
268 };
269 };
270#ifdef CONFIG_IRQ_REMAP
271 __u128 irte;
272#endif
273 };
274};
275
276static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
277{
278 dst->present = src->present;
279 dst->fpd = src->fpd;
280 dst->avail = src->avail;
281 dst->pst = src->pst;
282 dst->vector = src->vector;
283 dst->sid = src->sid;
284 dst->sq = src->sq;
285 dst->svt = src->svt;
286}
287
288#define PDA_LOW_BIT 26
289#define PDA_HIGH_BIT 32
290
291/* Can't use the common MSI interrupt functions
292 * since DMAR is not a pci device
293 */
294struct irq_data;
295extern void dmar_msi_unmask(struct irq_data *data);
296extern void dmar_msi_mask(struct irq_data *data);
297extern void dmar_msi_read(int irq, struct msi_msg *msg);
298extern void dmar_msi_write(int irq, struct msi_msg *msg);
299extern int dmar_set_interrupt(struct intel_iommu *iommu);
300extern irqreturn_t dmar_fault(int irq, void *dev_id);
301extern int dmar_alloc_hwirq(int id, int node, void *arg);
302extern void dmar_free_hwirq(int irq);
303
304#endif /* __DMAR_H__ */