Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15#include <linux/aperture.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/mm.h>
21#include <linux/vmalloc.h>
22#include <linux/delay.h>
23#include <linux/of.h>
24#include <linux/of_address.h>
25#include <linux/interrupt.h>
26#include <linux/fb.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
29#include <linux/pci.h>
30#include <linux/platform_device.h>
31#include <asm/io.h>
32
33#ifdef CONFIG_PPC32
34#include <asm/bootx.h>
35#endif
36
37#include "macmodes.h"
38
39/* Supported palette hacks */
40enum {
41 cmap_unknown,
42 cmap_simple, /* ATI Mach64 */
43 cmap_r128, /* ATI Rage128 */
44 cmap_M3A, /* ATI Rage Mobility M3 Head A */
45 cmap_M3B, /* ATI Rage Mobility M3 Head B */
46 cmap_radeon, /* ATI Radeon */
47 cmap_gxt2000, /* IBM GXT2000 */
48 cmap_avivo, /* ATI R5xx */
49 cmap_qemu, /* qemu vga */
50};
51
52struct offb_par {
53 volatile void __iomem *cmap_adr;
54 volatile void __iomem *cmap_data;
55 int cmap_type;
56 int blanked;
57 u32 pseudo_palette[16];
58 resource_size_t base;
59 resource_size_t size;
60};
61
62#ifdef CONFIG_PPC32
63extern boot_infos_t *boot_infos;
64#endif
65
66/* Definitions used by the Avivo palette hack */
67#define AVIVO_DC_LUT_RW_SELECT 0x6480
68#define AVIVO_DC_LUT_RW_MODE 0x6484
69#define AVIVO_DC_LUT_RW_INDEX 0x6488
70#define AVIVO_DC_LUT_SEQ_COLOR 0x648c
71#define AVIVO_DC_LUT_PWL_DATA 0x6490
72#define AVIVO_DC_LUT_30_COLOR 0x6494
73#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
74#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
75#define AVIVO_DC_LUT_AUTOFILL 0x64a0
76
77#define AVIVO_DC_LUTA_CONTROL 0x64c0
78#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
79#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
80#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
81#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
82#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
83#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
84
85#define AVIVO_DC_LUTB_CONTROL 0x6cc0
86#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
87#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
88#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
89#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
90#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
91#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
92
93 /*
94 * Set a single color register. The values supplied are already
95 * rounded down to the hardware's capabilities (according to the
96 * entries in the var structure). Return != 0 for invalid regno.
97 */
98
99static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
100 u_int transp, struct fb_info *info)
101{
102 struct offb_par *par = (struct offb_par *) info->par;
103
104 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
105 u32 *pal = info->pseudo_palette;
106 u32 cr = red >> (16 - info->var.red.length);
107 u32 cg = green >> (16 - info->var.green.length);
108 u32 cb = blue >> (16 - info->var.blue.length);
109 u32 value;
110
111 if (regno >= 16)
112 return -EINVAL;
113
114 value = (cr << info->var.red.offset) |
115 (cg << info->var.green.offset) |
116 (cb << info->var.blue.offset);
117 if (info->var.transp.length > 0) {
118 u32 mask = (1 << info->var.transp.length) - 1;
119 mask <<= info->var.transp.offset;
120 value |= mask;
121 }
122 pal[regno] = value;
123 return 0;
124 }
125
126 if (regno > 255)
127 return -EINVAL;
128
129 red >>= 8;
130 green >>= 8;
131 blue >>= 8;
132
133 if (!par->cmap_adr)
134 return 0;
135
136 switch (par->cmap_type) {
137 case cmap_simple:
138 writeb(regno, par->cmap_adr);
139 writeb(red, par->cmap_data);
140 writeb(green, par->cmap_data);
141 writeb(blue, par->cmap_data);
142 break;
143 case cmap_M3A:
144 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
145 out_le32(par->cmap_adr + 0x58,
146 in_le32(par->cmap_adr + 0x58) & ~0x20);
147 fallthrough;
148 case cmap_r128:
149 /* Set palette index & data */
150 out_8(par->cmap_adr + 0xb0, regno);
151 out_le32(par->cmap_adr + 0xb4,
152 (red << 16 | green << 8 | blue));
153 break;
154 case cmap_M3B:
155 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
156 out_le32(par->cmap_adr + 0x58,
157 in_le32(par->cmap_adr + 0x58) | 0x20);
158 /* Set palette index & data */
159 out_8(par->cmap_adr + 0xb0, regno);
160 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
161 break;
162 case cmap_radeon:
163 /* Set palette index & data (could be smarter) */
164 out_8(par->cmap_adr + 0xb0, regno);
165 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
166 break;
167 case cmap_gxt2000:
168 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
169 (red << 16 | green << 8 | blue));
170 break;
171 case cmap_avivo:
172 /* Write to both LUTs for now */
173 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
174 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
175 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
176 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
177 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
178 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
179 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
180 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
181 break;
182 }
183
184 return 0;
185}
186
187 /*
188 * Blank the display.
189 */
190
191static int offb_blank(int blank, struct fb_info *info)
192{
193 struct offb_par *par = (struct offb_par *) info->par;
194 int i, j;
195
196 if (!par->cmap_adr)
197 return 0;
198
199 if (!par->blanked)
200 if (!blank)
201 return 0;
202
203 par->blanked = blank;
204
205 if (blank)
206 for (i = 0; i < 256; i++) {
207 switch (par->cmap_type) {
208 case cmap_simple:
209 writeb(i, par->cmap_adr);
210 for (j = 0; j < 3; j++)
211 writeb(0, par->cmap_data);
212 break;
213 case cmap_M3A:
214 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
215 out_le32(par->cmap_adr + 0x58,
216 in_le32(par->cmap_adr + 0x58) & ~0x20);
217 fallthrough;
218 case cmap_r128:
219 /* Set palette index & data */
220 out_8(par->cmap_adr + 0xb0, i);
221 out_le32(par->cmap_adr + 0xb4, 0);
222 break;
223 case cmap_M3B:
224 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
225 out_le32(par->cmap_adr + 0x58,
226 in_le32(par->cmap_adr + 0x58) | 0x20);
227 /* Set palette index & data */
228 out_8(par->cmap_adr + 0xb0, i);
229 out_le32(par->cmap_adr + 0xb4, 0);
230 break;
231 case cmap_radeon:
232 out_8(par->cmap_adr + 0xb0, i);
233 out_le32(par->cmap_adr + 0xb4, 0);
234 break;
235 case cmap_gxt2000:
236 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
237 0);
238 break;
239 case cmap_avivo:
240 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
241 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
242 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
243 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
244 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
245 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
246 break;
247 }
248 } else
249 fb_set_cmap(&info->cmap, info);
250 return 0;
251}
252
253static int offb_set_par(struct fb_info *info)
254{
255 struct offb_par *par = (struct offb_par *) info->par;
256
257 /* On avivo, initialize palette control */
258 if (par->cmap_type == cmap_avivo) {
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
260 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
261 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
262 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
263 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
264 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
265 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
267 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
268 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
269 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
270 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
271 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
272 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
273 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
274 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
275 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
276 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
277 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
278 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
279 }
280 return 0;
281}
282
283static void offb_destroy(struct fb_info *info)
284{
285 struct offb_par *par = info->par;
286
287 if (info->screen_base)
288 iounmap(info->screen_base);
289 release_mem_region(par->base, par->size);
290 fb_dealloc_cmap(&info->cmap);
291 framebuffer_release(info);
292}
293
294static const struct fb_ops offb_ops = {
295 .owner = THIS_MODULE,
296 .fb_destroy = offb_destroy,
297 .fb_setcolreg = offb_setcolreg,
298 .fb_set_par = offb_set_par,
299 .fb_blank = offb_blank,
300 .fb_fillrect = cfb_fillrect,
301 .fb_copyarea = cfb_copyarea,
302 .fb_imageblit = cfb_imageblit,
303};
304
305static void __iomem *offb_map_reg(struct device_node *np, int index,
306 unsigned long offset, unsigned long size)
307{
308 const __be32 *addrp;
309 u64 asize, taddr;
310 unsigned int flags;
311
312 addrp = of_get_pci_address(np, index, &asize, &flags);
313 if (addrp == NULL)
314 addrp = of_get_address(np, index, &asize, &flags);
315 if (addrp == NULL)
316 return NULL;
317 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
318 return NULL;
319 if ((offset + size) > asize)
320 return NULL;
321 taddr = of_translate_address(np, addrp);
322 if (taddr == OF_BAD_ADDR)
323 return NULL;
324 return ioremap(taddr + offset, size);
325}
326
327static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
328 unsigned long address)
329{
330 struct offb_par *par = (struct offb_par *) info->par;
331
332 if (of_node_name_prefix(dp, "ATY,Rage128")) {
333 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
334 if (par->cmap_adr)
335 par->cmap_type = cmap_r128;
336 } else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
337 of_node_name_prefix(dp, "ATY,RageM3p12A")) {
338 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
339 if (par->cmap_adr)
340 par->cmap_type = cmap_M3A;
341 } else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
342 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
343 if (par->cmap_adr)
344 par->cmap_type = cmap_M3B;
345 } else if (of_node_name_prefix(dp, "ATY,Rage6")) {
346 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
347 if (par->cmap_adr)
348 par->cmap_type = cmap_radeon;
349 } else if (of_node_name_prefix(dp, "ATY,")) {
350 unsigned long base = address & 0xff000000UL;
351 par->cmap_adr =
352 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
353 par->cmap_data = par->cmap_adr + 1;
354 par->cmap_type = cmap_simple;
355 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
356 of_device_is_compatible(dp, "pci1014,21c"))) {
357 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
358 if (par->cmap_adr)
359 par->cmap_type = cmap_gxt2000;
360 } else if (of_node_name_prefix(dp, "vga,Display-")) {
361 /* Look for AVIVO initialized by SLOF */
362 struct device_node *pciparent = of_get_parent(dp);
363 const u32 *vid, *did;
364 vid = of_get_property(pciparent, "vendor-id", NULL);
365 did = of_get_property(pciparent, "device-id", NULL);
366 /* This will match most R5xx */
367 if (vid && did && *vid == 0x1002 &&
368 ((*did >= 0x7100 && *did < 0x7800) ||
369 (*did >= 0x9400))) {
370 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
371 if (par->cmap_adr)
372 par->cmap_type = cmap_avivo;
373 }
374 of_node_put(pciparent);
375 } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
376#ifdef __BIG_ENDIAN
377 const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
378#else
379 const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
380#endif
381 u64 io_addr = of_translate_address(dp, io_of_addr);
382 if (io_addr != OF_BAD_ADDR) {
383 par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
384 if (par->cmap_adr) {
385 par->cmap_type = cmap_simple;
386 par->cmap_data = par->cmap_adr + 1;
387 }
388 }
389 }
390 info->fix.visual = (par->cmap_type != cmap_unknown) ?
391 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
392}
393
394static void offb_init_fb(struct platform_device *parent, const char *name,
395 int width, int height, int depth,
396 int pitch, unsigned long address,
397 int foreign_endian, struct device_node *dp)
398{
399 unsigned long res_size = pitch * height;
400 unsigned long res_start = address;
401 struct fb_fix_screeninfo *fix;
402 struct fb_var_screeninfo *var;
403 struct fb_info *info;
404 struct offb_par *par;
405
406 if (!request_mem_region(res_start, res_size, "offb"))
407 return;
408
409 printk(KERN_INFO
410 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
411 width, height, name, address, depth, pitch);
412 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
413 printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
414 release_mem_region(res_start, res_size);
415 return;
416 }
417
418 info = framebuffer_alloc(sizeof(*par), &parent->dev);
419 if (!info) {
420 release_mem_region(res_start, res_size);
421 return;
422 }
423 platform_set_drvdata(parent, info);
424 par = info->par;
425 fix = &info->fix;
426 var = &info->var;
427
428 if (name) {
429 strcpy(fix->id, "OFfb ");
430 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
431 fix->id[sizeof(fix->id) - 1] = '\0';
432 } else
433 snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
434
435
436 var->xres = var->xres_virtual = width;
437 var->yres = var->yres_virtual = height;
438 fix->line_length = pitch;
439
440 fix->smem_start = address;
441 fix->smem_len = pitch * height;
442 fix->type = FB_TYPE_PACKED_PIXELS;
443 fix->type_aux = 0;
444
445 par->cmap_type = cmap_unknown;
446 if (depth == 8)
447 offb_init_palette_hacks(info, dp, address);
448 else
449 fix->visual = FB_VISUAL_TRUECOLOR;
450
451 var->xoffset = var->yoffset = 0;
452 switch (depth) {
453 case 8:
454 var->bits_per_pixel = 8;
455 var->red.offset = 0;
456 var->red.length = 8;
457 var->green.offset = 0;
458 var->green.length = 8;
459 var->blue.offset = 0;
460 var->blue.length = 8;
461 var->transp.offset = 0;
462 var->transp.length = 0;
463 break;
464 case 15: /* RGB 555 */
465 var->bits_per_pixel = 16;
466 var->red.offset = 10;
467 var->red.length = 5;
468 var->green.offset = 5;
469 var->green.length = 5;
470 var->blue.offset = 0;
471 var->blue.length = 5;
472 var->transp.offset = 0;
473 var->transp.length = 0;
474 break;
475 case 16: /* RGB 565 */
476 var->bits_per_pixel = 16;
477 var->red.offset = 11;
478 var->red.length = 5;
479 var->green.offset = 5;
480 var->green.length = 6;
481 var->blue.offset = 0;
482 var->blue.length = 5;
483 var->transp.offset = 0;
484 var->transp.length = 0;
485 break;
486 case 32: /* RGB 888 */
487 var->bits_per_pixel = 32;
488 var->red.offset = 16;
489 var->red.length = 8;
490 var->green.offset = 8;
491 var->green.length = 8;
492 var->blue.offset = 0;
493 var->blue.length = 8;
494 var->transp.offset = 24;
495 var->transp.length = 8;
496 break;
497 }
498 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
499 var->transp.msb_right = 0;
500 var->grayscale = 0;
501 var->nonstd = 0;
502 var->activate = 0;
503 var->height = var->width = -1;
504 var->pixclock = 10000;
505 var->left_margin = var->right_margin = 16;
506 var->upper_margin = var->lower_margin = 16;
507 var->hsync_len = var->vsync_len = 8;
508 var->sync = 0;
509 var->vmode = FB_VMODE_NONINTERLACED;
510
511 par->base = address;
512 par->size = fix->smem_len;
513
514 info->fbops = &offb_ops;
515 info->screen_base = ioremap(address, fix->smem_len);
516 info->pseudo_palette = par->pseudo_palette;
517 info->flags = FBINFO_DEFAULT | foreign_endian;
518
519 fb_alloc_cmap(&info->cmap, 256, 0);
520
521 if (devm_aperture_acquire_for_platform_device(parent, par->base, par->size) < 0)
522 goto out_err;
523 if (register_framebuffer(info) < 0)
524 goto out_err;
525
526 fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
527 return;
528
529out_err:
530 fb_dealloc_cmap(&info->cmap);
531 iounmap(info->screen_base);
532 iounmap(par->cmap_adr);
533 par->cmap_adr = NULL;
534 framebuffer_release(info);
535 release_mem_region(res_start, res_size);
536}
537
538
539static void offb_init_nodriver(struct platform_device *parent, struct device_node *dp,
540 int no_real_node)
541{
542 unsigned int len;
543 int i, width = 640, height = 480, depth = 8, pitch = 640;
544 unsigned int flags, rsize, addr_prop = 0;
545 unsigned long max_size = 0;
546 u64 rstart, address = OF_BAD_ADDR;
547 const __be32 *pp, *addrp, *up;
548 u64 asize;
549 int foreign_endian = 0;
550
551#ifdef __BIG_ENDIAN
552 if (of_property_read_bool(dp, "little-endian"))
553 foreign_endian = FBINFO_FOREIGN_ENDIAN;
554#else
555 if (of_property_read_bool(dp, "big-endian"))
556 foreign_endian = FBINFO_FOREIGN_ENDIAN;
557#endif
558
559 pp = of_get_property(dp, "linux,bootx-depth", &len);
560 if (pp == NULL)
561 pp = of_get_property(dp, "depth", &len);
562 if (pp && len == sizeof(u32))
563 depth = be32_to_cpup(pp);
564
565 pp = of_get_property(dp, "linux,bootx-width", &len);
566 if (pp == NULL)
567 pp = of_get_property(dp, "width", &len);
568 if (pp && len == sizeof(u32))
569 width = be32_to_cpup(pp);
570
571 pp = of_get_property(dp, "linux,bootx-height", &len);
572 if (pp == NULL)
573 pp = of_get_property(dp, "height", &len);
574 if (pp && len == sizeof(u32))
575 height = be32_to_cpup(pp);
576
577 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
578 if (pp == NULL)
579 pp = of_get_property(dp, "linebytes", &len);
580 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
581 pitch = be32_to_cpup(pp);
582 else
583 pitch = width * ((depth + 7) / 8);
584
585 rsize = (unsigned long)pitch * (unsigned long)height;
586
587 /* Ok, now we try to figure out the address of the framebuffer.
588 *
589 * Unfortunately, Open Firmware doesn't provide a standard way to do
590 * so. All we can do is a dodgy heuristic that happens to work in
591 * practice. On most machines, the "address" property contains what
592 * we need, though not on Matrox cards found in IBM machines. What I've
593 * found that appears to give good results is to go through the PCI
594 * ranges and pick one that is both big enough and if possible encloses
595 * the "address" property. If none match, we pick the biggest
596 */
597 up = of_get_property(dp, "linux,bootx-addr", &len);
598 if (up == NULL)
599 up = of_get_property(dp, "address", &len);
600 if (up && len == sizeof(u32))
601 addr_prop = *up;
602
603 /* Hack for when BootX is passing us */
604 if (no_real_node)
605 goto skip_addr;
606
607 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
608 != NULL; i++) {
609 int match_addrp = 0;
610
611 if (!(flags & IORESOURCE_MEM))
612 continue;
613 if (asize < rsize)
614 continue;
615 rstart = of_translate_address(dp, addrp);
616 if (rstart == OF_BAD_ADDR)
617 continue;
618 if (addr_prop && (rstart <= addr_prop) &&
619 ((rstart + asize) >= (addr_prop + rsize)))
620 match_addrp = 1;
621 if (match_addrp) {
622 address = addr_prop;
623 break;
624 }
625 if (rsize > max_size) {
626 max_size = rsize;
627 address = OF_BAD_ADDR;
628 }
629
630 if (address == OF_BAD_ADDR)
631 address = rstart;
632 }
633 skip_addr:
634 if (address == OF_BAD_ADDR && addr_prop)
635 address = (u64)addr_prop;
636 if (address != OF_BAD_ADDR) {
637#ifdef CONFIG_PCI
638 const __be32 *vidp, *didp;
639 u32 vid, did;
640 struct pci_dev *pdev;
641
642 vidp = of_get_property(dp, "vendor-id", NULL);
643 didp = of_get_property(dp, "device-id", NULL);
644 if (vidp && didp) {
645 vid = be32_to_cpup(vidp);
646 did = be32_to_cpup(didp);
647 pdev = pci_get_device(vid, did, NULL);
648 if (!pdev || pci_enable_device(pdev))
649 return;
650 }
651#endif
652 /* kludge for valkyrie */
653 if (of_node_name_eq(dp, "valkyrie"))
654 address += 0x1000;
655 offb_init_fb(parent, no_real_node ? "bootx" : NULL,
656 width, height, depth, pitch, address,
657 foreign_endian, no_real_node ? NULL : dp);
658 }
659}
660
661static void offb_remove(struct platform_device *pdev)
662{
663 struct fb_info *info = platform_get_drvdata(pdev);
664
665 if (info)
666 unregister_framebuffer(info);
667}
668
669static int offb_probe_bootx_noscreen(struct platform_device *pdev)
670{
671 offb_init_nodriver(pdev, of_chosen, 1);
672
673 return 0;
674}
675
676static struct platform_driver offb_driver_bootx_noscreen = {
677 .driver = {
678 .name = "bootx-noscreen",
679 },
680 .probe = offb_probe_bootx_noscreen,
681 .remove_new = offb_remove,
682};
683
684static int offb_probe_display(struct platform_device *pdev)
685{
686 offb_init_nodriver(pdev, pdev->dev.of_node, 0);
687
688 return 0;
689}
690
691static const struct of_device_id offb_of_match_display[] = {
692 { .compatible = "display", },
693 { },
694};
695MODULE_DEVICE_TABLE(of, offb_of_match_display);
696
697static struct platform_driver offb_driver_display = {
698 .driver = {
699 .name = "of-display",
700 .of_match_table = offb_of_match_display,
701 },
702 .probe = offb_probe_display,
703 .remove_new = offb_remove,
704};
705
706static int __init offb_init(void)
707{
708 if (fb_get_options("offb", NULL))
709 return -ENODEV;
710
711 platform_driver_register(&offb_driver_bootx_noscreen);
712 platform_driver_register(&offb_driver_display);
713
714 return 0;
715}
716module_init(offb_init);
717
718static void __exit offb_exit(void)
719{
720 platform_driver_unregister(&offb_driver_display);
721 platform_driver_unregister(&offb_driver_bootx_noscreen);
722}
723module_exit(offb_exit);
724
725MODULE_LICENSE("GPL");