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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 1994 Linus Torvalds
4 *
5 * Pentium III FXSR, SSE support
6 * General FPU state handling cleanups
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 * x86-64 work by Andi Kleen 2002
9 */
10
11#ifndef _ASM_X86_FPU_API_H
12#define _ASM_X86_FPU_API_H
13#include <linux/bottom_half.h>
14
15#include <asm/fpu/types.h>
16
17/*
18 * Use kernel_fpu_begin/end() if you intend to use FPU in kernel context. It
19 * disables preemption so be careful if you intend to use it for long periods
20 * of time.
21 * If you intend to use the FPU in irq/softirq you need to check first with
22 * irq_fpu_usable() if it is possible.
23 */
24
25/* Kernel FPU states to initialize in kernel_fpu_begin_mask() */
26#define KFPU_387 _BITUL(0) /* 387 state will be initialized */
27#define KFPU_MXCSR _BITUL(1) /* MXCSR will be initialized */
28
29extern void kernel_fpu_begin_mask(unsigned int kfpu_mask);
30extern void kernel_fpu_end(void);
31extern bool irq_fpu_usable(void);
32extern void fpregs_mark_activate(void);
33
34/* Code that is unaware of kernel_fpu_begin_mask() can use this */
35static inline void kernel_fpu_begin(void)
36{
37#ifdef CONFIG_X86_64
38 /*
39 * Any 64-bit code that uses 387 instructions must explicitly request
40 * KFPU_387.
41 */
42 kernel_fpu_begin_mask(KFPU_MXCSR);
43#else
44 /*
45 * 32-bit kernel code may use 387 operations as well as SSE2, etc,
46 * as long as it checks that the CPU has the required capability.
47 */
48 kernel_fpu_begin_mask(KFPU_387 | KFPU_MXCSR);
49#endif
50}
51
52/*
53 * Use fpregs_lock() while editing CPU's FPU registers or fpu->fpstate.
54 * A context switch will (and softirq might) save CPU's FPU registers to
55 * fpu->fpstate.regs and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
56 * a random state.
57 *
58 * local_bh_disable() protects against both preemption and soft interrupts
59 * on !RT kernels.
60 *
61 * On RT kernels local_bh_disable() is not sufficient because it only
62 * serializes soft interrupt related sections via a local lock, but stays
63 * preemptible. Disabling preemption is the right choice here as bottom
64 * half processing is always in thread context on RT kernels so it
65 * implicitly prevents bottom half processing as well.
66 *
67 * Disabling preemption also serializes against kernel_fpu_begin().
68 */
69static inline void fpregs_lock(void)
70{
71 if (!IS_ENABLED(CONFIG_PREEMPT_RT))
72 local_bh_disable();
73 else
74 preempt_disable();
75}
76
77static inline void fpregs_unlock(void)
78{
79 if (!IS_ENABLED(CONFIG_PREEMPT_RT))
80 local_bh_enable();
81 else
82 preempt_enable();
83}
84
85#ifdef CONFIG_X86_DEBUG_FPU
86extern void fpregs_assert_state_consistent(void);
87#else
88static inline void fpregs_assert_state_consistent(void) { }
89#endif
90
91/*
92 * Load the task FPU state before returning to userspace.
93 */
94extern void switch_fpu_return(void);
95
96/*
97 * Query the presence of one or more xfeatures. Works on any legacy CPU as well.
98 *
99 * If 'feature_name' is set then put a human-readable description of
100 * the feature there as well - this can be used to print error (or success)
101 * messages.
102 */
103extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name);
104
105/* Trap handling */
106extern int fpu__exception_code(struct fpu *fpu, int trap_nr);
107extern void fpu_sync_fpstate(struct fpu *fpu);
108extern void fpu_reset_from_exception_fixup(void);
109
110/* Boot, hotplug and resume */
111extern void fpu__init_cpu(void);
112extern void fpu__init_system(void);
113extern void fpu__init_check_bugs(void);
114extern void fpu__resume_cpu(void);
115
116#ifdef CONFIG_MATH_EMULATION
117extern void fpstate_init_soft(struct swregs_state *soft);
118#else
119static inline void fpstate_init_soft(struct swregs_state *soft) {}
120#endif
121
122/* State tracking */
123DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
124
125/* Process cleanup */
126#ifdef CONFIG_X86_64
127extern void fpstate_free(struct fpu *fpu);
128#else
129static inline void fpstate_free(struct fpu *fpu) { }
130#endif
131
132/* fpstate-related functions which are exported to KVM */
133extern void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature);
134
135extern u64 xstate_get_guest_group_perm(void);
136
137/* KVM specific functions */
138extern bool fpu_alloc_guest_fpstate(struct fpu_guest *gfpu);
139extern void fpu_free_guest_fpstate(struct fpu_guest *gfpu);
140extern int fpu_swap_kvm_fpstate(struct fpu_guest *gfpu, bool enter_guest);
141extern int fpu_enable_guest_xfd_features(struct fpu_guest *guest_fpu, u64 xfeatures);
142
143#ifdef CONFIG_X86_64
144extern void fpu_update_guest_xfd(struct fpu_guest *guest_fpu, u64 xfd);
145extern void fpu_sync_guest_vmexit_xfd_state(void);
146#else
147static inline void fpu_update_guest_xfd(struct fpu_guest *guest_fpu, u64 xfd) { }
148static inline void fpu_sync_guest_vmexit_xfd_state(void) { }
149#endif
150
151extern void fpu_copy_guest_fpstate_to_uabi(struct fpu_guest *gfpu, void *buf, unsigned int size, u32 pkru);
152extern int fpu_copy_uabi_to_guest_fpstate(struct fpu_guest *gfpu, const void *buf, u64 xcr0, u32 *vpkru);
153
154static inline void fpstate_set_confidential(struct fpu_guest *gfpu)
155{
156 gfpu->fpstate->is_confidential = true;
157}
158
159static inline bool fpstate_is_confidential(struct fpu_guest *gfpu)
160{
161 return gfpu->fpstate->is_confidential;
162}
163
164/* prctl */
165extern long fpu_xstate_prctl(int option, unsigned long arg2);
166
167extern void fpu_idle_fpregs(void);
168
169#endif /* _ASM_X86_FPU_API_H */