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1/* SPDX-License-Identifier: GPL-2.0 */ 2 3/* 4 * This file contains definitions from Hyper-V Hypervisor Top-Level Functional 5 * Specification (TLFS): 6 * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs 7 */ 8 9#ifndef _ASM_GENERIC_HYPERV_TLFS_H 10#define _ASM_GENERIC_HYPERV_TLFS_H 11 12#include <linux/types.h> 13#include <linux/bits.h> 14#include <linux/time64.h> 15 16/* 17 * While not explicitly listed in the TLFS, Hyper-V always runs with a page size 18 * of 4096. These definitions are used when communicating with Hyper-V using 19 * guest physical pages and guest physical page addresses, since the guest page 20 * size may not be 4096 on all architectures. 21 */ 22#define HV_HYP_PAGE_SHIFT 12 23#define HV_HYP_PAGE_SIZE BIT(HV_HYP_PAGE_SHIFT) 24#define HV_HYP_PAGE_MASK (~(HV_HYP_PAGE_SIZE - 1)) 25 26/* 27 * Hyper-V provides two categories of flags relevant to guest VMs. The 28 * "Features" category indicates specific functionality that is available 29 * to guests on this particular instance of Hyper-V. The "Features" 30 * are presented in four groups, each of which is 32 bits. The group A 31 * and B definitions are common across architectures and are listed here. 32 * However, not all flags are relevant on all architectures. 33 * 34 * Groups C and D vary across architectures and are listed in the 35 * architecture specific portion of hyperv-tlfs.h. Some of these flags exist 36 * on multiple architectures, but the bit positions are different so they 37 * cannot appear in the generic portion of hyperv-tlfs.h. 38 * 39 * The "Enlightenments" category provides recommendations on whether to use 40 * specific enlightenments that are available. The Enlighenments are a single 41 * group of 32 bits, but they vary across architectures and are listed in 42 * the architecture specific portion of hyperv-tlfs.h. 43 */ 44 45/* 46 * Group A Features. 47 */ 48 49/* VP Runtime register available */ 50#define HV_MSR_VP_RUNTIME_AVAILABLE BIT(0) 51/* Partition Reference Counter available*/ 52#define HV_MSR_TIME_REF_COUNT_AVAILABLE BIT(1) 53/* Basic SynIC register available */ 54#define HV_MSR_SYNIC_AVAILABLE BIT(2) 55/* Synthetic Timer registers available */ 56#define HV_MSR_SYNTIMER_AVAILABLE BIT(3) 57/* Virtual APIC assist and VP assist page registers available */ 58#define HV_MSR_APIC_ACCESS_AVAILABLE BIT(4) 59/* Hypercall and Guest OS ID registers available*/ 60#define HV_MSR_HYPERCALL_AVAILABLE BIT(5) 61/* Access virtual processor index register available*/ 62#define HV_MSR_VP_INDEX_AVAILABLE BIT(6) 63/* Virtual system reset register available*/ 64#define HV_MSR_RESET_AVAILABLE BIT(7) 65/* Access statistics page registers available */ 66#define HV_MSR_STAT_PAGES_AVAILABLE BIT(8) 67/* Partition reference TSC register is available */ 68#define HV_MSR_REFERENCE_TSC_AVAILABLE BIT(9) 69/* Partition Guest IDLE register is available */ 70#define HV_MSR_GUEST_IDLE_AVAILABLE BIT(10) 71/* Partition local APIC and TSC frequency registers available */ 72#define HV_ACCESS_FREQUENCY_MSRS BIT(11) 73/* AccessReenlightenmentControls privilege */ 74#define HV_ACCESS_REENLIGHTENMENT BIT(13) 75/* AccessTscInvariantControls privilege */ 76#define HV_ACCESS_TSC_INVARIANT BIT(15) 77 78/* 79 * Group B features. 80 */ 81#define HV_CREATE_PARTITIONS BIT(0) 82#define HV_ACCESS_PARTITION_ID BIT(1) 83#define HV_ACCESS_MEMORY_POOL BIT(2) 84#define HV_ADJUST_MESSAGE_BUFFERS BIT(3) 85#define HV_POST_MESSAGES BIT(4) 86#define HV_SIGNAL_EVENTS BIT(5) 87#define HV_CREATE_PORT BIT(6) 88#define HV_CONNECT_PORT BIT(7) 89#define HV_ACCESS_STATS BIT(8) 90#define HV_DEBUGGING BIT(11) 91#define HV_CPU_MANAGEMENT BIT(12) 92#define HV_ENABLE_EXTENDED_HYPERCALLS BIT(20) 93#define HV_ISOLATION BIT(22) 94 95/* 96 * TSC page layout. 97 */ 98struct ms_hyperv_tsc_page { 99 volatile u32 tsc_sequence; 100 u32 reserved1; 101 volatile u64 tsc_scale; 102 volatile s64 tsc_offset; 103} __packed; 104 105union hv_reference_tsc_msr { 106 u64 as_uint64; 107 struct { 108 u64 enable:1; 109 u64 reserved:11; 110 u64 pfn:52; 111 } __packed; 112}; 113 114/* 115 * The guest OS needs to register the guest ID with the hypervisor. 116 * The guest ID is a 64 bit entity and the structure of this ID is 117 * specified in the Hyper-V specification: 118 * 119 * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx 120 * 121 * While the current guideline does not specify how Linux guest ID(s) 122 * need to be generated, our plan is to publish the guidelines for 123 * Linux and other guest operating systems that currently are hosted 124 * on Hyper-V. The implementation here conforms to this yet 125 * unpublished guidelines. 126 * 127 * 128 * Bit(s) 129 * 63 - Indicates if the OS is Open Source or not; 1 is Open Source 130 * 62:56 - Os Type; Linux is 0x100 131 * 55:48 - Distro specific identification 132 * 47:16 - Linux kernel version number 133 * 15:0 - Distro specific identification 134 * 135 * 136 */ 137 138#define HV_LINUX_VENDOR_ID 0x8100 139 140/* 141 * Crash notification flags. 142 */ 143#define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62) 144#define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63) 145 146/* Declare the various hypercall operations. */ 147#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 148#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 149#define HVCALL_ENABLE_VP_VTL 0x000f 150#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 151#define HVCALL_SEND_IPI 0x000b 152#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 153#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 154#define HVCALL_SEND_IPI_EX 0x0015 155#define HVCALL_GET_PARTITION_ID 0x0046 156#define HVCALL_DEPOSIT_MEMORY 0x0048 157#define HVCALL_CREATE_VP 0x004e 158#define HVCALL_GET_VP_REGISTERS 0x0050 159#define HVCALL_SET_VP_REGISTERS 0x0051 160#define HVCALL_POST_MESSAGE 0x005c 161#define HVCALL_SIGNAL_EVENT 0x005d 162#define HVCALL_POST_DEBUG_DATA 0x0069 163#define HVCALL_RETRIEVE_DEBUG_DATA 0x006a 164#define HVCALL_RESET_DEBUG_SESSION 0x006b 165#define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076 166#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c 167#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d 168#define HVCALL_RETARGET_INTERRUPT 0x007e 169#define HVCALL_START_VP 0x0099 170#define HVCALL_GET_VP_ID_FROM_APIC_ID 0x009a 171#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af 172#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0 173#define HVCALL_MODIFY_SPARSE_GPA_PAGE_HOST_VISIBILITY 0x00db 174#define HVCALL_MMIO_READ 0x0106 175#define HVCALL_MMIO_WRITE 0x0107 176 177/* Extended hypercalls */ 178#define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001 179#define HV_EXT_CALL_MEMORY_HEAT_HINT 0x8003 180 181#define HV_FLUSH_ALL_PROCESSORS BIT(0) 182#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) 183#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) 184#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) 185 186/* Extended capability bits */ 187#define HV_EXT_CAPABILITY_MEMORY_COLD_DISCARD_HINT BIT(8) 188 189enum HV_GENERIC_SET_FORMAT { 190 HV_GENERIC_SET_SPARSE_4K, 191 HV_GENERIC_SET_ALL, 192}; 193 194#define HV_PARTITION_ID_SELF ((u64)-1) 195#define HV_VP_INDEX_SELF ((u32)-2) 196 197#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0) 198#define HV_HYPERCALL_FAST_BIT BIT(16) 199#define HV_HYPERCALL_VARHEAD_OFFSET 17 200#define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17) 201#define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27) 202#define HV_HYPERCALL_NESTED BIT_ULL(31) 203#define HV_HYPERCALL_REP_COMP_OFFSET 32 204#define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32) 205#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32) 206#define HV_HYPERCALL_RSVD1_MASK GENMASK_ULL(47, 44) 207#define HV_HYPERCALL_REP_START_OFFSET 48 208#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48) 209#define HV_HYPERCALL_RSVD2_MASK GENMASK_ULL(63, 60) 210#define HV_HYPERCALL_RSVD_MASK (HV_HYPERCALL_RSVD0_MASK | \ 211 HV_HYPERCALL_RSVD1_MASK | \ 212 HV_HYPERCALL_RSVD2_MASK) 213 214/* hypercall status code */ 215#define HV_STATUS_SUCCESS 0 216#define HV_STATUS_INVALID_HYPERCALL_CODE 2 217#define HV_STATUS_INVALID_HYPERCALL_INPUT 3 218#define HV_STATUS_INVALID_ALIGNMENT 4 219#define HV_STATUS_INVALID_PARAMETER 5 220#define HV_STATUS_ACCESS_DENIED 6 221#define HV_STATUS_OPERATION_DENIED 8 222#define HV_STATUS_INSUFFICIENT_MEMORY 11 223#define HV_STATUS_INVALID_PORT_ID 17 224#define HV_STATUS_INVALID_CONNECTION_ID 18 225#define HV_STATUS_INSUFFICIENT_BUFFERS 19 226#define HV_STATUS_VTL_ALREADY_ENABLED 134 227 228/* 229 * The Hyper-V TimeRefCount register and the TSC 230 * page provide a guest VM clock with 100ns tick rate 231 */ 232#define HV_CLOCK_HZ (NSEC_PER_SEC/100) 233 234/* Define the number of synthetic interrupt sources. */ 235#define HV_SYNIC_SINT_COUNT (16) 236/* Define the expected SynIC version. */ 237#define HV_SYNIC_VERSION_1 (0x1) 238/* Valid SynIC vectors are 16-255. */ 239#define HV_SYNIC_FIRST_VALID_VECTOR (16) 240 241#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0) 242#define HV_SYNIC_SIMP_ENABLE (1ULL << 0) 243#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0) 244#define HV_SYNIC_SINT_MASKED (1ULL << 16) 245#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17) 246#define HV_SYNIC_SINT_VECTOR_MASK (0xFF) 247 248#define HV_SYNIC_STIMER_COUNT (4) 249 250/* Define synthetic interrupt controller message constants. */ 251#define HV_MESSAGE_SIZE (256) 252#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240) 253#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30) 254 255/* 256 * Define hypervisor message types. Some of the message types 257 * are x86/x64 specific, but there's no good way to separate 258 * them out into the arch-specific version of hyperv-tlfs.h 259 * because C doesn't provide a way to extend enum types. 260 * Keeping them all in the arch neutral hyperv-tlfs.h seems 261 * the least messy compromise. 262 */ 263enum hv_message_type { 264 HVMSG_NONE = 0x00000000, 265 266 /* Memory access messages. */ 267 HVMSG_UNMAPPED_GPA = 0x80000000, 268 HVMSG_GPA_INTERCEPT = 0x80000001, 269 270 /* Timer notification messages. */ 271 HVMSG_TIMER_EXPIRED = 0x80000010, 272 273 /* Error messages. */ 274 HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020, 275 HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021, 276 HVMSG_UNSUPPORTED_FEATURE = 0x80000022, 277 278 /* Trace buffer complete messages. */ 279 HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040, 280 281 /* Platform-specific processor intercept messages. */ 282 HVMSG_X64_IOPORT_INTERCEPT = 0x80010000, 283 HVMSG_X64_MSR_INTERCEPT = 0x80010001, 284 HVMSG_X64_CPUID_INTERCEPT = 0x80010002, 285 HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003, 286 HVMSG_X64_APIC_EOI = 0x80010004, 287 HVMSG_X64_LEGACY_FP_ERROR = 0x80010005 288}; 289 290/* Define synthetic interrupt controller message flags. */ 291union hv_message_flags { 292 __u8 asu8; 293 struct { 294 __u8 msg_pending:1; 295 __u8 reserved:7; 296 } __packed; 297}; 298 299/* Define port identifier type. */ 300union hv_port_id { 301 __u32 asu32; 302 struct { 303 __u32 id:24; 304 __u32 reserved:8; 305 } __packed u; 306}; 307 308/* Define synthetic interrupt controller message header. */ 309struct hv_message_header { 310 __u32 message_type; 311 __u8 payload_size; 312 union hv_message_flags message_flags; 313 __u8 reserved[2]; 314 union { 315 __u64 sender; 316 union hv_port_id port; 317 }; 318} __packed; 319 320/* Define synthetic interrupt controller message format. */ 321struct hv_message { 322 struct hv_message_header header; 323 union { 324 __u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT]; 325 } u; 326} __packed; 327 328/* Define the synthetic interrupt message page layout. */ 329struct hv_message_page { 330 struct hv_message sint_message[HV_SYNIC_SINT_COUNT]; 331} __packed; 332 333/* Define timer message payload structure. */ 334struct hv_timer_message_payload { 335 __u32 timer_index; 336 __u32 reserved; 337 __u64 expiration_time; /* When the timer expired */ 338 __u64 delivery_time; /* When the message was delivered */ 339} __packed; 340 341 342/* Define synthetic interrupt controller flag constants. */ 343#define HV_EVENT_FLAGS_COUNT (256 * 8) 344#define HV_EVENT_FLAGS_LONG_COUNT (256 / sizeof(unsigned long)) 345 346/* 347 * Synthetic timer configuration. 348 */ 349union hv_stimer_config { 350 u64 as_uint64; 351 struct { 352 u64 enable:1; 353 u64 periodic:1; 354 u64 lazy:1; 355 u64 auto_enable:1; 356 u64 apic_vector:8; 357 u64 direct_mode:1; 358 u64 reserved_z0:3; 359 u64 sintx:4; 360 u64 reserved_z1:44; 361 } __packed; 362}; 363 364 365/* Define the synthetic interrupt controller event flags format. */ 366union hv_synic_event_flags { 367 unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT]; 368}; 369 370/* Define SynIC control register. */ 371union hv_synic_scontrol { 372 u64 as_uint64; 373 struct { 374 u64 enable:1; 375 u64 reserved:63; 376 } __packed; 377}; 378 379/* Define synthetic interrupt source. */ 380union hv_synic_sint { 381 u64 as_uint64; 382 struct { 383 u64 vector:8; 384 u64 reserved1:8; 385 u64 masked:1; 386 u64 auto_eoi:1; 387 u64 polling:1; 388 u64 reserved2:45; 389 } __packed; 390}; 391 392/* Define the format of the SIMP register */ 393union hv_synic_simp { 394 u64 as_uint64; 395 struct { 396 u64 simp_enabled:1; 397 u64 preserved:11; 398 u64 base_simp_gpa:52; 399 } __packed; 400}; 401 402/* Define the format of the SIEFP register */ 403union hv_synic_siefp { 404 u64 as_uint64; 405 struct { 406 u64 siefp_enabled:1; 407 u64 preserved:11; 408 u64 base_siefp_gpa:52; 409 } __packed; 410}; 411 412struct hv_vpset { 413 u64 format; 414 u64 valid_bank_mask; 415 u64 bank_contents[]; 416} __packed; 417 418/* The maximum number of sparse vCPU banks which can be encoded by 'struct hv_vpset' */ 419#define HV_MAX_SPARSE_VCPU_BANKS (64) 420/* The number of vCPUs in one sparse bank */ 421#define HV_VCPUS_PER_SPARSE_BANK (64) 422 423/* HvCallSendSyntheticClusterIpi hypercall */ 424struct hv_send_ipi { 425 u32 vector; 426 u32 reserved; 427 u64 cpu_mask; 428} __packed; 429 430/* HvCallSendSyntheticClusterIpiEx hypercall */ 431struct hv_send_ipi_ex { 432 u32 vector; 433 u32 reserved; 434 struct hv_vpset vp_set; 435} __packed; 436 437/* HvFlushGuestPhysicalAddressSpace hypercalls */ 438struct hv_guest_mapping_flush { 439 u64 address_space; 440 u64 flags; 441} __packed; 442 443/* 444 * HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited 445 * by the bitwidth of "additional_pages" in union hv_gpa_page_range. 446 */ 447#define HV_MAX_FLUSH_PAGES (2048) 448#define HV_GPA_PAGE_RANGE_PAGE_SIZE_2MB 0 449#define HV_GPA_PAGE_RANGE_PAGE_SIZE_1GB 1 450 451/* HvFlushGuestPhysicalAddressList, HvExtCallMemoryHeatHint hypercall */ 452union hv_gpa_page_range { 453 u64 address_space; 454 struct { 455 u64 additional_pages:11; 456 u64 largepage:1; 457 u64 basepfn:52; 458 } page; 459 struct { 460 u64 reserved:12; 461 u64 page_size:1; 462 u64 reserved1:8; 463 u64 base_large_pfn:43; 464 }; 465}; 466 467/* 468 * All input flush parameters should be in single page. The max flush 469 * count is equal with how many entries of union hv_gpa_page_range can 470 * be populated into the input parameter page. 471 */ 472#define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) / \ 473 sizeof(union hv_gpa_page_range)) 474 475struct hv_guest_mapping_flush_list { 476 u64 address_space; 477 u64 flags; 478 union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT]; 479}; 480 481/* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */ 482struct hv_tlb_flush { 483 u64 address_space; 484 u64 flags; 485 u64 processor_mask; 486 u64 gva_list[]; 487} __packed; 488 489/* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */ 490struct hv_tlb_flush_ex { 491 u64 address_space; 492 u64 flags; 493 struct hv_vpset hv_vp_set; 494 u64 gva_list[]; 495} __packed; 496 497/* HvGetPartitionId hypercall (output only) */ 498struct hv_get_partition_id { 499 u64 partition_id; 500} __packed; 501 502/* HvDepositMemory hypercall */ 503struct hv_deposit_memory { 504 u64 partition_id; 505 u64 gpa_page_list[]; 506} __packed; 507 508struct hv_proximity_domain_flags { 509 u32 proximity_preferred : 1; 510 u32 reserved : 30; 511 u32 proximity_info_valid : 1; 512} __packed; 513 514/* Not a union in windows but useful for zeroing */ 515union hv_proximity_domain_info { 516 struct { 517 u32 domain_id; 518 struct hv_proximity_domain_flags flags; 519 }; 520 u64 as_uint64; 521} __packed; 522 523struct hv_lp_startup_status { 524 u64 hv_status; 525 u64 substatus1; 526 u64 substatus2; 527 u64 substatus3; 528 u64 substatus4; 529 u64 substatus5; 530 u64 substatus6; 531} __packed; 532 533/* HvAddLogicalProcessor hypercall */ 534struct hv_add_logical_processor_in { 535 u32 lp_index; 536 u32 apic_id; 537 union hv_proximity_domain_info proximity_domain_info; 538 u64 flags; 539} __packed; 540 541struct hv_add_logical_processor_out { 542 struct hv_lp_startup_status startup_status; 543} __packed; 544 545enum HV_SUBNODE_TYPE 546{ 547 HvSubnodeAny = 0, 548 HvSubnodeSocket = 1, 549 HvSubnodeAmdNode = 2, 550 HvSubnodeL3 = 3, 551 HvSubnodeCount = 4, 552 HvSubnodeInvalid = -1 553}; 554 555/* HvCreateVp hypercall */ 556struct hv_create_vp { 557 u64 partition_id; 558 u32 vp_index; 559 u8 padding[3]; 560 u8 subnode_type; 561 u64 subnode_id; 562 union hv_proximity_domain_info proximity_domain_info; 563 u64 flags; 564} __packed; 565 566enum hv_interrupt_source { 567 HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */ 568 HV_INTERRUPT_SOURCE_IOAPIC, 569}; 570 571union hv_ioapic_rte { 572 u64 as_uint64; 573 574 struct { 575 u32 vector:8; 576 u32 delivery_mode:3; 577 u32 destination_mode:1; 578 u32 delivery_status:1; 579 u32 interrupt_polarity:1; 580 u32 remote_irr:1; 581 u32 trigger_mode:1; 582 u32 interrupt_mask:1; 583 u32 reserved1:15; 584 585 u32 reserved2:24; 586 u32 destination_id:8; 587 }; 588 589 struct { 590 u32 low_uint32; 591 u32 high_uint32; 592 }; 593} __packed; 594 595struct hv_interrupt_entry { 596 u32 source; 597 u32 reserved1; 598 union { 599 union hv_msi_entry msi_entry; 600 union hv_ioapic_rte ioapic_rte; 601 }; 602} __packed; 603 604/* 605 * flags for hv_device_interrupt_target.flags 606 */ 607#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1 608#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2 609 610struct hv_device_interrupt_target { 611 u32 vector; 612 u32 flags; 613 union { 614 u64 vp_mask; 615 struct hv_vpset vp_set; 616 }; 617} __packed; 618 619struct hv_retarget_device_interrupt { 620 u64 partition_id; /* use "self" */ 621 u64 device_id; 622 struct hv_interrupt_entry int_entry; 623 u64 reserved2; 624 struct hv_device_interrupt_target int_target; 625} __packed __aligned(8); 626 627 628/* HvGetVpRegisters hypercall input with variable size reg name list*/ 629struct hv_get_vp_registers_input { 630 struct { 631 u64 partitionid; 632 u32 vpindex; 633 u8 inputvtl; 634 u8 padding[3]; 635 } header; 636 struct input { 637 u32 name0; 638 u32 name1; 639 } element[]; 640} __packed; 641 642 643/* HvGetVpRegisters returns an array of these output elements */ 644struct hv_get_vp_registers_output { 645 union { 646 struct { 647 u32 a; 648 u32 b; 649 u32 c; 650 u32 d; 651 } as32 __packed; 652 struct { 653 u64 low; 654 u64 high; 655 } as64 __packed; 656 }; 657}; 658 659/* HvSetVpRegisters hypercall with variable size reg name/value list*/ 660struct hv_set_vp_registers_input { 661 struct { 662 u64 partitionid; 663 u32 vpindex; 664 u8 inputvtl; 665 u8 padding[3]; 666 } header; 667 struct { 668 u32 name; 669 u32 padding1; 670 u64 padding2; 671 u64 valuelow; 672 u64 valuehigh; 673 } element[]; 674} __packed; 675 676enum hv_device_type { 677 HV_DEVICE_TYPE_LOGICAL = 0, 678 HV_DEVICE_TYPE_PCI = 1, 679 HV_DEVICE_TYPE_IOAPIC = 2, 680 HV_DEVICE_TYPE_ACPI = 3, 681}; 682 683typedef u16 hv_pci_rid; 684typedef u16 hv_pci_segment; 685typedef u64 hv_logical_device_id; 686union hv_pci_bdf { 687 u16 as_uint16; 688 689 struct { 690 u8 function:3; 691 u8 device:5; 692 u8 bus; 693 }; 694} __packed; 695 696union hv_pci_bus_range { 697 u16 as_uint16; 698 699 struct { 700 u8 subordinate_bus; 701 u8 secondary_bus; 702 }; 703} __packed; 704 705union hv_device_id { 706 u64 as_uint64; 707 708 struct { 709 u64 reserved0:62; 710 u64 device_type:2; 711 }; 712 713 /* HV_DEVICE_TYPE_LOGICAL */ 714 struct { 715 u64 id:62; 716 u64 device_type:2; 717 } logical; 718 719 /* HV_DEVICE_TYPE_PCI */ 720 struct { 721 union { 722 hv_pci_rid rid; 723 union hv_pci_bdf bdf; 724 }; 725 726 hv_pci_segment segment; 727 union hv_pci_bus_range shadow_bus_range; 728 729 u16 phantom_function_bits:2; 730 u16 source_shadow:1; 731 732 u16 rsvdz0:11; 733 u16 device_type:2; 734 } pci; 735 736 /* HV_DEVICE_TYPE_IOAPIC */ 737 struct { 738 u8 ioapic_id; 739 u8 rsvdz0; 740 u16 rsvdz1; 741 u16 rsvdz2; 742 743 u16 rsvdz3:14; 744 u16 device_type:2; 745 } ioapic; 746 747 /* HV_DEVICE_TYPE_ACPI */ 748 struct { 749 u32 input_mapping_base; 750 u32 input_mapping_count:30; 751 u32 device_type:2; 752 } acpi; 753} __packed; 754 755enum hv_interrupt_trigger_mode { 756 HV_INTERRUPT_TRIGGER_MODE_EDGE = 0, 757 HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1, 758}; 759 760struct hv_device_interrupt_descriptor { 761 u32 interrupt_type; 762 u32 trigger_mode; 763 u32 vector_count; 764 u32 reserved; 765 struct hv_device_interrupt_target target; 766} __packed; 767 768struct hv_input_map_device_interrupt { 769 u64 partition_id; 770 u64 device_id; 771 u64 flags; 772 struct hv_interrupt_entry logical_interrupt_entry; 773 struct hv_device_interrupt_descriptor interrupt_descriptor; 774} __packed; 775 776struct hv_output_map_device_interrupt { 777 struct hv_interrupt_entry interrupt_entry; 778} __packed; 779 780struct hv_input_unmap_device_interrupt { 781 u64 partition_id; 782 u64 device_id; 783 struct hv_interrupt_entry interrupt_entry; 784} __packed; 785 786#define HV_SOURCE_SHADOW_NONE 0x0 787#define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE 0x1 788 789/* 790 * The whole argument should fit in a page to be able to pass to the hypervisor 791 * in one hypercall. 792 */ 793#define HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES \ 794 ((HV_HYP_PAGE_SIZE - sizeof(struct hv_memory_hint)) / \ 795 sizeof(union hv_gpa_page_range)) 796 797/* HvExtCallMemoryHeatHint hypercall */ 798#define HV_EXT_MEMORY_HEAT_HINT_TYPE_COLD_DISCARD 2 799struct hv_memory_hint { 800 u64 type:2; 801 u64 reserved:62; 802 union hv_gpa_page_range ranges[]; 803} __packed; 804 805/* Data structures for HVCALL_MMIO_READ and HVCALL_MMIO_WRITE */ 806#define HV_HYPERCALL_MMIO_MAX_DATA_LENGTH 64 807 808struct hv_mmio_read_input { 809 u64 gpa; 810 u32 size; 811 u32 reserved; 812} __packed; 813 814struct hv_mmio_read_output { 815 u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH]; 816} __packed; 817 818struct hv_mmio_write_input { 819 u64 gpa; 820 u32 size; 821 u32 reserved; 822 u8 data[HV_HYPERCALL_MMIO_MAX_DATA_LENGTH]; 823} __packed; 824 825#endif