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1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Thunderbolt control channel messages 4 * 5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> 6 * Copyright (C) 2017, Intel Corporation 7 */ 8 9#ifndef _TB_MSGS 10#define _TB_MSGS 11 12#include <linux/types.h> 13#include <linux/uuid.h> 14 15enum tb_cfg_space { 16 TB_CFG_HOPS = 0, 17 TB_CFG_PORT = 1, 18 TB_CFG_SWITCH = 2, 19 TB_CFG_COUNTERS = 3, 20}; 21 22enum tb_cfg_error { 23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0, 24 TB_CFG_ERROR_LINK_ERROR = 1, 25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2, 26 TB_CFG_ERROR_NO_SUCH_PORT = 4, 27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */ 28 TB_CFG_ERROR_LOOP = 8, 29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12, 30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13, 31 TB_CFG_ERROR_LOCK = 15, 32 TB_CFG_ERROR_DP_BW = 32, 33}; 34 35/* common header */ 36struct tb_cfg_header { 37 u32 route_hi:22; 38 u32 unknown:10; /* highest order bit is set on replies */ 39 u32 route_lo; 40} __packed; 41 42/* additional header for read/write packets */ 43struct tb_cfg_address { 44 u32 offset:13; /* in dwords */ 45 u32 length:6; /* in dwords */ 46 u32 port:6; 47 enum tb_cfg_space space:2; 48 u32 seq:2; /* sequence number */ 49 u32 zero:3; 50} __packed; 51 52/* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */ 53struct cfg_read_pkg { 54 struct tb_cfg_header header; 55 struct tb_cfg_address addr; 56} __packed; 57 58/* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */ 59struct cfg_write_pkg { 60 struct tb_cfg_header header; 61 struct tb_cfg_address addr; 62 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */ 63} __packed; 64 65/* TB_CFG_PKG_ERROR */ 66struct cfg_error_pkg { 67 struct tb_cfg_header header; 68 enum tb_cfg_error error:8; 69 u32 port:6; 70 u32 reserved:16; 71 u32 pg:2; 72} __packed; 73 74struct cfg_ack_pkg { 75 struct tb_cfg_header header; 76}; 77 78#define TB_CFG_ERROR_PG_HOT_PLUG 0x2 79#define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3 80 81/* TB_CFG_PKG_EVENT */ 82struct cfg_event_pkg { 83 struct tb_cfg_header header; 84 u32 port:6; 85 u32 zero:25; 86 bool unplug:1; 87} __packed; 88 89/* TB_CFG_PKG_RESET */ 90struct cfg_reset_pkg { 91 struct tb_cfg_header header; 92} __packed; 93 94/* TB_CFG_PKG_PREPARE_TO_SLEEP */ 95struct cfg_pts_pkg { 96 struct tb_cfg_header header; 97 u32 data; 98} __packed; 99 100/* ICM messages */ 101 102enum icm_pkg_code { 103 ICM_GET_TOPOLOGY = 0x1, 104 ICM_DRIVER_READY = 0x3, 105 ICM_APPROVE_DEVICE = 0x4, 106 ICM_CHALLENGE_DEVICE = 0x5, 107 ICM_ADD_DEVICE_KEY = 0x6, 108 ICM_GET_ROUTE = 0xa, 109 ICM_APPROVE_XDOMAIN = 0x10, 110 ICM_DISCONNECT_XDOMAIN = 0x11, 111 ICM_PREBOOT_ACL = 0x18, 112 ICM_USB4_SWITCH_OP = 0x20, 113}; 114 115enum icm_event_code { 116 ICM_EVENT_DEVICE_CONNECTED = 0x3, 117 ICM_EVENT_DEVICE_DISCONNECTED = 0x4, 118 ICM_EVENT_XDOMAIN_CONNECTED = 0x6, 119 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7, 120 ICM_EVENT_RTD3_VETO = 0xa, 121}; 122 123struct icm_pkg_header { 124 u8 code; 125 u8 flags; 126 u8 packet_id; 127 u8 total_packets; 128}; 129 130#define ICM_FLAGS_ERROR BIT(0) 131#define ICM_FLAGS_NO_KEY BIT(1) 132#define ICM_FLAGS_SLEVEL_SHIFT 3 133#define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3) 134#define ICM_FLAGS_DUAL_LANE BIT(5) 135#define ICM_FLAGS_SPEED_GEN3 BIT(7) 136#define ICM_FLAGS_WRITE BIT(7) 137 138struct icm_pkg_driver_ready { 139 struct icm_pkg_header hdr; 140}; 141 142/* Falcon Ridge only messages */ 143 144struct icm_fr_pkg_driver_ready_response { 145 struct icm_pkg_header hdr; 146 u8 romver; 147 u8 ramver; 148 u16 security_level; 149}; 150 151#define ICM_FR_SLEVEL_MASK 0xf 152 153/* Falcon Ridge & Alpine Ridge common messages */ 154 155struct icm_fr_pkg_get_topology { 156 struct icm_pkg_header hdr; 157}; 158 159#define ICM_GET_TOPOLOGY_PACKETS 14 160 161struct icm_fr_pkg_get_topology_response { 162 struct icm_pkg_header hdr; 163 u32 route_lo; 164 u32 route_hi; 165 u8 first_data; 166 u8 second_data; 167 u8 drom_i2c_address_index; 168 u8 switch_index; 169 u32 reserved[2]; 170 u32 ports[16]; 171 u32 port_hop_info[16]; 172}; 173 174#define ICM_SWITCH_USED BIT(0) 175#define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1) 176#define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1 177 178#define ICM_PORT_TYPE_MASK GENMASK(23, 0) 179#define ICM_PORT_INDEX_SHIFT 24 180#define ICM_PORT_INDEX_MASK GENMASK(31, 24) 181 182struct icm_fr_event_device_connected { 183 struct icm_pkg_header hdr; 184 uuid_t ep_uuid; 185 u8 connection_key; 186 u8 connection_id; 187 u16 link_info; 188 u32 ep_name[55]; 189}; 190 191#define ICM_LINK_INFO_LINK_MASK 0x7 192#define ICM_LINK_INFO_DEPTH_SHIFT 4 193#define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4) 194#define ICM_LINK_INFO_APPROVED BIT(8) 195#define ICM_LINK_INFO_REJECTED BIT(9) 196#define ICM_LINK_INFO_BOOT BIT(10) 197 198struct icm_fr_pkg_approve_device { 199 struct icm_pkg_header hdr; 200 uuid_t ep_uuid; 201 u8 connection_key; 202 u8 connection_id; 203 u16 reserved; 204}; 205 206struct icm_fr_event_device_disconnected { 207 struct icm_pkg_header hdr; 208 u16 reserved; 209 u16 link_info; 210}; 211 212struct icm_fr_event_xdomain_connected { 213 struct icm_pkg_header hdr; 214 u16 reserved; 215 u16 link_info; 216 uuid_t remote_uuid; 217 uuid_t local_uuid; 218 u32 local_route_hi; 219 u32 local_route_lo; 220 u32 remote_route_hi; 221 u32 remote_route_lo; 222}; 223 224struct icm_fr_event_xdomain_disconnected { 225 struct icm_pkg_header hdr; 226 u16 reserved; 227 u16 link_info; 228 uuid_t remote_uuid; 229}; 230 231struct icm_fr_pkg_add_device_key { 232 struct icm_pkg_header hdr; 233 uuid_t ep_uuid; 234 u8 connection_key; 235 u8 connection_id; 236 u16 reserved; 237 u32 key[8]; 238}; 239 240struct icm_fr_pkg_add_device_key_response { 241 struct icm_pkg_header hdr; 242 uuid_t ep_uuid; 243 u8 connection_key; 244 u8 connection_id; 245 u16 reserved; 246}; 247 248struct icm_fr_pkg_challenge_device { 249 struct icm_pkg_header hdr; 250 uuid_t ep_uuid; 251 u8 connection_key; 252 u8 connection_id; 253 u16 reserved; 254 u32 challenge[8]; 255}; 256 257struct icm_fr_pkg_challenge_device_response { 258 struct icm_pkg_header hdr; 259 uuid_t ep_uuid; 260 u8 connection_key; 261 u8 connection_id; 262 u16 reserved; 263 u32 challenge[8]; 264 u32 response[8]; 265}; 266 267struct icm_fr_pkg_approve_xdomain { 268 struct icm_pkg_header hdr; 269 u16 reserved; 270 u16 link_info; 271 uuid_t remote_uuid; 272 u16 transmit_path; 273 u16 transmit_ring; 274 u16 receive_path; 275 u16 receive_ring; 276}; 277 278struct icm_fr_pkg_approve_xdomain_response { 279 struct icm_pkg_header hdr; 280 u16 reserved; 281 u16 link_info; 282 uuid_t remote_uuid; 283 u16 transmit_path; 284 u16 transmit_ring; 285 u16 receive_path; 286 u16 receive_ring; 287}; 288 289/* Alpine Ridge only messages */ 290 291struct icm_ar_pkg_driver_ready_response { 292 struct icm_pkg_header hdr; 293 u8 romver; 294 u8 ramver; 295 u16 info; 296}; 297 298#define ICM_AR_FLAGS_RTD3 BIT(6) 299 300#define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0) 301#define ICM_AR_INFO_BOOT_ACL_SHIFT 7 302#define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7) 303#define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13) 304 305struct icm_ar_pkg_get_route { 306 struct icm_pkg_header hdr; 307 u16 reserved; 308 u16 link_info; 309}; 310 311struct icm_ar_pkg_get_route_response { 312 struct icm_pkg_header hdr; 313 u16 reserved; 314 u16 link_info; 315 u32 route_hi; 316 u32 route_lo; 317}; 318 319struct icm_ar_boot_acl_entry { 320 u32 uuid_lo; 321 u32 uuid_hi; 322}; 323 324#define ICM_AR_PREBOOT_ACL_ENTRIES 16 325 326struct icm_ar_pkg_preboot_acl { 327 struct icm_pkg_header hdr; 328 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 329}; 330 331struct icm_ar_pkg_preboot_acl_response { 332 struct icm_pkg_header hdr; 333 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; 334}; 335 336/* Titan Ridge messages */ 337 338struct icm_tr_pkg_driver_ready_response { 339 struct icm_pkg_header hdr; 340 u16 reserved1; 341 u16 info; 342 u32 nvm_version; 343 u16 device_id; 344 u16 reserved2; 345}; 346 347#define ICM_TR_FLAGS_RTD3 BIT(6) 348 349#define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0) 350#define ICM_TR_INFO_PROTO_VERSION_MASK GENMASK(6, 4) 351#define ICM_TR_INFO_PROTO_VERSION_SHIFT 4 352#define ICM_TR_INFO_BOOT_ACL_SHIFT 7 353#define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7) 354 355struct icm_tr_event_device_connected { 356 struct icm_pkg_header hdr; 357 uuid_t ep_uuid; 358 u32 route_hi; 359 u32 route_lo; 360 u8 connection_id; 361 u8 reserved; 362 u16 link_info; 363 u32 ep_name[55]; 364}; 365 366struct icm_tr_event_device_disconnected { 367 struct icm_pkg_header hdr; 368 u32 route_hi; 369 u32 route_lo; 370}; 371 372struct icm_tr_event_xdomain_connected { 373 struct icm_pkg_header hdr; 374 u16 reserved; 375 u16 link_info; 376 uuid_t remote_uuid; 377 uuid_t local_uuid; 378 u32 local_route_hi; 379 u32 local_route_lo; 380 u32 remote_route_hi; 381 u32 remote_route_lo; 382}; 383 384struct icm_tr_event_xdomain_disconnected { 385 struct icm_pkg_header hdr; 386 u32 route_hi; 387 u32 route_lo; 388 uuid_t remote_uuid; 389}; 390 391struct icm_tr_pkg_approve_device { 392 struct icm_pkg_header hdr; 393 uuid_t ep_uuid; 394 u32 route_hi; 395 u32 route_lo; 396 u8 connection_id; 397 u8 reserved1[3]; 398}; 399 400struct icm_tr_pkg_add_device_key { 401 struct icm_pkg_header hdr; 402 uuid_t ep_uuid; 403 u32 route_hi; 404 u32 route_lo; 405 u8 connection_id; 406 u8 reserved[3]; 407 u32 key[8]; 408}; 409 410struct icm_tr_pkg_challenge_device { 411 struct icm_pkg_header hdr; 412 uuid_t ep_uuid; 413 u32 route_hi; 414 u32 route_lo; 415 u8 connection_id; 416 u8 reserved[3]; 417 u32 challenge[8]; 418}; 419 420struct icm_tr_pkg_approve_xdomain { 421 struct icm_pkg_header hdr; 422 u32 route_hi; 423 u32 route_lo; 424 uuid_t remote_uuid; 425 u16 transmit_path; 426 u16 transmit_ring; 427 u16 receive_path; 428 u16 receive_ring; 429}; 430 431struct icm_tr_pkg_disconnect_xdomain { 432 struct icm_pkg_header hdr; 433 u8 stage; 434 u8 reserved[3]; 435 u32 route_hi; 436 u32 route_lo; 437 uuid_t remote_uuid; 438}; 439 440struct icm_tr_pkg_challenge_device_response { 441 struct icm_pkg_header hdr; 442 uuid_t ep_uuid; 443 u32 route_hi; 444 u32 route_lo; 445 u8 connection_id; 446 u8 reserved[3]; 447 u32 challenge[8]; 448 u32 response[8]; 449}; 450 451struct icm_tr_pkg_add_device_key_response { 452 struct icm_pkg_header hdr; 453 uuid_t ep_uuid; 454 u32 route_hi; 455 u32 route_lo; 456 u8 connection_id; 457 u8 reserved[3]; 458}; 459 460struct icm_tr_pkg_approve_xdomain_response { 461 struct icm_pkg_header hdr; 462 u32 route_hi; 463 u32 route_lo; 464 uuid_t remote_uuid; 465 u16 transmit_path; 466 u16 transmit_ring; 467 u16 receive_path; 468 u16 receive_ring; 469}; 470 471struct icm_tr_pkg_disconnect_xdomain_response { 472 struct icm_pkg_header hdr; 473 u8 stage; 474 u8 reserved[3]; 475 u32 route_hi; 476 u32 route_lo; 477 uuid_t remote_uuid; 478}; 479 480/* Ice Lake messages */ 481 482struct icm_icl_event_rtd3_veto { 483 struct icm_pkg_header hdr; 484 u32 veto_reason; 485}; 486 487/* USB4 ICM messages */ 488 489struct icm_usb4_switch_op { 490 struct icm_pkg_header hdr; 491 u32 route_hi; 492 u32 route_lo; 493 u32 metadata; 494 u16 opcode; 495 u16 data_len_valid; 496 u32 data[16]; 497}; 498 499#define ICM_USB4_SWITCH_DATA_LEN_MASK GENMASK(3, 0) 500#define ICM_USB4_SWITCH_DATA_VALID BIT(4) 501 502struct icm_usb4_switch_op_response { 503 struct icm_pkg_header hdr; 504 u32 route_hi; 505 u32 route_lo; 506 u32 metadata; 507 u16 opcode; 508 u16 status; 509 u32 data[16]; 510}; 511 512/* XDomain messages */ 513 514struct tb_xdomain_header { 515 u32 route_hi; 516 u32 route_lo; 517 u32 length_sn; 518}; 519 520#define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0) 521#define TB_XDOMAIN_SN_MASK GENMASK(28, 27) 522#define TB_XDOMAIN_SN_SHIFT 27 523 524enum tb_xdp_type { 525 UUID_REQUEST_OLD = 1, 526 UUID_RESPONSE = 2, 527 PROPERTIES_REQUEST, 528 PROPERTIES_RESPONSE, 529 PROPERTIES_CHANGED_REQUEST, 530 PROPERTIES_CHANGED_RESPONSE, 531 ERROR_RESPONSE, 532 UUID_REQUEST = 12, 533 LINK_STATE_STATUS_REQUEST = 15, 534 LINK_STATE_STATUS_RESPONSE, 535 LINK_STATE_CHANGE_REQUEST, 536 LINK_STATE_CHANGE_RESPONSE, 537}; 538 539struct tb_xdp_header { 540 struct tb_xdomain_header xd_hdr; 541 uuid_t uuid; 542 u32 type; 543}; 544 545struct tb_xdp_error_response { 546 struct tb_xdp_header hdr; 547 u32 error; 548}; 549 550struct tb_xdp_link_state_status { 551 struct tb_xdp_header hdr; 552}; 553 554struct tb_xdp_link_state_status_response { 555 union { 556 struct tb_xdp_error_response err; 557 struct { 558 struct tb_xdp_header hdr; 559 u32 status; 560 u8 slw; 561 u8 tlw; 562 u8 sls; 563 u8 tls; 564 }; 565 }; 566}; 567 568struct tb_xdp_link_state_change { 569 struct tb_xdp_header hdr; 570 u8 tlw; 571 u8 tls; 572 u16 reserved; 573}; 574 575struct tb_xdp_link_state_change_response { 576 union { 577 struct tb_xdp_error_response err; 578 struct { 579 struct tb_xdp_header hdr; 580 u32 status; 581 }; 582 }; 583}; 584 585struct tb_xdp_uuid { 586 struct tb_xdp_header hdr; 587}; 588 589struct tb_xdp_uuid_response { 590 union { 591 struct tb_xdp_error_response err; 592 struct { 593 struct tb_xdp_header hdr; 594 uuid_t src_uuid; 595 u32 src_route_hi; 596 u32 src_route_lo; 597 }; 598 }; 599}; 600 601struct tb_xdp_properties { 602 struct tb_xdp_header hdr; 603 uuid_t src_uuid; 604 uuid_t dst_uuid; 605 u16 offset; 606 u16 reserved; 607}; 608 609struct tb_xdp_properties_response { 610 union { 611 struct tb_xdp_error_response err; 612 struct { 613 struct tb_xdp_header hdr; 614 uuid_t src_uuid; 615 uuid_t dst_uuid; 616 u16 offset; 617 u16 data_length; 618 u32 generation; 619 u32 data[]; 620 }; 621 }; 622}; 623 624/* 625 * Max length of data array single XDomain property response is allowed 626 * to carry. 627 */ 628#define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \ 629 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4) 630 631/* Maximum size of the total property block in dwords we allow */ 632#define TB_XDP_PROPERTIES_MAX_LENGTH 500 633 634struct tb_xdp_properties_changed { 635 struct tb_xdp_header hdr; 636 uuid_t src_uuid; 637}; 638 639struct tb_xdp_properties_changed_response { 640 union { 641 struct tb_xdp_error_response err; 642 struct tb_xdp_header hdr; 643 }; 644}; 645 646enum tb_xdp_error { 647 ERROR_SUCCESS, 648 ERROR_UNKNOWN_PACKET, 649 ERROR_UNKNOWN_DOMAIN, 650 ERROR_NOT_SUPPORTED, 651 ERROR_NOT_READY, 652}; 653 654#endif