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1NVIDIA Tegra20/Tegra30 SLINK controller.
2
3Required properties:
4- compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink".
5- reg: Should contain SLINK registers location and length.
6- interrupts: Should contain SLINK interrupts.
7- clocks : Must contain one entry, for the module clock.
8 See ../clocks/clock-bindings.txt for details.
9- resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11- reset-names : Must include the following entries:
12 - spi
13- dmas : Must contain an entry for each entry in clock-names.
14 See ../dma/dma.txt for details.
15- dma-names : Must include the following entries:
16 - rx
17 - tx
18
19Recommended properties:
20- spi-max-frequency: Definition as per
21 Documentation/devicetree/bindings/spi/spi-bus.txt
22
23Example:
24
25spi@7000d600 {
26 compatible = "nvidia,tegra20-slink";
27 reg = <0x7000d600 0x200>;
28 interrupts = <0 82 0x04>;
29 spi-max-frequency = <25000000>;
30 #address-cells = <1>;
31 #size-cells = <0>;
32 clocks = <&tegra_car 44>;
33 resets = <&tegra_car 44>;
34 reset-names = "spi";
35 dmas = <&apbdma 16>, <&apbdma 16>;
36 dma-names = "rx", "tx";
37};