tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/micrel,ks8851.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Micrel KS8851 Ethernet MAC (SPI and Parallel bus options)
8
9maintainers:
10 - Marek Vasut <marex@denx.de>
11
12properties:
13 compatible:
14 enum:
15 - micrel,ks8851 # SPI bus option
16 - micrel,ks8851-mll # Parallel bus option
17
18 interrupts:
19 maxItems: 1
20
21 reg:
22 minItems: 1
23 items:
24 - description: SPI or Parallel bus hardware address
25 - description: Parallel bus command mode address
26
27 reset-gpios:
28 maxItems: 1
29 description:
30 The reset_n input pin
31
32 vdd-supply:
33 description: |
34 Analog 3.3V supply for Ethernet MAC
35
36 vdd-io-supply:
37 description: |
38 Digital 1.8V IO supply for Ethernet MAC
39
40required:
41 - compatible
42 - reg
43 - interrupts
44
45allOf:
46 - $ref: ethernet-controller.yaml#
47 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
48 - if:
49 properties:
50 compatible:
51 contains:
52 const: micrel,ks8851
53 then:
54 properties:
55 reg:
56 maxItems: 1
57 - if:
58 properties:
59 compatible:
60 contains:
61 const: micrel,ks8851-mll
62 then:
63 properties:
64 reg:
65 minItems: 2
66
67unevaluatedProperties: false
68
69examples:
70 - |
71 /* SPI bus option */
72 spi {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 ethernet@0 {
76 compatible = "micrel,ks8851";
77 reg = <0>;
78 interrupt-parent = <&msmgpio>;
79 interrupts = <90 8>;
80 vdd-supply = <&ext_l2>;
81 vdd-io-supply = <&pm8921_lvs6>;
82 reset-gpios = <&msmgpio 89 0>;
83 };
84 };
85 - |
86 #include <dt-bindings/interrupt-controller/irq.h>
87 /* Parallel bus option */
88 memory-controller {
89 #address-cells = <2>;
90 #size-cells = <1>;
91 ethernet@1,0 {
92 compatible = "micrel,ks8851-mll";
93 reg = <1 0x0 0x2>, <1 0x2 0x20000>;
94 interrupt-parent = <&gpioc>;
95 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
96 };
97 };