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Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * MFD core driver for Richtek RT5033
4 *
5 * Copyright (C) 2014 Samsung Electronics, Co., Ltd.
6 * Author: Beomho Seo <beomho.seo@samsung.com>
7 */
8
9#ifndef __RT5033_PRIVATE_H__
10#define __RT5033_PRIVATE_H__
11
12enum rt5033_reg {
13 RT5033_REG_CHG_STAT = 0x00,
14 RT5033_REG_CHG_CTRL1 = 0x01,
15 RT5033_REG_CHG_CTRL2 = 0x02,
16 RT5033_REG_DEVICE_ID = 0x03,
17 RT5033_REG_CHG_CTRL3 = 0x04,
18 RT5033_REG_CHG_CTRL4 = 0x05,
19 RT5033_REG_CHG_CTRL5 = 0x06,
20 RT5033_REG_RT_CTRL0 = 0x07,
21 RT5033_REG_CHG_RESET = 0x08,
22 /* Reserved 0x09~0x18 */
23 RT5033_REG_RT_CTRL1 = 0x19,
24 /* Reserved 0x1A~0x20 */
25 RT5033_REG_FLED_FUNCTION1 = 0x21,
26 RT5033_REG_FLED_FUNCTION2 = 0x22,
27 RT5033_REG_FLED_STROBE_CTRL1 = 0x23,
28 RT5033_REG_FLED_STROBE_CTRL2 = 0x24,
29 RT5033_REG_FLED_CTRL1 = 0x25,
30 RT5033_REG_FLED_CTRL2 = 0x26,
31 RT5033_REG_FLED_CTRL3 = 0x27,
32 RT5033_REG_FLED_CTRL4 = 0x28,
33 RT5033_REG_FLED_CTRL5 = 0x29,
34 /* Reserved 0x2A~0x40 */
35 RT5033_REG_CTRL = 0x41,
36 RT5033_REG_BUCK_CTRL = 0x42,
37 RT5033_REG_LDO_CTRL = 0x43,
38 /* Reserved 0x44~0x46 */
39 RT5033_REG_MANUAL_RESET_CTRL = 0x47,
40 /* Reserved 0x48~0x5F */
41 RT5033_REG_CHG_IRQ1 = 0x60,
42 RT5033_REG_CHG_IRQ2 = 0x61,
43 RT5033_REG_CHG_IRQ3 = 0x62,
44 RT5033_REG_CHG_IRQ1_CTRL = 0x63,
45 RT5033_REG_CHG_IRQ2_CTRL = 0x64,
46 RT5033_REG_CHG_IRQ3_CTRL = 0x65,
47 RT5033_REG_LED_IRQ_STAT = 0x66,
48 RT5033_REG_LED_IRQ_CTRL = 0x67,
49 RT5033_REG_PMIC_IRQ_STAT = 0x68,
50 RT5033_REG_PMIC_IRQ_CTRL = 0x69,
51 RT5033_REG_SHDN_CTRL = 0x6A,
52 RT5033_REG_OFF_EVENT = 0x6B,
53
54 RT5033_REG_END,
55};
56
57/* RT5033 Charger state register */
58#define RT5033_CHG_STAT_MASK 0x20
59#define RT5033_CHG_STAT_DISCHARGING 0x00
60#define RT5033_CHG_STAT_FULL 0x10
61#define RT5033_CHG_STAT_CHARGING 0x20
62#define RT5033_CHG_STAT_NOT_CHARGING 0x30
63#define RT5033_CHG_STAT_TYPE_MASK 0x60
64#define RT5033_CHG_STAT_TYPE_PRE 0x20
65#define RT5033_CHG_STAT_TYPE_FAST 0x60
66
67/* RT5033 CHGCTRL1 register */
68#define RT5033_CHGCTRL1_IAICR_MASK 0xe0
69#define RT5033_CHGCTRL1_MODE_MASK 0x01
70
71/* RT5033 CHGCTRL2 register */
72#define RT5033_CHGCTRL2_CV_MASK 0xfc
73
74/* RT5033 CHGCTRL3 register */
75#define RT5033_CHGCTRL3_CFO_EN_MASK 0x40
76#define RT5033_CHGCTRL3_TIMER_MASK 0x38
77#define RT5033_CHGCTRL3_TIMER_EN_MASK 0x01
78
79/* RT5033 CHGCTRL4 register */
80#define RT5033_CHGCTRL4_EOC_MASK 0x07
81#define RT5033_CHGCTRL4_IPREC_MASK 0x18
82
83/* RT5033 CHGCTRL5 register */
84#define RT5033_CHGCTRL5_VPREC_MASK 0x0f
85#define RT5033_CHGCTRL5_ICHG_MASK 0xf0
86#define RT5033_CHGCTRL5_ICHG_SHIFT 0x04
87#define RT5033_CHG_MAX_CURRENT 0x0d
88
89/* RT5033 RT CTRL1 register */
90#define RT5033_RT_CTRL1_UUG_MASK 0x02
91#define RT5033_RT_HZ_MASK 0x01
92
93/* RT5033 control register */
94#define RT5033_CTRL_FCCM_BUCK_MASK BIT(0)
95#define RT5033_CTRL_BUCKOMS_MASK BIT(1)
96#define RT5033_CTRL_LDOOMS_MASK BIT(2)
97#define RT5033_CTRL_SLDOOMS_MASK BIT(3)
98#define RT5033_CTRL_EN_BUCK_MASK BIT(4)
99#define RT5033_CTRL_EN_LDO_MASK BIT(5)
100#define RT5033_CTRL_EN_SAFE_LDO_MASK BIT(6)
101#define RT5033_CTRL_LDO_SLEEP_MASK BIT(7)
102
103/* RT5033 BUCK control register */
104#define RT5033_BUCK_CTRL_MASK 0x1f
105
106/* RT5033 LDO control register */
107#define RT5033_LDO_CTRL_MASK 0x1f
108
109/* RT5033 charger property - model, manufacturer */
110#define RT5033_CHARGER_MODEL "RT5033WSC Charger"
111#define RT5033_MANUFACTURER "Richtek Technology Corporation"
112
113/*
114 * While RT5033 charger can limit the fast-charge current (as in CHGCTRL1
115 * register), AICR mode limits the input current. For example, the AIRC 100
116 * mode limits the input current to 100 mA.
117 */
118#define RT5033_AICR_100_MODE 0x20
119#define RT5033_AICR_500_MODE 0x40
120#define RT5033_AICR_700_MODE 0x60
121#define RT5033_AICR_900_MODE 0x80
122#define RT5033_AICR_1500_MODE 0xc0
123#define RT5033_AICR_2000_MODE 0xe0
124#define RT5033_AICR_MODE_MASK 0xe0
125
126/* RT5033 use internal timer need to set time */
127#define RT5033_FAST_CHARGE_TIMER4 0x00
128#define RT5033_FAST_CHARGE_TIMER6 0x01
129#define RT5033_FAST_CHARGE_TIMER8 0x02
130#define RT5033_FAST_CHARGE_TIMER9 0x03
131#define RT5033_FAST_CHARGE_TIMER12 0x04
132#define RT5033_FAST_CHARGE_TIMER14 0x05
133#define RT5033_FAST_CHARGE_TIMER16 0x06
134
135#define RT5033_INT_TIMER_ENABLE 0x01
136
137/* RT5033 charger termination enable mask */
138#define RT5033_TE_ENABLE_MASK 0x08
139
140/*
141 * RT5033 charger opa mode. RT5033 has two opa modes for OTG: charger mode
142 * and boost mode.
143 */
144#define RT5033_CHARGER_MODE 0x00
145#define RT5033_BOOST_MODE 0x01
146
147/* RT5033 charger termination enable */
148#define RT5033_TE_ENABLE 0x08
149
150/* RT5033 charger CFO enable */
151#define RT5033_CFO_ENABLE 0x40
152
153/* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */
154#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN 3650000U
155#define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM 25000U
156#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX 4400000U
157
158/* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
159#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN 350000U
160#define RT5033_CHARGER_PRE_CURRENT_STEP_NUM 100000U
161#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX 650000U
162
163/* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */
164#define RT5033_CHARGER_FAST_CURRENT_MIN 700000U
165#define RT5033_CHARGER_FAST_CURRENT_STEP_NUM 100000U
166#define RT5033_CHARGER_FAST_CURRENT_MAX 2000000U
167
168/*
169 * RT5033 charger const-charge end of charger current (
170 * as in CHGCTRL4 register), uA
171 */
172#define RT5033_CHARGER_EOC_MIN 150000U
173#define RT5033_CHARGER_EOC_REF 300000U
174#define RT5033_CHARGER_EOC_STEP_NUM1 50000U
175#define RT5033_CHARGER_EOC_STEP_NUM2 100000U
176#define RT5033_CHARGER_EOC_MAX 600000U
177
178/*
179 * RT5033 charger pre-charge threshold volt limits
180 * (as in CHGCTRL5 register), uV
181 */
182#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN 2300000U
183#define RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM 100000U
184#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX 3800000U
185
186/*
187 * RT5033 charger UUG. It enables MOS auto control by H/W charger
188 * circuit.
189 */
190#define RT5033_CHARGER_UUG_ENABLE 0x02
191
192/* RT5033 charger high impedance mode */
193#define RT5033_CHARGER_HZ_DISABLE 0x00
194#define RT5033_CHARGER_HZ_ENABLE 0x01
195
196/* RT5033 regulator BUCK output voltage uV */
197#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U
198#define RT5033_REGULATOR_BUCK_VOLTAGE_MAX 3000000U
199#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP 100000U
200#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM 32
201
202/* RT5033 regulator LDO output voltage uV */
203#define RT5033_REGULATOR_LDO_VOLTAGE_MIN 1200000U
204#define RT5033_REGULATOR_LDO_VOLTAGE_MAX 3000000U
205#define RT5033_REGULATOR_LDO_VOLTAGE_STEP 100000U
206#define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM 32
207
208/* RT5033 regulator SAFE LDO output voltage uV */
209#define RT5033_REGULATOR_SAFE_LDO_VOLTAGE 4900000U
210
211enum rt5033_fuel_reg {
212 RT5033_FUEL_REG_OCV_H = 0x00,
213 RT5033_FUEL_REG_OCV_L = 0x01,
214 RT5033_FUEL_REG_VBAT_H = 0x02,
215 RT5033_FUEL_REG_VBAT_L = 0x03,
216 RT5033_FUEL_REG_SOC_H = 0x04,
217 RT5033_FUEL_REG_SOC_L = 0x05,
218 RT5033_FUEL_REG_CTRL_H = 0x06,
219 RT5033_FUEL_REG_CTRL_L = 0x07,
220 RT5033_FUEL_REG_CRATE = 0x08,
221 RT5033_FUEL_REG_DEVICE_ID = 0x09,
222 RT5033_FUEL_REG_AVG_VOLT_H = 0x0A,
223 RT5033_FUEL_REG_AVG_VOLT_L = 0x0B,
224 RT5033_FUEL_REG_CONFIG_H = 0x0C,
225 RT5033_FUEL_REG_CONFIG_L = 0x0D,
226 /* Reserved 0x0E~0x0F */
227 RT5033_FUEL_REG_IRQ_CTRL = 0x10,
228 RT5033_FUEL_REG_IRQ_FLAG = 0x11,
229 RT5033_FUEL_VMIN = 0x12,
230 RT5033_FUEL_SMIN = 0x13,
231 /* Reserved 0x14~0x1F */
232 RT5033_FUEL_VGCOMP1 = 0x20,
233 RT5033_FUEL_VGCOMP2 = 0x21,
234 RT5033_FUEL_VGCOMP3 = 0x22,
235 RT5033_FUEL_VGCOMP4 = 0x23,
236 /* Reserved 0x24~0xFD */
237 RT5033_FUEL_MFA_H = 0xFE,
238 RT5033_FUEL_MFA_L = 0xFF,
239
240 RT5033_FUEL_REG_END,
241};
242
243/* RT5033 fuel gauge battery present property */
244#define RT5033_FUEL_BAT_PRESENT 0x02
245
246/* RT5033 PMIC interrupts */
247#define RT5033_PMIC_IRQ_BUCKOCP BIT(2)
248#define RT5033_PMIC_IRQ_BUCKLV BIT(3)
249#define RT5033_PMIC_IRQ_SAFELDOLV BIT(4)
250#define RT5033_PMIC_IRQ_LDOLV BIT(5)
251#define RT5033_PMIC_IRQ_OT BIT(6)
252#define RT5033_PMIC_IRQ_VDDA_UV BIT(7)
253
254#endif /* __RT5033_PRIVATE_H__ */