Linux kernel mirror (for testing)
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3
4#ifndef _IONIC_DEV_H_
5#define _IONIC_DEV_H_
6
7#include <linux/atomic.h>
8#include <linux/mutex.h>
9#include <linux/workqueue.h>
10
11#include "ionic_if.h"
12#include "ionic_regs.h"
13
14#define IONIC_MAX_TX_DESC 8192
15#define IONIC_MAX_RX_DESC 16384
16#define IONIC_MIN_TXRX_DESC 64
17#define IONIC_DEF_TXRX_DESC 4096
18#define IONIC_RX_FILL_THRESHOLD 16
19#define IONIC_RX_FILL_DIV 8
20#define IONIC_LIFS_MAX 1024
21#define IONIC_WATCHDOG_SECS 5
22#define IONIC_ITR_COAL_USEC_DEFAULT 64
23
24#define IONIC_DEV_CMD_REG_VERSION 1
25#define IONIC_DEV_INFO_REG_COUNT 32
26#define IONIC_DEV_CMD_REG_COUNT 32
27
28#define IONIC_NAPI_DEADLINE (HZ / 200) /* 5ms */
29#define IONIC_ADMIN_DOORBELL_DEADLINE (HZ / 2) /* 500ms */
30#define IONIC_TX_DOORBELL_DEADLINE (HZ / 100) /* 10ms */
31#define IONIC_RX_MIN_DOORBELL_DEADLINE (HZ / 100) /* 10ms */
32#define IONIC_RX_MAX_DOORBELL_DEADLINE (HZ * 5) /* 5s */
33
34struct ionic_dev_bar {
35 void __iomem *vaddr;
36 phys_addr_t bus_addr;
37 unsigned long len;
38 int res_index;
39};
40
41#ifndef __CHECKER__
42/* Registers */
43static_assert(sizeof(struct ionic_intr) == 32);
44
45static_assert(sizeof(struct ionic_doorbell) == 8);
46static_assert(sizeof(struct ionic_intr_status) == 8);
47static_assert(sizeof(union ionic_dev_regs) == 4096);
48static_assert(sizeof(union ionic_dev_info_regs) == 2048);
49static_assert(sizeof(union ionic_dev_cmd_regs) == 2048);
50static_assert(sizeof(struct ionic_lif_stats) == 1024);
51
52static_assert(sizeof(struct ionic_admin_cmd) == 64);
53static_assert(sizeof(struct ionic_admin_comp) == 16);
54static_assert(sizeof(struct ionic_nop_cmd) == 64);
55static_assert(sizeof(struct ionic_nop_comp) == 16);
56
57/* Device commands */
58static_assert(sizeof(struct ionic_dev_identify_cmd) == 64);
59static_assert(sizeof(struct ionic_dev_identify_comp) == 16);
60static_assert(sizeof(struct ionic_dev_init_cmd) == 64);
61static_assert(sizeof(struct ionic_dev_init_comp) == 16);
62static_assert(sizeof(struct ionic_dev_reset_cmd) == 64);
63static_assert(sizeof(struct ionic_dev_reset_comp) == 16);
64static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64);
65static_assert(sizeof(struct ionic_dev_getattr_comp) == 16);
66static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64);
67static_assert(sizeof(struct ionic_dev_setattr_comp) == 16);
68static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64);
69
70/* Port commands */
71static_assert(sizeof(struct ionic_port_identify_cmd) == 64);
72static_assert(sizeof(struct ionic_port_identify_comp) == 16);
73static_assert(sizeof(struct ionic_port_init_cmd) == 64);
74static_assert(sizeof(struct ionic_port_init_comp) == 16);
75static_assert(sizeof(struct ionic_port_reset_cmd) == 64);
76static_assert(sizeof(struct ionic_port_reset_comp) == 16);
77static_assert(sizeof(struct ionic_port_getattr_cmd) == 64);
78static_assert(sizeof(struct ionic_port_getattr_comp) == 16);
79static_assert(sizeof(struct ionic_port_setattr_cmd) == 64);
80static_assert(sizeof(struct ionic_port_setattr_comp) == 16);
81
82/* LIF commands */
83static_assert(sizeof(struct ionic_lif_init_cmd) == 64);
84static_assert(sizeof(struct ionic_lif_init_comp) == 16);
85static_assert(sizeof(struct ionic_lif_reset_cmd) == 64);
86static_assert(sizeof(ionic_lif_reset_comp) == 16);
87static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64);
88static_assert(sizeof(struct ionic_lif_getattr_comp) == 16);
89static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64);
90static_assert(sizeof(struct ionic_lif_setattr_comp) == 16);
91
92static_assert(sizeof(struct ionic_q_init_cmd) == 64);
93static_assert(sizeof(struct ionic_q_init_comp) == 16);
94static_assert(sizeof(struct ionic_q_control_cmd) == 64);
95static_assert(sizeof(ionic_q_control_comp) == 16);
96static_assert(sizeof(struct ionic_q_identify_cmd) == 64);
97static_assert(sizeof(struct ionic_q_identify_comp) == 16);
98
99static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64);
100static_assert(sizeof(ionic_rx_mode_set_comp) == 16);
101static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64);
102static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16);
103static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64);
104static_assert(sizeof(ionic_rx_filter_del_comp) == 16);
105
106/* RDMA commands */
107static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64);
108static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64);
109
110/* Events */
111static_assert(sizeof(struct ionic_notifyq_cmd) == 4);
112static_assert(sizeof(union ionic_notifyq_comp) == 64);
113static_assert(sizeof(struct ionic_notifyq_event) == 64);
114static_assert(sizeof(struct ionic_link_change_event) == 64);
115static_assert(sizeof(struct ionic_reset_event) == 64);
116static_assert(sizeof(struct ionic_heartbeat_event) == 64);
117static_assert(sizeof(struct ionic_log_event) == 64);
118
119/* I/O */
120static_assert(sizeof(struct ionic_txq_desc) == 16);
121static_assert(sizeof(struct ionic_txq_sg_desc) == 128);
122static_assert(sizeof(struct ionic_txq_comp) == 16);
123
124static_assert(sizeof(struct ionic_rxq_desc) == 16);
125static_assert(sizeof(struct ionic_rxq_sg_desc) == 128);
126static_assert(sizeof(struct ionic_rxq_comp) == 16);
127
128/* SR/IOV */
129static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64);
130static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
131static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
132static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
133static_assert(sizeof(struct ionic_vf_ctrl_cmd) == 64);
134static_assert(sizeof(struct ionic_vf_ctrl_comp) == 16);
135#endif /* __CHECKER__ */
136
137struct ionic_devinfo {
138 u8 asic_type;
139 u8 asic_rev;
140 char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1];
141 char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1];
142};
143
144struct ionic_dev {
145 union ionic_dev_info_regs __iomem *dev_info_regs;
146 union ionic_dev_cmd_regs __iomem *dev_cmd_regs;
147 struct ionic_hwstamp_regs __iomem *hwstamp_regs;
148
149 atomic_long_t last_check_time;
150 unsigned long last_hb_time;
151 u32 last_fw_hb;
152 bool fw_hb_ready;
153 bool fw_status_ready;
154 u8 fw_generation;
155
156 u64 __iomem *db_pages;
157 dma_addr_t phy_db_pages;
158
159 struct ionic_intr __iomem *intr_ctrl;
160 u64 __iomem *intr_status;
161
162 struct mutex cmb_inuse_lock; /* for cmb_inuse */
163 unsigned long *cmb_inuse;
164 dma_addr_t phy_cmb_pages;
165 u32 cmb_npages;
166
167 u32 port_info_sz;
168 struct ionic_port_info *port_info;
169 dma_addr_t port_info_pa;
170
171 struct ionic_devinfo dev_info;
172};
173
174struct ionic_cq_info {
175 union {
176 void *cq_desc;
177 struct ionic_admin_comp *admincq;
178 struct ionic_notifyq_event *notifyq;
179 };
180};
181
182struct ionic_queue;
183struct ionic_qcq;
184struct ionic_desc_info;
185
186typedef void (*ionic_desc_cb)(struct ionic_queue *q,
187 struct ionic_desc_info *desc_info,
188 struct ionic_cq_info *cq_info, void *cb_arg);
189
190#define IONIC_PAGE_SIZE PAGE_SIZE
191#define IONIC_PAGE_SPLIT_SZ (PAGE_SIZE / 2)
192#define IONIC_PAGE_GFP_MASK (GFP_ATOMIC | __GFP_NOWARN |\
193 __GFP_COMP | __GFP_MEMALLOC)
194
195struct ionic_buf_info {
196 struct page *page;
197 dma_addr_t dma_addr;
198 u32 page_offset;
199 u32 len;
200};
201
202#define IONIC_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1)
203
204struct ionic_desc_info {
205 union {
206 void *desc;
207 struct ionic_txq_desc *txq_desc;
208 struct ionic_rxq_desc *rxq_desc;
209 struct ionic_admin_cmd *adminq_desc;
210 };
211 void __iomem *cmb_desc;
212 union {
213 void *sg_desc;
214 struct ionic_txq_sg_desc *txq_sg_desc;
215 struct ionic_rxq_sg_desc *rxq_sgl_desc;
216 };
217 unsigned int bytes;
218 unsigned int nbufs;
219 struct ionic_buf_info bufs[IONIC_MAX_FRAGS];
220 ionic_desc_cb cb;
221 void *cb_arg;
222};
223
224#define IONIC_QUEUE_NAME_MAX_SZ 32
225
226struct ionic_queue {
227 struct device *dev;
228 struct ionic_lif *lif;
229 struct ionic_desc_info *info;
230 u64 dbval;
231 unsigned long dbell_deadline;
232 unsigned long dbell_jiffies;
233 u16 head_idx;
234 u16 tail_idx;
235 unsigned int index;
236 unsigned int num_descs;
237 unsigned int max_sg_elems;
238 u64 features;
239 u64 drop;
240 struct ionic_dev *idev;
241 unsigned int type;
242 unsigned int hw_index;
243 unsigned int hw_type;
244 union {
245 void *base;
246 struct ionic_txq_desc *txq;
247 struct ionic_rxq_desc *rxq;
248 struct ionic_admin_cmd *adminq;
249 };
250 void __iomem *cmb_base;
251 union {
252 void *sg_base;
253 struct ionic_txq_sg_desc *txq_sgl;
254 struct ionic_rxq_sg_desc *rxq_sgl;
255 };
256 dma_addr_t base_pa;
257 dma_addr_t cmb_base_pa;
258 dma_addr_t sg_base_pa;
259 unsigned int desc_size;
260 unsigned int sg_desc_size;
261 unsigned int pid;
262 char name[IONIC_QUEUE_NAME_MAX_SZ];
263} ____cacheline_aligned_in_smp;
264
265#define IONIC_INTR_INDEX_NOT_ASSIGNED -1
266#define IONIC_INTR_NAME_MAX_SZ 32
267
268struct ionic_intr_info {
269 char name[IONIC_INTR_NAME_MAX_SZ];
270 unsigned int index;
271 unsigned int vector;
272 u64 rearm_count;
273 unsigned int cpu;
274 cpumask_t affinity_mask;
275 u32 dim_coal_hw;
276};
277
278struct ionic_cq {
279 struct ionic_lif *lif;
280 struct ionic_cq_info *info;
281 struct ionic_queue *bound_q;
282 struct ionic_intr_info *bound_intr;
283 u16 tail_idx;
284 bool done_color;
285 unsigned int num_descs;
286 unsigned int desc_size;
287 void *base;
288 dma_addr_t base_pa;
289} ____cacheline_aligned_in_smp;
290
291struct ionic;
292
293static inline void ionic_intr_init(struct ionic_dev *idev,
294 struct ionic_intr_info *intr,
295 unsigned long index)
296{
297 ionic_intr_clean(idev->intr_ctrl, index);
298 intr->index = index;
299}
300
301static inline unsigned int ionic_q_space_avail(struct ionic_queue *q)
302{
303 unsigned int avail = q->tail_idx;
304
305 if (q->head_idx >= avail)
306 avail += q->num_descs - q->head_idx - 1;
307 else
308 avail -= q->head_idx + 1;
309
310 return avail;
311}
312
313static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want)
314{
315 return ionic_q_space_avail(q) >= want;
316}
317
318void ionic_init_devinfo(struct ionic *ionic);
319int ionic_dev_setup(struct ionic *ionic);
320void ionic_dev_teardown(struct ionic *ionic);
321
322void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
323u8 ionic_dev_cmd_status(struct ionic_dev *idev);
324bool ionic_dev_cmd_done(struct ionic_dev *idev);
325void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp);
326
327void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver);
328void ionic_dev_cmd_init(struct ionic_dev *idev);
329void ionic_dev_cmd_reset(struct ionic_dev *idev);
330
331void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
332void ionic_dev_cmd_port_init(struct ionic_dev *idev);
333void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
334void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state);
335void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed);
336void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
337void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
338void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
339
340int ionic_set_vf_config(struct ionic *ionic, int vf,
341 struct ionic_vf_setattr_cmd *vfc);
342int ionic_dev_cmd_vf_getattr(struct ionic *ionic, int vf, u8 attr,
343 struct ionic_vf_getattr_comp *comp);
344void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
345 u16 lif_type, u8 qtype, u8 qver);
346void ionic_vf_start(struct ionic *ionic);
347void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
348void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
349 dma_addr_t addr);
350void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
351void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
352 u16 lif_index, u16 intr_index);
353
354int ionic_db_page_num(struct ionic_lif *lif, int pid);
355
356int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr, int order);
357void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order);
358
359int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
360 struct ionic_intr_info *intr,
361 unsigned int num_descs, size_t desc_size);
362void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa);
363void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
364typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
365typedef void (*ionic_cq_done_cb)(void *done_arg);
366unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
367 ionic_cq_cb cb, ionic_cq_done_cb done_cb,
368 void *done_arg);
369
370int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
371 struct ionic_queue *q, unsigned int index, const char *name,
372 unsigned int num_descs, size_t desc_size,
373 size_t sg_desc_size, unsigned int pid);
374void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
375void ionic_q_cmb_map(struct ionic_queue *q, void __iomem *base, dma_addr_t base_pa);
376void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
377void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
378 void *cb_arg);
379void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start);
380void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
381 unsigned int stop_index);
382int ionic_heartbeat_check(struct ionic *ionic);
383bool ionic_is_fw_running(struct ionic_dev *idev);
384
385bool ionic_adminq_poke_doorbell(struct ionic_queue *q);
386bool ionic_txq_poke_doorbell(struct ionic_queue *q);
387bool ionic_rxq_poke_doorbell(struct ionic_queue *q);
388
389#endif /* _IONIC_DEV_H_ */