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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2012,2013 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7#ifndef __ARM_KVM_ASM_H__ 8#define __ARM_KVM_ASM_H__ 9 10#include <asm/hyp_image.h> 11#include <asm/insn.h> 12#include <asm/virt.h> 13 14#define ARM_EXIT_WITH_SERROR_BIT 31 15#define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_SERROR_BIT)) 16#define ARM_EXCEPTION_IS_TRAP(x) (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_TRAP) 17#define ARM_SERROR_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_SERROR_BIT)) 18 19#define ARM_EXCEPTION_IRQ 0 20#define ARM_EXCEPTION_EL1_SERROR 1 21#define ARM_EXCEPTION_TRAP 2 22#define ARM_EXCEPTION_IL 3 23/* The hyp-stub will return this for any kvm_call_hyp() call */ 24#define ARM_EXCEPTION_HYP_GONE HVC_STUB_ERR 25 26#define kvm_arm_exception_type \ 27 {ARM_EXCEPTION_IRQ, "IRQ" }, \ 28 {ARM_EXCEPTION_EL1_SERROR, "SERROR" }, \ 29 {ARM_EXCEPTION_TRAP, "TRAP" }, \ 30 {ARM_EXCEPTION_HYP_GONE, "HYP_GONE" } 31 32/* 33 * Size of the HYP vectors preamble. kvm_patch_vector_branch() generates code 34 * that jumps over this. 35 */ 36#define KVM_VECTOR_PREAMBLE (2 * AARCH64_INSN_SIZE) 37 38#define KVM_HOST_SMCCC_ID(id) \ 39 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 40 ARM_SMCCC_SMC_64, \ 41 ARM_SMCCC_OWNER_VENDOR_HYP, \ 42 (id)) 43 44#define KVM_HOST_SMCCC_FUNC(name) KVM_HOST_SMCCC_ID(__KVM_HOST_SMCCC_FUNC_##name) 45 46#define __KVM_HOST_SMCCC_FUNC___kvm_hyp_init 0 47 48#ifndef __ASSEMBLY__ 49 50#include <linux/mm.h> 51 52enum __kvm_host_smccc_func { 53 /* Hypercalls available only prior to pKVM finalisation */ 54 /* __KVM_HOST_SMCCC_FUNC___kvm_hyp_init */ 55 __KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1, 56 __KVM_HOST_SMCCC_FUNC___pkvm_init, 57 __KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping, 58 __KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector, 59 __KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs, 60 __KVM_HOST_SMCCC_FUNC___vgic_v3_init_lrs, 61 __KVM_HOST_SMCCC_FUNC___vgic_v3_get_gic_config, 62 __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize, 63 64 /* Hypercalls available after pKVM finalisation */ 65 __KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp, 66 __KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_hyp, 67 __KVM_HOST_SMCCC_FUNC___kvm_adjust_pc, 68 __KVM_HOST_SMCCC_FUNC___kvm_vcpu_run, 69 __KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context, 70 __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid_ipa, 71 __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid, 72 __KVM_HOST_SMCCC_FUNC___kvm_flush_cpu_context, 73 __KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff, 74 __KVM_HOST_SMCCC_FUNC___vgic_v3_read_vmcr, 75 __KVM_HOST_SMCCC_FUNC___vgic_v3_write_vmcr, 76 __KVM_HOST_SMCCC_FUNC___vgic_v3_save_aprs, 77 __KVM_HOST_SMCCC_FUNC___vgic_v3_restore_aprs, 78 __KVM_HOST_SMCCC_FUNC___pkvm_vcpu_init_traps, 79 __KVM_HOST_SMCCC_FUNC___pkvm_init_vm, 80 __KVM_HOST_SMCCC_FUNC___pkvm_init_vcpu, 81 __KVM_HOST_SMCCC_FUNC___pkvm_teardown_vm, 82}; 83 84#define DECLARE_KVM_VHE_SYM(sym) extern char sym[] 85#define DECLARE_KVM_NVHE_SYM(sym) extern char kvm_nvhe_sym(sym)[] 86 87/* 88 * Define a pair of symbols sharing the same name but one defined in 89 * VHE and the other in nVHE hyp implementations. 90 */ 91#define DECLARE_KVM_HYP_SYM(sym) \ 92 DECLARE_KVM_VHE_SYM(sym); \ 93 DECLARE_KVM_NVHE_SYM(sym) 94 95#define DECLARE_KVM_VHE_PER_CPU(type, sym) \ 96 DECLARE_PER_CPU(type, sym) 97#define DECLARE_KVM_NVHE_PER_CPU(type, sym) \ 98 DECLARE_PER_CPU(type, kvm_nvhe_sym(sym)) 99 100#define DECLARE_KVM_HYP_PER_CPU(type, sym) \ 101 DECLARE_KVM_VHE_PER_CPU(type, sym); \ 102 DECLARE_KVM_NVHE_PER_CPU(type, sym) 103 104/* 105 * Compute pointer to a symbol defined in nVHE percpu region. 106 * Returns NULL if percpu memory has not been allocated yet. 107 */ 108#define this_cpu_ptr_nvhe_sym(sym) per_cpu_ptr_nvhe_sym(sym, smp_processor_id()) 109#define per_cpu_ptr_nvhe_sym(sym, cpu) \ 110 ({ \ 111 unsigned long base, off; \ 112 base = kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[cpu]; \ 113 off = (unsigned long)&CHOOSE_NVHE_SYM(sym) - \ 114 (unsigned long)&CHOOSE_NVHE_SYM(__per_cpu_start); \ 115 base ? (typeof(CHOOSE_NVHE_SYM(sym))*)(base + off) : NULL; \ 116 }) 117 118#if defined(__KVM_NVHE_HYPERVISOR__) 119 120#define CHOOSE_NVHE_SYM(sym) sym 121#define CHOOSE_HYP_SYM(sym) CHOOSE_NVHE_SYM(sym) 122 123/* The nVHE hypervisor shouldn't even try to access VHE symbols */ 124extern void *__nvhe_undefined_symbol; 125#define CHOOSE_VHE_SYM(sym) __nvhe_undefined_symbol 126#define this_cpu_ptr_hyp_sym(sym) (&__nvhe_undefined_symbol) 127#define per_cpu_ptr_hyp_sym(sym, cpu) (&__nvhe_undefined_symbol) 128 129#elif defined(__KVM_VHE_HYPERVISOR__) 130 131#define CHOOSE_VHE_SYM(sym) sym 132#define CHOOSE_HYP_SYM(sym) CHOOSE_VHE_SYM(sym) 133 134/* The VHE hypervisor shouldn't even try to access nVHE symbols */ 135extern void *__vhe_undefined_symbol; 136#define CHOOSE_NVHE_SYM(sym) __vhe_undefined_symbol 137#define this_cpu_ptr_hyp_sym(sym) (&__vhe_undefined_symbol) 138#define per_cpu_ptr_hyp_sym(sym, cpu) (&__vhe_undefined_symbol) 139 140#else 141 142/* 143 * BIG FAT WARNINGS: 144 * 145 * - Don't be tempted to change the following is_kernel_in_hyp_mode() 146 * to has_vhe(). has_vhe() is implemented as a *final* capability, 147 * while this is used early at boot time, when the capabilities are 148 * not final yet.... 149 * 150 * - Don't let the nVHE hypervisor have access to this, as it will 151 * pick the *wrong* symbol (yes, it runs at EL2...). 152 */ 153#define CHOOSE_HYP_SYM(sym) (is_kernel_in_hyp_mode() \ 154 ? CHOOSE_VHE_SYM(sym) \ 155 : CHOOSE_NVHE_SYM(sym)) 156 157#define this_cpu_ptr_hyp_sym(sym) (is_kernel_in_hyp_mode() \ 158 ? this_cpu_ptr(&sym) \ 159 : this_cpu_ptr_nvhe_sym(sym)) 160 161#define per_cpu_ptr_hyp_sym(sym, cpu) (is_kernel_in_hyp_mode() \ 162 ? per_cpu_ptr(&sym, cpu) \ 163 : per_cpu_ptr_nvhe_sym(sym, cpu)) 164 165#define CHOOSE_VHE_SYM(sym) sym 166#define CHOOSE_NVHE_SYM(sym) kvm_nvhe_sym(sym) 167 168#endif 169 170struct kvm_nvhe_init_params { 171 unsigned long mair_el2; 172 unsigned long tcr_el2; 173 unsigned long tpidr_el2; 174 unsigned long stack_hyp_va; 175 unsigned long stack_pa; 176 phys_addr_t pgd_pa; 177 unsigned long hcr_el2; 178 unsigned long vttbr; 179 unsigned long vtcr; 180}; 181 182/* 183 * Used by the host in EL1 to dump the nVHE hypervisor backtrace on 184 * hyp_panic() in non-protected mode. 185 * 186 * @stack_base: hyp VA of the hyp_stack base. 187 * @overflow_stack_base: hyp VA of the hyp_overflow_stack base. 188 * @fp: hyp FP where the backtrace begins. 189 * @pc: hyp PC where the backtrace begins. 190 */ 191struct kvm_nvhe_stacktrace_info { 192 unsigned long stack_base; 193 unsigned long overflow_stack_base; 194 unsigned long fp; 195 unsigned long pc; 196}; 197 198/* Translate a kernel address @ptr into its equivalent linear mapping */ 199#define kvm_ksym_ref(ptr) \ 200 ({ \ 201 void *val = (ptr); \ 202 if (!is_kernel_in_hyp_mode()) \ 203 val = lm_alias((ptr)); \ 204 val; \ 205 }) 206#define kvm_ksym_ref_nvhe(sym) kvm_ksym_ref(kvm_nvhe_sym(sym)) 207 208struct kvm; 209struct kvm_vcpu; 210struct kvm_s2_mmu; 211 212DECLARE_KVM_NVHE_SYM(__kvm_hyp_init); 213DECLARE_KVM_HYP_SYM(__kvm_hyp_vector); 214#define __kvm_hyp_init CHOOSE_NVHE_SYM(__kvm_hyp_init) 215#define __kvm_hyp_vector CHOOSE_HYP_SYM(__kvm_hyp_vector) 216 217extern unsigned long kvm_nvhe_sym(kvm_arm_hyp_percpu_base)[]; 218DECLARE_KVM_NVHE_SYM(__per_cpu_start); 219DECLARE_KVM_NVHE_SYM(__per_cpu_end); 220 221DECLARE_KVM_HYP_SYM(__bp_harden_hyp_vecs); 222#define __bp_harden_hyp_vecs CHOOSE_HYP_SYM(__bp_harden_hyp_vecs) 223 224extern void __kvm_flush_vm_context(void); 225extern void __kvm_flush_cpu_context(struct kvm_s2_mmu *mmu); 226extern void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa, 227 int level); 228extern void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu); 229 230extern void __kvm_timer_set_cntvoff(u64 cntvoff); 231 232extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu); 233 234extern void __kvm_adjust_pc(struct kvm_vcpu *vcpu); 235 236extern u64 __vgic_v3_get_gic_config(void); 237extern u64 __vgic_v3_read_vmcr(void); 238extern void __vgic_v3_write_vmcr(u32 vmcr); 239extern void __vgic_v3_init_lrs(void); 240 241extern u64 __kvm_get_mdcr_el2(void); 242 243#define __KVM_EXTABLE(from, to) \ 244 " .pushsection __kvm_ex_table, \"a\"\n" \ 245 " .align 3\n" \ 246 " .long (" #from " - .), (" #to " - .)\n" \ 247 " .popsection\n" 248 249 250#define __kvm_at(at_op, addr) \ 251( { \ 252 int __kvm_at_err = 0; \ 253 u64 spsr, elr; \ 254 asm volatile( \ 255 " mrs %1, spsr_el2\n" \ 256 " mrs %2, elr_el2\n" \ 257 "1: at "at_op", %3\n" \ 258 " isb\n" \ 259 " b 9f\n" \ 260 "2: msr spsr_el2, %1\n" \ 261 " msr elr_el2, %2\n" \ 262 " mov %w0, %4\n" \ 263 "9:\n" \ 264 __KVM_EXTABLE(1b, 2b) \ 265 : "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \ 266 : "r" (addr), "i" (-EFAULT)); \ 267 __kvm_at_err; \ 268} ) 269 270 271#else /* __ASSEMBLY__ */ 272 273.macro get_host_ctxt reg, tmp 274 adr_this_cpu \reg, kvm_host_data, \tmp 275 add \reg, \reg, #HOST_DATA_CONTEXT 276.endm 277 278.macro get_vcpu_ptr vcpu, ctxt 279 get_host_ctxt \ctxt, \vcpu 280 ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU] 281.endm 282 283.macro get_loaded_vcpu vcpu, ctxt 284 adr_this_cpu \ctxt, kvm_hyp_ctxt, \vcpu 285 ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU] 286.endm 287 288.macro set_loaded_vcpu vcpu, ctxt, tmp 289 adr_this_cpu \ctxt, kvm_hyp_ctxt, \tmp 290 str \vcpu, [\ctxt, #HOST_CONTEXT_VCPU] 291.endm 292 293/* 294 * KVM extable for unexpected exceptions. 295 * Create a struct kvm_exception_table_entry output to a section that can be 296 * mapped by EL2. The table is not sorted. 297 * 298 * The caller must ensure: 299 * x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented 300 * code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup. 301 */ 302.macro _kvm_extable, from, to 303 .pushsection __kvm_ex_table, "a" 304 .align 3 305 .long (\from - .), (\to - .) 306 .popsection 307.endm 308 309#define CPU_XREG_OFFSET(x) (CPU_USER_PT_REGS + 8*x) 310#define CPU_LR_OFFSET CPU_XREG_OFFSET(30) 311#define CPU_SP_EL0_OFFSET (CPU_LR_OFFSET + 8) 312 313/* 314 * We treat x18 as callee-saved as the host may use it as a platform 315 * register (e.g. for shadow call stack). 316 */ 317.macro save_callee_saved_regs ctxt 318 str x18, [\ctxt, #CPU_XREG_OFFSET(18)] 319 stp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)] 320 stp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)] 321 stp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)] 322 stp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)] 323 stp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)] 324 stp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] 325.endm 326 327.macro restore_callee_saved_regs ctxt 328 // We require \ctxt is not x18-x28 329 ldr x18, [\ctxt, #CPU_XREG_OFFSET(18)] 330 ldp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)] 331 ldp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)] 332 ldp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)] 333 ldp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)] 334 ldp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)] 335 ldp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)] 336.endm 337 338.macro save_sp_el0 ctxt, tmp 339 mrs \tmp, sp_el0 340 str \tmp, [\ctxt, #CPU_SP_EL0_OFFSET] 341.endm 342 343.macro restore_sp_el0 ctxt, tmp 344 ldr \tmp, [\ctxt, #CPU_SP_EL0_OFFSET] 345 msr sp_el0, \tmp 346.endm 347 348#endif 349 350#endif /* __ARM_KVM_ASM_H__ */