tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# Phy drivers for Qualcomm and Atheros platforms
4#
5config PHY_ATH79_USB
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
7 depends on OF && (ATH79 || COMPILE_TEST)
8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
9 select RESET_CONTROLLER
10 select GENERIC_PHY
11 help
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
13
14config PHY_QCOM_APQ8064_SATA
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
16 depends on ARCH_QCOM
17 depends on HAS_IOMEM
18 depends on OF
19 select GENERIC_PHY
20
21config PHY_QCOM_EDP
22 tristate "Qualcomm eDP PHY driver"
23 depends on ARCH_QCOM || COMPILE_TEST
24 depends on OF
25 depends on COMMON_CLK
26 select GENERIC_PHY
27 help
28 Enable this driver to support the Qualcomm eDP PHY found in various
29 Qualcomm chipsets.
30
31config PHY_QCOM_IPQ4019_USB
32 tristate "Qualcomm IPQ4019 USB PHY driver"
33 depends on OF && (ARCH_QCOM || COMPILE_TEST)
34 select GENERIC_PHY
35 help
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
37
38config PHY_QCOM_IPQ806X_SATA
39 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
40 depends on ARCH_QCOM
41 depends on HAS_IOMEM
42 depends on OF
43 select GENERIC_PHY
44
45config PHY_QCOM_PCIE2
46 tristate "Qualcomm PCIe Gen2 PHY Driver"
47 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
48 select GENERIC_PHY
49 help
50 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
51 based PCIe controller.
52
53menuconfig PHY_QCOM_QMP
54 tristate "Qualcomm QMP PHY Drivers"
55 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
56
57if PHY_QCOM_QMP
58
59config PHY_QCOM_QMP_COMBO
60 tristate "Qualcomm QMP Combo PHY Driver"
61 default PHY_QCOM_QMP
62 select GENERIC_PHY
63 select MFD_SYSCON
64 help
65 Enable this to support the QMP Combo PHY transceiver that is used
66 with USB3 and DisplayPort controllers on Qualcomm chips.
67
68config PHY_QCOM_QMP_PCIE
69 tristate "Qualcomm QMP PCIe PHY Driver"
70 depends on PCI || COMPILE_TEST
71 select GENERIC_PHY
72 default PHY_QCOM_QMP
73 help
74 Enable this to support the QMP PCIe PHY transceiver that is used
75 with PCIe controllers on Qualcomm chips.
76
77config PHY_QCOM_QMP_PCIE_8996
78 tristate "Qualcomm QMP PCIe 8996 PHY Driver"
79 depends on PCI || COMPILE_TEST
80 select GENERIC_PHY
81 default PHY_QCOM_QMP
82 help
83 Enable this to support the QMP PCIe PHY transceiver that is used
84 with PCIe controllers on Qualcomm msm8996 chips.
85
86config PHY_QCOM_QMP_UFS
87 tristate "Qualcomm QMP UFS PHY Driver"
88 select GENERIC_PHY
89 default PHY_QCOM_QMP
90 help
91 Enable this to support the QMP UFS PHY transceiver that is used
92 with UFS controllers on Qualcomm chips.
93
94config PHY_QCOM_QMP_USB
95 tristate "Qualcomm QMP USB PHY Driver"
96 select GENERIC_PHY
97 default PHY_QCOM_QMP
98 help
99 Enable this to support the QMP USB PHY transceiver that is used
100 with USB3 controllers on Qualcomm chips.
101
102endif # PHY_QCOM_QMP
103
104config PHY_QCOM_QUSB2
105 tristate "Qualcomm QUSB2 PHY Driver"
106 depends on OF && (ARCH_QCOM || COMPILE_TEST)
107 depends on NVMEM || !NVMEM
108 select GENERIC_PHY
109 help
110 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
111 controllers on Qualcomm chips. This driver supports the high-speed
112 PHY which is usually paired with either the ChipIdea or Synopsys DWC3
113 USB IPs on MSM SOCs.
114
115config PHY_QCOM_SNPS_EUSB2
116 tristate "Qualcomm SNPS eUSB2 PHY Driver"
117 depends on OF && (ARCH_QCOM || COMPILE_TEST)
118 select GENERIC_PHY
119 help
120 Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
121 chipsets. The PHY is paired with a Synopsys DWC3 USB controller
122 on Qualcomm SOCs.
123
124config PHY_QCOM_EUSB2_REPEATER
125 tristate "Qualcomm SNPS eUSB2 Repeater Driver"
126 depends on OF && (ARCH_QCOM || COMPILE_TEST)
127 select GENERIC_PHY
128 help
129 Enable support for the USB high-speed SNPS eUSB2 repeater on Qualcomm
130 PMICs. The repeater is paired with a Synopsys eUSB2 Phy
131 on Qualcomm SOCs.
132
133config PHY_QCOM_USB_HS
134 tristate "Qualcomm USB HS PHY module"
135 depends on USB_ULPI_BUS
136 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
137 select GENERIC_PHY
138 help
139 Support for the USB high-speed ULPI compliant phy on Qualcomm
140 chipsets.
141
142config PHY_QCOM_USB_SNPS_FEMTO_V2
143 tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
144 depends on OF && (ARCH_QCOM || COMPILE_TEST)
145 select GENERIC_PHY
146 help
147 Enable support for the USB high-speed SNPS Femto phy on Qualcomm
148 chipsets. This PHY has differences in the register map compared
149 to the V1 variants. The PHY is paired with a Synopsys DWC3 USB
150 controller on Qualcomm SOCs.
151
152config PHY_QCOM_USB_HSIC
153 tristate "Qualcomm USB HSIC ULPI PHY module"
154 depends on USB_ULPI_BUS
155 select GENERIC_PHY
156 help
157 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
158
159config PHY_QCOM_USB_HS_28NM
160 tristate "Qualcomm 28nm High-Speed PHY"
161 depends on OF && (ARCH_QCOM || COMPILE_TEST)
162 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
163 select GENERIC_PHY
164 help
165 Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
166 High-Speed PHY driver. This driver supports the Hi-Speed PHY which
167 is usually paired with either the ChipIdea or Synopsys DWC3 USB
168 IPs on MSM SOCs.
169
170config PHY_QCOM_USB_SS
171 tristate "Qualcomm USB Super-Speed PHY driver"
172 depends on OF && (ARCH_QCOM || COMPILE_TEST)
173 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
174 select GENERIC_PHY
175 help
176 Enable this to support the Super-Speed USB transceiver on various
177 Qualcomm chipsets.
178
179config PHY_QCOM_IPQ806X_USB
180 tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
181 depends on HAS_IOMEM
182 depends on OF && (ARCH_QCOM || COMPILE_TEST)
183 select GENERIC_PHY
184 help
185 This option enables support for the Synopsis PHYs present inside the
186 Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
187 both HS and SS PHY controllers.