tjh.dev
Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Rockchip 10/100/1000 Ethernet driver(GMAC)
8
9maintainers:
10 - David Wu <david.wu@rock-chips.com>
11
12# We need a select here so we don't match all nodes with 'snps,dwmac'
13select:
14 properties:
15 compatible:
16 contains:
17 enum:
18 - rockchip,px30-gmac
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
22 - rockchip,rk3308-gmac
23 - rockchip,rk3328-gmac
24 - rockchip,rk3366-gmac
25 - rockchip,rk3368-gmac
26 - rockchip,rk3399-gmac
27 - rockchip,rk3568-gmac
28 - rockchip,rk3588-gmac
29 - rockchip,rv1108-gmac
30 - rockchip,rv1126-gmac
31 required:
32 - compatible
33
34allOf:
35 - $ref: "snps,dwmac.yaml#"
36
37properties:
38 compatible:
39 oneOf:
40 - items:
41 - enum:
42 - rockchip,px30-gmac
43 - rockchip,rk3128-gmac
44 - rockchip,rk3228-gmac
45 - rockchip,rk3288-gmac
46 - rockchip,rk3308-gmac
47 - rockchip,rk3328-gmac
48 - rockchip,rk3366-gmac
49 - rockchip,rk3368-gmac
50 - rockchip,rk3399-gmac
51 - rockchip,rv1108-gmac
52 - items:
53 - enum:
54 - rockchip,rk3568-gmac
55 - rockchip,rk3588-gmac
56 - rockchip,rv1126-gmac
57 - const: snps,dwmac-4.20a
58
59 clocks:
60 minItems: 5
61 maxItems: 8
62
63 clock-names:
64 contains:
65 enum:
66 - stmmaceth
67 - mac_clk_tx
68 - mac_clk_rx
69 - aclk_mac
70 - pclk_mac
71 - clk_mac_ref
72 - clk_mac_refout
73 - clk_mac_speed
74
75 clock_in_out:
76 description:
77 For RGMII, it must be "input", means main clock(125MHz)
78 is not sourced from SoC's PLL, but input from PHY.
79 For RMII, "input" means PHY provides the reference clock(50MHz),
80 "output" means GMAC provides the reference clock.
81 $ref: /schemas/types.yaml#/definitions/string
82 enum: [input, output]
83
84 rockchip,grf:
85 description: The phandle of the syscon node for the general register file.
86 $ref: /schemas/types.yaml#/definitions/phandle
87
88 rockchip,php-grf:
89 description:
90 The phandle of the syscon node for the peripheral general register file.
91 $ref: /schemas/types.yaml#/definitions/phandle
92
93 tx_delay:
94 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
95 $ref: /schemas/types.yaml#/definitions/uint32
96
97 rx_delay:
98 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
99 $ref: /schemas/types.yaml#/definitions/uint32
100
101 phy-supply:
102 description: PHY regulator
103
104required:
105 - compatible
106 - clocks
107 - clock-names
108
109unevaluatedProperties: false
110
111examples:
112 - |
113 #include <dt-bindings/interrupt-controller/arm-gic.h>
114 #include <dt-bindings/clock/rk3288-cru.h>
115
116 gmac: ethernet@ff290000 {
117 compatible = "rockchip,rk3288-gmac";
118 reg = <0xff290000 0x10000>;
119 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
120 interrupt-names = "macirq";
121 clocks = <&cru SCLK_MAC>,
122 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
123 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
124 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
125 clock-names = "stmmaceth",
126 "mac_clk_rx", "mac_clk_tx",
127 "clk_mac_ref", "clk_mac_refout",
128 "aclk_mac", "pclk_mac";
129 assigned-clocks = <&cru SCLK_MAC>;
130 assigned-clock-parents = <&ext_gmac>;
131
132 rockchip,grf = <&grf>;
133 phy-mode = "rgmii";
134 clock_in_out = "input";
135 tx_delay = <0x30>;
136 rx_delay = <0x10>;
137 };