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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2022 Intel Corporation. All rights reserved.
7 */
8
9#ifndef __INCLUDE_SOUND_SOF_IPC4_HEADER_H__
10#define __INCLUDE_SOUND_SOF_IPC4_HEADER_H__
11
12#include <linux/types.h>
13#include <uapi/sound/sof/abi.h>
14
15/* maximum message size for mailbox Tx/Rx */
16#define SOF_IPC4_MSG_MAX_SIZE 4096
17
18/** \addtogroup sof_uapi uAPI
19 * SOF uAPI specification.
20 * @{
21 */
22
23/**
24 * struct sof_ipc4_msg - Placeholder of an IPC4 message
25 * @header_u64: IPC4 header as single u64 number
26 * @primary: Primary, mandatory part of the header
27 * @extension: Extended part of the header, if not used it should be
28 * set to 0
29 * @data_size: Size of data in bytes pointed by @data_ptr
30 * @data_ptr: Pointer to the optional payload of a message
31 */
32struct sof_ipc4_msg {
33 union {
34 u64 header_u64;
35 struct {
36 u32 primary;
37 u32 extension;
38 };
39 };
40
41 size_t data_size;
42 void *data_ptr;
43};
44
45/**
46 * struct sof_ipc4_tuple - Generic type/ID and parameter tuple
47 * @type: type/ID
48 * @size: size of the @value array in bytes
49 * @value: value for the given type
50 */
51struct sof_ipc4_tuple {
52 uint32_t type;
53 uint32_t size;
54 uint32_t value[];
55} __packed;
56
57/*
58 * IPC4 messages have two 32 bit identifier made up as follows :-
59 *
60 * header - msg type, msg id, msg direction ...
61 * extension - extra params such as msg data size in mailbox
62 *
63 * These are sent at the start of the IPC message in the mailbox. Messages
64 * should not be sent in the doorbell (special exceptions for firmware).
65 */
66
67/*
68 * IPC4 primary header bit allocation for messages
69 * bit 0-23: message type specific
70 * bit 24-28: type: enum sof_ipc4_global_msg if target is SOF_IPC4_FW_GEN_MSG
71 * enum sof_ipc4_module_type if target is SOF_IPC4_MODULE_MSG
72 * bit 29: response - sof_ipc4_msg_dir
73 * bit 30: target - enum sof_ipc4_msg_target
74 * bit 31: reserved, unused
75 */
76
77/* Value of target field - must fit into 1 bit */
78enum sof_ipc4_msg_target {
79 /* Global FW message */
80 SOF_IPC4_FW_GEN_MSG,
81
82 /* Module message */
83 SOF_IPC4_MODULE_MSG
84};
85
86/* Value of type field - must fit into 5 bits */
87enum sof_ipc4_global_msg {
88 SOF_IPC4_GLB_BOOT_CONFIG,
89 SOF_IPC4_GLB_ROM_CONTROL,
90 SOF_IPC4_GLB_IPCGATEWAY_CMD,
91
92 /* 3 .. 12: RESERVED - do not use */
93
94 SOF_IPC4_GLB_PERF_MEASUREMENTS_CMD = 13,
95 SOF_IPC4_GLB_CHAIN_DMA,
96
97 SOF_IPC4_GLB_LOAD_MULTIPLE_MODULES,
98 SOF_IPC4_GLB_UNLOAD_MULTIPLE_MODULES,
99
100 /* pipeline settings */
101 SOF_IPC4_GLB_CREATE_PIPELINE,
102 SOF_IPC4_GLB_DELETE_PIPELINE,
103 SOF_IPC4_GLB_SET_PIPELINE_STATE,
104 SOF_IPC4_GLB_GET_PIPELINE_STATE,
105 SOF_IPC4_GLB_GET_PIPELINE_CONTEXT_SIZE,
106 SOF_IPC4_GLB_SAVE_PIPELINE,
107 SOF_IPC4_GLB_RESTORE_PIPELINE,
108
109 /* Loads library (using Code Load or HD/A Host Output DMA) */
110 SOF_IPC4_GLB_LOAD_LIBRARY,
111
112 /* 25: RESERVED - do not use */
113
114 SOF_IPC4_GLB_INTERNAL_MESSAGE = 26,
115
116 /* Notification (FW to SW driver) */
117 SOF_IPC4_GLB_NOTIFICATION,
118
119 /* 28 .. 31: RESERVED - do not use */
120
121 SOF_IPC4_GLB_TYPE_LAST,
122};
123
124/* Value of response field - must fit into 1 bit */
125enum sof_ipc4_msg_dir {
126 SOF_IPC4_MSG_REQUEST,
127 SOF_IPC4_MSG_REPLY,
128};
129
130enum sof_ipc4_pipeline_state {
131 SOF_IPC4_PIPE_INVALID_STATE,
132 SOF_IPC4_PIPE_UNINITIALIZED,
133 SOF_IPC4_PIPE_RESET,
134 SOF_IPC4_PIPE_PAUSED,
135 SOF_IPC4_PIPE_RUNNING,
136 SOF_IPC4_PIPE_EOS
137};
138
139/* Generic message fields (bit 24-30) */
140
141/* encoded to header's msg_tgt field */
142#define SOF_IPC4_MSG_TARGET_SHIFT 30
143#define SOF_IPC4_MSG_TARGET_MASK BIT(30)
144#define SOF_IPC4_MSG_TARGET(x) ((x) << SOF_IPC4_MSG_TARGET_SHIFT)
145#define SOF_IPC4_MSG_IS_MODULE_MSG(x) ((x) & SOF_IPC4_MSG_TARGET_MASK ? 1 : 0)
146
147/* encoded to header's rsp field */
148#define SOF_IPC4_MSG_DIR_SHIFT 29
149#define SOF_IPC4_MSG_DIR_MASK BIT(29)
150#define SOF_IPC4_MSG_DIR(x) ((x) << SOF_IPC4_MSG_DIR_SHIFT)
151
152/* encoded to header's type field */
153#define SOF_IPC4_MSG_TYPE_SHIFT 24
154#define SOF_IPC4_MSG_TYPE_MASK GENMASK(28, 24)
155#define SOF_IPC4_MSG_TYPE_SET(x) (((x) << SOF_IPC4_MSG_TYPE_SHIFT) & \
156 SOF_IPC4_MSG_TYPE_MASK)
157#define SOF_IPC4_MSG_TYPE_GET(x) (((x) & SOF_IPC4_MSG_TYPE_MASK) >> \
158 SOF_IPC4_MSG_TYPE_SHIFT)
159
160/* Global message type specific field definitions */
161
162/* pipeline creation ipc msg */
163#define SOF_IPC4_GLB_PIPE_INSTANCE_SHIFT 16
164#define SOF_IPC4_GLB_PIPE_INSTANCE_MASK GENMASK(23, 16)
165#define SOF_IPC4_GLB_PIPE_INSTANCE_ID(x) ((x) << SOF_IPC4_GLB_PIPE_INSTANCE_SHIFT)
166
167#define SOF_IPC4_GLB_PIPE_PRIORITY_SHIFT 11
168#define SOF_IPC4_GLB_PIPE_PRIORITY_MASK GENMASK(15, 11)
169#define SOF_IPC4_GLB_PIPE_PRIORITY(x) ((x) << SOF_IPC4_GLB_PIPE_PRIORITY_SHIFT)
170
171#define SOF_IPC4_GLB_PIPE_MEM_SIZE_SHIFT 0
172#define SOF_IPC4_GLB_PIPE_MEM_SIZE_MASK GENMASK(10, 0)
173#define SOF_IPC4_GLB_PIPE_MEM_SIZE(x) ((x) << SOF_IPC4_GLB_PIPE_MEM_SIZE_SHIFT)
174
175#define SOF_IPC4_GLB_PIPE_EXT_LP_SHIFT 0
176#define SOF_IPC4_GLB_PIPE_EXT_LP_MASK BIT(0)
177#define SOF_IPC4_GLB_PIPE_EXT_LP(x) ((x) << SOF_IPC4_GLB_PIPE_EXT_LP_SHIFT)
178
179/* pipeline set state ipc msg */
180#define SOF_IPC4_GLB_PIPE_STATE_ID_SHIFT 16
181#define SOF_IPC4_GLB_PIPE_STATE_ID_MASK GENMASK(23, 16)
182#define SOF_IPC4_GLB_PIPE_STATE_ID(x) ((x) << SOF_IPC4_GLB_PIPE_STATE_ID_SHIFT)
183
184#define SOF_IPC4_GLB_PIPE_STATE_SHIFT 0
185#define SOF_IPC4_GLB_PIPE_STATE_MASK GENMASK(15, 0)
186#define SOF_IPC4_GLB_PIPE_STATE(x) ((x) << SOF_IPC4_GLB_PIPE_STATE_SHIFT)
187
188/* pipeline set state IPC msg extension */
189#define SOF_IPC4_GLB_PIPE_STATE_EXT_MULTI BIT(0)
190
191/* load library ipc msg */
192#define SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID_SHIFT 16
193#define SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID(x) ((x) << SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID_SHIFT)
194
195enum sof_ipc4_channel_config {
196 /* one channel only. */
197 SOF_IPC4_CHANNEL_CONFIG_MONO,
198 /* L & R. */
199 SOF_IPC4_CHANNEL_CONFIG_STEREO,
200 /* L, R & LFE; PCM only. */
201 SOF_IPC4_CHANNEL_CONFIG_2_POINT_1,
202 /* L, C & R; MP3 & AAC only. */
203 SOF_IPC4_CHANNEL_CONFIG_3_POINT_0,
204 /* L, C, R & LFE; PCM only. */
205 SOF_IPC4_CHANNEL_CONFIG_3_POINT_1,
206 /* L, R, Ls & Rs; PCM only. */
207 SOF_IPC4_CHANNEL_CONFIG_QUATRO,
208 /* L, C, R & Cs; MP3 & AAC only. */
209 SOF_IPC4_CHANNEL_CONFIG_4_POINT_0,
210 /* L, C, R, Ls & Rs. */
211 SOF_IPC4_CHANNEL_CONFIG_5_POINT_0,
212 /* L, C, R, Ls, Rs & LFE. */
213 SOF_IPC4_CHANNEL_CONFIG_5_POINT_1,
214 /* one channel replicated in two. */
215 SOF_IPC4_CHANNEL_CONFIG_DUAL_MONO,
216 /* Stereo (L,R) in 4 slots, 1st stream: [ L, R, -, - ] */
217 SOF_IPC4_CHANNEL_CONFIG_I2S_DUAL_STEREO_0,
218 /* Stereo (L,R) in 4 slots, 2nd stream: [ -, -, L, R ] */
219 SOF_IPC4_CHANNEL_CONFIG_I2S_DUAL_STEREO_1,
220 /* L, C, R, Ls, Rs & LFE., LS, RS */
221 SOF_IPC4_CHANNEL_CONFIG_7_POINT_1,
222};
223
224enum sof_ipc4_interleaved_style {
225 SOF_IPC4_CHANNELS_INTERLEAVED,
226 SOF_IPC4_CHANNELS_NONINTERLEAVED,
227};
228
229enum sof_ipc4_sample_type {
230 SOF_IPC4_MSB_INTEGER, /* integer with Most Significant Byte first */
231 SOF_IPC4_LSB_INTEGER, /* integer with Least Significant Byte first */
232};
233
234struct sof_ipc4_audio_format {
235 uint32_t sampling_frequency;
236 uint32_t bit_depth;
237 uint32_t ch_map;
238 uint32_t ch_cfg; /* sof_ipc4_channel_config */
239 uint32_t interleaving_style;
240 uint32_t fmt_cfg; /* channels_count valid_bit_depth s_type */
241} __packed __aligned(4);
242
243#define SOF_IPC4_AUDIO_FORMAT_CFG_CHANNELS_COUNT_SHIFT 0
244#define SOF_IPC4_AUDIO_FORMAT_CFG_CHANNELS_COUNT_MASK GENMASK(7, 0)
245#define SOF_IPC4_AUDIO_FORMAT_CFG_CHANNELS_COUNT(x) \
246 ((x) & SOF_IPC4_AUDIO_FORMAT_CFG_CHANNELS_COUNT_MASK)
247#define SOF_IPC4_AUDIO_FORMAT_CFG_V_BIT_DEPTH_SHIFT 8
248#define SOF_IPC4_AUDIO_FORMAT_CFG_V_BIT_DEPTH_MASK GENMASK(15, 8)
249#define SOF_IPC4_AUDIO_FORMAT_CFG_V_BIT_DEPTH(x) \
250 (((x) & SOF_IPC4_AUDIO_FORMAT_CFG_V_BIT_DEPTH_MASK) >> \
251 SOF_IPC4_AUDIO_FORMAT_CFG_V_BIT_DEPTH_SHIFT)
252#define SOF_IPC4_AUDIO_FORMAT_CFG_SAMPLE_TYPE_SHIFT 16
253#define SOF_IPC4_AUDIO_FORMAT_CFG_SAMPLE_TYPE_MASK GENMASK(23, 16)
254#define SOF_IPC4_AUDIO_FORMAT_CFG_SAMPLE_TYPE(x) \
255 (((x) & SOF_IPC4_AUDIO_FORMAT_CFG_SAMPLE_TYPE_MASK) >> \
256 SOF_IPC4_AUDIO_FORMAT_CFG_SAMPLE_TYPE_SHIFT)
257
258/* Module message type specific field definitions */
259
260enum sof_ipc4_module_type {
261 SOF_IPC4_MOD_INIT_INSTANCE,
262 SOF_IPC4_MOD_CONFIG_GET,
263 SOF_IPC4_MOD_CONFIG_SET,
264 SOF_IPC4_MOD_LARGE_CONFIG_GET,
265 SOF_IPC4_MOD_LARGE_CONFIG_SET,
266 SOF_IPC4_MOD_BIND,
267 SOF_IPC4_MOD_UNBIND,
268 SOF_IPC4_MOD_SET_DX,
269 SOF_IPC4_MOD_SET_D0IX,
270 SOF_IPC4_MOD_ENTER_MODULE_RESTORE,
271 SOF_IPC4_MOD_EXIT_MODULE_RESTORE,
272 SOF_IPC4_MOD_DELETE_INSTANCE,
273
274 SOF_IPC4_MOD_TYPE_LAST,
275};
276
277struct sof_ipc4_base_module_cfg {
278 uint32_t cpc; /* the max count of Cycles Per Chunk processing */
279 uint32_t ibs; /* input Buffer Size (in bytes) */
280 uint32_t obs; /* output Buffer Size (in bytes) */
281 uint32_t is_pages; /* number of physical pages used */
282 struct sof_ipc4_audio_format audio_fmt;
283} __packed __aligned(4);
284
285/* common module ipc msg */
286#define SOF_IPC4_MOD_INSTANCE_SHIFT 16
287#define SOF_IPC4_MOD_INSTANCE_MASK GENMASK(23, 16)
288#define SOF_IPC4_MOD_INSTANCE(x) ((x) << SOF_IPC4_MOD_INSTANCE_SHIFT)
289
290#define SOF_IPC4_MOD_ID_SHIFT 0
291#define SOF_IPC4_MOD_ID_MASK GENMASK(15, 0)
292#define SOF_IPC4_MOD_ID(x) ((x) << SOF_IPC4_MOD_ID_SHIFT)
293
294/* init module ipc msg */
295#define SOF_IPC4_MOD_EXT_PARAM_SIZE_SHIFT 0
296#define SOF_IPC4_MOD_EXT_PARAM_SIZE_MASK GENMASK(15, 0)
297#define SOF_IPC4_MOD_EXT_PARAM_SIZE(x) ((x) << SOF_IPC4_MOD_EXT_PARAM_SIZE_SHIFT)
298
299#define SOF_IPC4_MOD_EXT_PPL_ID_SHIFT 16
300#define SOF_IPC4_MOD_EXT_PPL_ID_MASK GENMASK(23, 16)
301#define SOF_IPC4_MOD_EXT_PPL_ID(x) ((x) << SOF_IPC4_MOD_EXT_PPL_ID_SHIFT)
302
303#define SOF_IPC4_MOD_EXT_CORE_ID_SHIFT 24
304#define SOF_IPC4_MOD_EXT_CORE_ID_MASK GENMASK(27, 24)
305#define SOF_IPC4_MOD_EXT_CORE_ID(x) ((x) << SOF_IPC4_MOD_EXT_CORE_ID_SHIFT)
306
307#define SOF_IPC4_MOD_EXT_DOMAIN_SHIFT 28
308#define SOF_IPC4_MOD_EXT_DOMAIN_MASK BIT(28)
309#define SOF_IPC4_MOD_EXT_DOMAIN(x) ((x) << SOF_IPC4_MOD_EXT_DOMAIN_SHIFT)
310
311/* bind/unbind module ipc msg */
312#define SOF_IPC4_MOD_EXT_DST_MOD_ID_SHIFT 0
313#define SOF_IPC4_MOD_EXT_DST_MOD_ID_MASK GENMASK(15, 0)
314#define SOF_IPC4_MOD_EXT_DST_MOD_ID(x) ((x) << SOF_IPC4_MOD_EXT_DST_MOD_ID_SHIFT)
315
316#define SOF_IPC4_MOD_EXT_DST_MOD_INSTANCE_SHIFT 16
317#define SOF_IPC4_MOD_EXT_DST_MOD_INSTANCE_MASK GENMASK(23, 16)
318#define SOF_IPC4_MOD_EXT_DST_MOD_INSTANCE(x) ((x) << SOF_IPC4_MOD_EXT_DST_MOD_INSTANCE_SHIFT)
319
320#define SOF_IPC4_MOD_EXT_DST_MOD_QUEUE_ID_SHIFT 24
321#define SOF_IPC4_MOD_EXT_DST_MOD_QUEUE_ID_MASK GENMASK(26, 24)
322#define SOF_IPC4_MOD_EXT_DST_MOD_QUEUE_ID(x) ((x) << SOF_IPC4_MOD_EXT_DST_MOD_QUEUE_ID_SHIFT)
323
324#define SOF_IPC4_MOD_EXT_SRC_MOD_QUEUE_ID_SHIFT 27
325#define SOF_IPC4_MOD_EXT_SRC_MOD_QUEUE_ID_MASK GENMASK(29, 27)
326#define SOF_IPC4_MOD_EXT_SRC_MOD_QUEUE_ID(x) ((x) << SOF_IPC4_MOD_EXT_SRC_MOD_QUEUE_ID_SHIFT)
327
328#define MOD_ENABLE_LOG 6
329#define MOD_SYSTEM_TIME 20
330
331/* set module large config */
332#define SOF_IPC4_MOD_EXT_MSG_SIZE_SHIFT 0
333#define SOF_IPC4_MOD_EXT_MSG_SIZE_MASK GENMASK(19, 0)
334#define SOF_IPC4_MOD_EXT_MSG_SIZE(x) ((x) << SOF_IPC4_MOD_EXT_MSG_SIZE_SHIFT)
335
336#define SOF_IPC4_MOD_EXT_MSG_PARAM_ID_SHIFT 20
337#define SOF_IPC4_MOD_EXT_MSG_PARAM_ID_MASK GENMASK(27, 20)
338#define SOF_IPC4_MOD_EXT_MSG_PARAM_ID(x) ((x) << SOF_IPC4_MOD_EXT_MSG_PARAM_ID_SHIFT)
339
340#define SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK_SHIFT 28
341#define SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK_MASK BIT(28)
342#define SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(x) ((x) << SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK_SHIFT)
343
344#define SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_SHIFT 29
345#define SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK BIT(29)
346#define SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(x) ((x) << SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_SHIFT)
347
348/* Init instance messagees */
349#define SOF_IPC4_MOD_INIT_BASEFW_MOD_ID 0
350#define SOF_IPC4_MOD_INIT_BASEFW_INSTANCE_ID 0
351
352enum sof_ipc4_base_fw_params {
353 SOF_IPC4_FW_PARAM_ENABLE_LOGS = 6,
354 SOF_IPC4_FW_PARAM_FW_CONFIG,
355 SOF_IPC4_FW_PARAM_HW_CONFIG_GET,
356 SOF_IPC4_FW_PARAM_MODULES_INFO_GET,
357 SOF_IPC4_FW_PARAM_LIBRARIES_INFO_GET = 16,
358 SOF_IPC4_FW_PARAM_SYSTEM_TIME = 20,
359};
360
361enum sof_ipc4_fw_config_params {
362 SOF_IPC4_FW_CFG_FW_VERSION,
363 SOF_IPC4_FW_CFG_MEMORY_RECLAIMED,
364 SOF_IPC4_FW_CFG_SLOW_CLOCK_FREQ_HZ,
365 SOF_IPC4_FW_CFG_FAST_CLOCK_FREQ_HZ,
366 SOF_IPC4_FW_CFG_DMA_BUFFER_CONFIG,
367 SOF_IPC4_FW_CFG_ALH_SUPPORT_LEVEL,
368 SOF_IPC4_FW_CFG_DL_MAILBOX_BYTES,
369 SOF_IPC4_FW_CFG_UL_MAILBOX_BYTES,
370 SOF_IPC4_FW_CFG_TRACE_LOG_BYTES,
371 SOF_IPC4_FW_CFG_MAX_PPL_COUNT,
372 SOF_IPC4_FW_CFG_MAX_ASTATE_COUNT,
373 SOF_IPC4_FW_CFG_MAX_MODULE_PIN_COUNT,
374 SOF_IPC4_FW_CFG_MODULES_COUNT,
375 SOF_IPC4_FW_CFG_MAX_MOD_INST_COUNT,
376 SOF_IPC4_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT,
377 SOF_IPC4_FW_CFG_LL_PRI_COUNT,
378 SOF_IPC4_FW_CFG_MAX_DP_TASKS_COUNT,
379 SOF_IPC4_FW_CFG_MAX_LIBS_COUNT,
380 SOF_IPC4_FW_CFG_SCHEDULER_CONFIG,
381 SOF_IPC4_FW_CFG_XTAL_FREQ_HZ,
382 SOF_IPC4_FW_CFG_CLOCKS_CONFIG,
383 SOF_IPC4_FW_CFG_RESERVED,
384 SOF_IPC4_FW_CFG_POWER_GATING_POLICY,
385 SOF_IPC4_FW_CFG_ASSERT_MODE,
386};
387
388struct sof_ipc4_fw_version {
389 uint16_t major;
390 uint16_t minor;
391 uint16_t hotfix;
392 uint16_t build;
393} __packed;
394
395/* Payload data for SOF_IPC4_MOD_SET_DX */
396struct sof_ipc4_dx_state_info {
397 /* core(s) to apply the change */
398 uint32_t core_mask;
399 /* core state: 0: put core_id to D3; 1: put core_id to D0 */
400 uint32_t dx_mask;
401} __packed __aligned(4);
402
403/* Reply messages */
404
405/*
406 * IPC4 primary header bit allocation for replies
407 * bit 0-23: status
408 * bit 24-28: type: enum sof_ipc4_global_msg if target is SOF_IPC4_FW_GEN_MSG
409 * enum sof_ipc4_module_type if target is SOF_IPC4_MODULE_MSG
410 * bit 29: response - sof_ipc4_msg_dir
411 * bit 30: target - enum sof_ipc4_msg_target
412 * bit 31: reserved, unused
413 */
414
415#define SOF_IPC4_REPLY_STATUS GENMASK(23, 0)
416
417/* Notification messages */
418
419/*
420 * IPC4 primary header bit allocation for notifications
421 * bit 0-15: notification type specific
422 * bit 16-23: enum sof_ipc4_notification_type
423 * bit 24-28: SOF_IPC4_GLB_NOTIFICATION
424 * bit 29: response - sof_ipc4_msg_dir
425 * bit 30: target - enum sof_ipc4_msg_target
426 * bit 31: reserved, unused
427 */
428
429#define SOF_IPC4_MSG_IS_NOTIFICATION(x) (SOF_IPC4_MSG_TYPE_GET(x) == \
430 SOF_IPC4_GLB_NOTIFICATION)
431
432#define SOF_IPC4_NOTIFICATION_TYPE_SHIFT 16
433#define SOF_IPC4_NOTIFICATION_TYPE_MASK GENMASK(23, 16)
434#define SOF_IPC4_NOTIFICATION_TYPE_GET(x) (((x) & SOF_IPC4_NOTIFICATION_TYPE_MASK) >> \
435 SOF_IPC4_NOTIFICATION_TYPE_SHIFT)
436
437#define SOF_IPC4_LOG_CORE_SHIFT 12
438#define SOF_IPC4_LOG_CORE_MASK GENMASK(15, 12)
439#define SOF_IPC4_LOG_CORE_GET(x) (((x) & SOF_IPC4_LOG_CORE_MASK) >> \
440 SOF_IPC4_LOG_CORE_SHIFT)
441
442/* Value of notification type field - must fit into 8 bits */
443enum sof_ipc4_notification_type {
444 /* Phrase detected (notification from WoV module) */
445 SOF_IPC4_NOTIFY_PHRASE_DETECTED = 4,
446 /* Event from a resource (pipeline or module instance) */
447 SOF_IPC4_NOTIFY_RESOURCE_EVENT,
448 /* Debug log buffer status changed */
449 SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS,
450 /* Timestamp captured at the link */
451 SOF_IPC4_NOTIFY_TIMESTAMP_CAPTURED,
452 /* FW complete initialization */
453 SOF_IPC4_NOTIFY_FW_READY,
454 /* Audio classifier result (ACA) */
455 SOF_IPC4_NOTIFY_FW_AUD_CLASS_RESULT,
456 /* Exception caught by DSP FW */
457 SOF_IPC4_NOTIFY_EXCEPTION_CAUGHT,
458 /* 11 is skipped by the existing cavs firmware */
459 /* Custom module notification */
460 SOF_IPC4_NOTIFY_MODULE_NOTIFICATION = 12,
461 /* 13 is reserved - do not use */
462 /* Probe notify data available */
463 SOF_IPC4_NOTIFY_PROBE_DATA_AVAILABLE = 14,
464 /* AM module notifications */
465 SOF_IPC4_NOTIFY_ASYNC_MSG_SRVC_MESSAGE,
466
467 SOF_IPC4_NOTIFY_TYPE_LAST,
468};
469
470struct sof_ipc4_notify_resource_data {
471 uint32_t resource_type;
472 uint32_t resource_id;
473 uint32_t event_type;
474 uint32_t reserved;
475 uint32_t data[6];
476} __packed __aligned(4);
477
478/** @}*/
479
480#endif