Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * Inspired by pxafb.h
6*/
7
8#ifndef __ASM_PLAT_FB_S3C2410_H
9#define __ASM_PLAT_FB_S3C2410_H __FILE__
10
11#include <linux/compiler_types.h>
12
13struct s3c2410fb_hw {
14 unsigned long lcdcon1;
15 unsigned long lcdcon2;
16 unsigned long lcdcon3;
17 unsigned long lcdcon4;
18 unsigned long lcdcon5;
19};
20
21/* LCD description */
22struct s3c2410fb_display {
23 /* LCD type */
24 unsigned type;
25#define S3C2410_LCDCON1_DSCAN4 (0<<5)
26#define S3C2410_LCDCON1_STN4 (1<<5)
27#define S3C2410_LCDCON1_STN8 (2<<5)
28#define S3C2410_LCDCON1_TFT (3<<5)
29
30#define S3C2410_LCDCON1_TFT1BPP (8<<1)
31#define S3C2410_LCDCON1_TFT2BPP (9<<1)
32#define S3C2410_LCDCON1_TFT4BPP (10<<1)
33#define S3C2410_LCDCON1_TFT8BPP (11<<1)
34#define S3C2410_LCDCON1_TFT16BPP (12<<1)
35#define S3C2410_LCDCON1_TFT24BPP (13<<1)
36
37 /* Screen size */
38 unsigned short width;
39 unsigned short height;
40
41 /* Screen info */
42 unsigned short xres;
43 unsigned short yres;
44 unsigned short bpp;
45
46 unsigned pixclock; /* pixclock in picoseconds */
47 unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */
48 unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */
49 unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */
50 unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */
51 unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */
52 unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */
53
54 /* lcd configuration registers */
55 unsigned long lcdcon5;
56#define S3C2410_LCDCON5_BPP24BL (1<<12)
57#define S3C2410_LCDCON5_FRM565 (1<<11)
58#define S3C2410_LCDCON5_INVVCLK (1<<10)
59#define S3C2410_LCDCON5_INVVLINE (1<<9)
60#define S3C2410_LCDCON5_INVVFRAME (1<<8)
61#define S3C2410_LCDCON5_INVVD (1<<7)
62#define S3C2410_LCDCON5_INVVDEN (1<<6)
63#define S3C2410_LCDCON5_INVPWREN (1<<5)
64#define S3C2410_LCDCON5_INVLEND (1<<4)
65#define S3C2410_LCDCON5_PWREN (1<<3)
66#define S3C2410_LCDCON5_ENLEND (1<<2)
67#define S3C2410_LCDCON5_BSWP (1<<1)
68#define S3C2410_LCDCON5_HWSWP (1<<0)
69};
70
71struct s3c2410fb_mach_info {
72
73 struct s3c2410fb_display *displays; /* attached displays info */
74 unsigned num_displays; /* number of defined displays */
75 unsigned default_display;
76
77 /* GPIOs */
78
79 unsigned long gpcup;
80 unsigned long gpcup_mask;
81 unsigned long gpccon;
82 unsigned long gpccon_mask;
83 unsigned long gpdup;
84 unsigned long gpdup_mask;
85 unsigned long gpdcon;
86 unsigned long gpdcon_mask;
87
88 void __iomem * gpccon_reg;
89 void __iomem * gpcup_reg;
90 void __iomem * gpdcon_reg;
91 void __iomem * gpdup_reg;
92
93 /* lpc3600 control register */
94 unsigned long lpcsel;
95};
96
97extern void s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
98
99#endif /* __ASM_PLAT_FB_S3C2410_H */