tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Declarations of procedures and variables shared between files
4 * in arch/ppc/mm/.
5 *
6 * Derived from arch/ppc/mm/init.c:
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
10 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
11 * Copyright (C) 1996 Paul Mackerras
12 *
13 * Derived from "arch/i386/mm/init.c"
14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
15 */
16#include <linux/mm.h>
17#include <asm/mmu.h>
18
19#ifdef CONFIG_PPC_MMU_NOHASH
20#include <asm/trace.h>
21
22/*
23 * On 40x and 8xx, we directly inline tlbia and tlbivax
24 */
25#if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
26static inline void _tlbil_all(void)
27{
28 asm volatile ("sync; tlbia; isync" : : : "memory");
29 trace_tlbia(MMU_NO_CONTEXT);
30}
31static inline void _tlbil_pid(unsigned int pid)
32{
33 asm volatile ("sync; tlbia; isync" : : : "memory");
34 trace_tlbia(pid);
35}
36#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
37
38#else /* CONFIG_40x || CONFIG_PPC_8xx */
39extern void _tlbil_all(void);
40extern void _tlbil_pid(unsigned int pid);
41#ifdef CONFIG_PPC_BOOK3E_64
42extern void _tlbil_pid_noind(unsigned int pid);
43#else
44#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
45#endif
46#endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
47
48/*
49 * On 8xx, we directly inline tlbie, on others, it's extern
50 */
51#ifdef CONFIG_PPC_8xx
52static inline void _tlbil_va(unsigned long address, unsigned int pid,
53 unsigned int tsize, unsigned int ind)
54{
55 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
56 trace_tlbie(0, 0, address, pid, 0, 0, 0);
57}
58#elif defined(CONFIG_PPC_BOOK3E_64)
59extern void _tlbil_va(unsigned long address, unsigned int pid,
60 unsigned int tsize, unsigned int ind);
61#else
62extern void __tlbil_va(unsigned long address, unsigned int pid);
63static inline void _tlbil_va(unsigned long address, unsigned int pid,
64 unsigned int tsize, unsigned int ind)
65{
66 __tlbil_va(address, pid);
67}
68#endif /* CONFIG_PPC_8xx */
69
70#if defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_47x)
71extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
72 unsigned int tsize, unsigned int ind);
73#else
74static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
75 unsigned int tsize, unsigned int ind)
76{
77 BUG();
78}
79#endif
80
81static inline void print_system_hash_info(void) {}
82
83#else /* CONFIG_PPC_MMU_NOHASH */
84
85void print_system_hash_info(void);
86
87#endif /* CONFIG_PPC_MMU_NOHASH */
88
89#ifdef CONFIG_PPC32
90
91extern void mapin_ram(void);
92extern void setbat(int index, unsigned long virt, phys_addr_t phys,
93 unsigned int size, pgprot_t prot);
94
95extern u8 early_hash[];
96
97#endif /* CONFIG_PPC32 */
98
99extern unsigned long __max_low_memory;
100extern phys_addr_t total_memory;
101extern phys_addr_t total_lowmem;
102extern phys_addr_t memstart_addr;
103extern phys_addr_t lowmem_end_addr;
104
105/* ...and now those things that may be slightly different between processor
106 * architectures. -- Dan
107 */
108#ifdef CONFIG_PPC32
109extern void MMU_init_hw(void);
110void MMU_init_hw_patch(void);
111unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
112#endif
113
114#ifdef CONFIG_PPC_E500
115extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
116 bool dryrun, bool init);
117#ifdef CONFIG_PPC32
118extern void adjust_total_lowmem(void);
119extern int switch_to_as1(void);
120extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
121void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys);
122void reloc_kernel_entry(void *fdt, int addr);
123extern int is_second_reloc;
124#endif
125extern void loadcam_entry(unsigned int index);
126extern void loadcam_multi(int first_idx, int num, int tmp_idx);
127
128#ifdef CONFIG_RANDOMIZE_BASE
129void kaslr_early_init(void *dt_ptr, phys_addr_t size);
130void kaslr_late_init(void);
131#else
132static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {}
133static inline void kaslr_late_init(void) {}
134#endif
135
136struct tlbcam {
137 u32 MAS0;
138 u32 MAS1;
139 unsigned long MAS2;
140 u32 MAS3;
141 u32 MAS7;
142};
143
144#define NUM_TLBCAMS 64
145
146extern struct tlbcam TLBCAM[NUM_TLBCAMS];
147#endif
148
149#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_8xx)
150/* 6xx have BATS */
151/* PPC_85xx have TLBCAM */
152/* 8xx have LTLB */
153phys_addr_t v_block_mapped(unsigned long va);
154unsigned long p_block_mapped(phys_addr_t pa);
155#else
156static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
157static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
158#endif
159
160#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_E500)
161void mmu_mark_initmem_nx(void);
162void mmu_mark_rodata_ro(void);
163#else
164static inline void mmu_mark_initmem_nx(void) { }
165static inline void mmu_mark_rodata_ro(void) { }
166#endif
167
168#ifdef CONFIG_PPC_8xx
169void __init mmu_mapin_immr(void);
170#endif
171
172#ifdef CONFIG_DEBUG_WX
173void ptdump_check_wx(void);
174#else
175static inline void ptdump_check_wx(void) { }
176#endif
177
178static inline bool debug_pagealloc_enabled_or_kfence(void)
179{
180 return IS_ENABLED(CONFIG_KFENCE) || debug_pagealloc_enabled();
181}