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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/linkmode.h>
18#include <linux/netlink.h>
19#include <linux/mdio.h>
20#include <linux/mii.h>
21#include <linux/mii_timestamper.h>
22#include <linux/module.h>
23#include <linux/timer.h>
24#include <linux/workqueue.h>
25#include <linux/mod_devicetable.h>
26#include <linux/u64_stats_sync.h>
27#include <linux/irqreturn.h>
28#include <linux/iopoll.h>
29#include <linux/refcount.h>
30
31#include <linux/atomic.h>
32
33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
44 SUPPORTED_1000baseT_Full)
45
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
63
64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[3];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
75 * the attached MAC driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_MAC_INTERRUPT -2
79
80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
82#define PHY_POLL_CABLE_TEST 0x00000004
83#define MDIO_DEVICE_IS_PHY 0x80000000
84
85/**
86 * enum phy_interface_t - Interface Mode definitions
87 *
88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
90 * @PHY_INTERFACE_MODE_MII: Media-independent interface
91 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
102 * @PHY_INTERFACE_MODE_SMII: Serial MII
103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
118 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
119 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
120 * @PHY_INTERFACE_MODE_MAX: Book keeping
121 *
122 * Describes the interface between the MAC and PHY.
123 */
124typedef enum {
125 PHY_INTERFACE_MODE_NA,
126 PHY_INTERFACE_MODE_INTERNAL,
127 PHY_INTERFACE_MODE_MII,
128 PHY_INTERFACE_MODE_GMII,
129 PHY_INTERFACE_MODE_SGMII,
130 PHY_INTERFACE_MODE_TBI,
131 PHY_INTERFACE_MODE_REVMII,
132 PHY_INTERFACE_MODE_RMII,
133 PHY_INTERFACE_MODE_REVRMII,
134 PHY_INTERFACE_MODE_RGMII,
135 PHY_INTERFACE_MODE_RGMII_ID,
136 PHY_INTERFACE_MODE_RGMII_RXID,
137 PHY_INTERFACE_MODE_RGMII_TXID,
138 PHY_INTERFACE_MODE_RTBI,
139 PHY_INTERFACE_MODE_SMII,
140 PHY_INTERFACE_MODE_XGMII,
141 PHY_INTERFACE_MODE_XLGMII,
142 PHY_INTERFACE_MODE_MOCA,
143 PHY_INTERFACE_MODE_QSGMII,
144 PHY_INTERFACE_MODE_TRGMII,
145 PHY_INTERFACE_MODE_100BASEX,
146 PHY_INTERFACE_MODE_1000BASEX,
147 PHY_INTERFACE_MODE_2500BASEX,
148 PHY_INTERFACE_MODE_5GBASER,
149 PHY_INTERFACE_MODE_RXAUI,
150 PHY_INTERFACE_MODE_XAUI,
151 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
152 PHY_INTERFACE_MODE_10GBASER,
153 PHY_INTERFACE_MODE_25GBASER,
154 PHY_INTERFACE_MODE_USXGMII,
155 /* 10GBASE-KR - with Clause 73 AN */
156 PHY_INTERFACE_MODE_10GKR,
157 PHY_INTERFACE_MODE_QUSGMII,
158 PHY_INTERFACE_MODE_1000BASEKX,
159 PHY_INTERFACE_MODE_MAX,
160} phy_interface_t;
161
162/* PHY interface mode bitmap handling */
163#define DECLARE_PHY_INTERFACE_MASK(name) \
164 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
165
166static inline void phy_interface_zero(unsigned long *intf)
167{
168 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
169}
170
171static inline bool phy_interface_empty(const unsigned long *intf)
172{
173 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
174}
175
176static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
177 const unsigned long *b)
178{
179 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
180}
181
182static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
183 const unsigned long *b)
184{
185 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
186}
187
188static inline void phy_interface_set_rgmii(unsigned long *intf)
189{
190 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
191 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
192 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
193 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
194}
195
196/*
197 * phy_supported_speeds - return all speeds currently supported by a PHY device
198 */
199unsigned int phy_supported_speeds(struct phy_device *phy,
200 unsigned int *speeds,
201 unsigned int size);
202
203/**
204 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
205 * @interface: enum phy_interface_t value
206 *
207 * Description: maps enum &phy_interface_t defined in this file
208 * into the device tree binding of 'phy-mode', so that Ethernet
209 * device driver can get PHY interface from device tree.
210 */
211static inline const char *phy_modes(phy_interface_t interface)
212{
213 switch (interface) {
214 case PHY_INTERFACE_MODE_NA:
215 return "";
216 case PHY_INTERFACE_MODE_INTERNAL:
217 return "internal";
218 case PHY_INTERFACE_MODE_MII:
219 return "mii";
220 case PHY_INTERFACE_MODE_GMII:
221 return "gmii";
222 case PHY_INTERFACE_MODE_SGMII:
223 return "sgmii";
224 case PHY_INTERFACE_MODE_TBI:
225 return "tbi";
226 case PHY_INTERFACE_MODE_REVMII:
227 return "rev-mii";
228 case PHY_INTERFACE_MODE_RMII:
229 return "rmii";
230 case PHY_INTERFACE_MODE_REVRMII:
231 return "rev-rmii";
232 case PHY_INTERFACE_MODE_RGMII:
233 return "rgmii";
234 case PHY_INTERFACE_MODE_RGMII_ID:
235 return "rgmii-id";
236 case PHY_INTERFACE_MODE_RGMII_RXID:
237 return "rgmii-rxid";
238 case PHY_INTERFACE_MODE_RGMII_TXID:
239 return "rgmii-txid";
240 case PHY_INTERFACE_MODE_RTBI:
241 return "rtbi";
242 case PHY_INTERFACE_MODE_SMII:
243 return "smii";
244 case PHY_INTERFACE_MODE_XGMII:
245 return "xgmii";
246 case PHY_INTERFACE_MODE_XLGMII:
247 return "xlgmii";
248 case PHY_INTERFACE_MODE_MOCA:
249 return "moca";
250 case PHY_INTERFACE_MODE_QSGMII:
251 return "qsgmii";
252 case PHY_INTERFACE_MODE_TRGMII:
253 return "trgmii";
254 case PHY_INTERFACE_MODE_1000BASEX:
255 return "1000base-x";
256 case PHY_INTERFACE_MODE_1000BASEKX:
257 return "1000base-kx";
258 case PHY_INTERFACE_MODE_2500BASEX:
259 return "2500base-x";
260 case PHY_INTERFACE_MODE_5GBASER:
261 return "5gbase-r";
262 case PHY_INTERFACE_MODE_RXAUI:
263 return "rxaui";
264 case PHY_INTERFACE_MODE_XAUI:
265 return "xaui";
266 case PHY_INTERFACE_MODE_10GBASER:
267 return "10gbase-r";
268 case PHY_INTERFACE_MODE_25GBASER:
269 return "25gbase-r";
270 case PHY_INTERFACE_MODE_USXGMII:
271 return "usxgmii";
272 case PHY_INTERFACE_MODE_10GKR:
273 return "10gbase-kr";
274 case PHY_INTERFACE_MODE_100BASEX:
275 return "100base-x";
276 case PHY_INTERFACE_MODE_QUSGMII:
277 return "qusgmii";
278 default:
279 return "unknown";
280 }
281}
282
283#define PHY_INIT_TIMEOUT 100000
284#define PHY_FORCE_TIMEOUT 10
285
286#define PHY_MAX_ADDR 32
287
288/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
289#define PHY_ID_FMT "%s:%02x"
290
291#define MII_BUS_ID_SIZE 61
292
293struct device;
294struct phylink;
295struct sfp_bus;
296struct sfp_upstream_ops;
297struct sk_buff;
298
299/**
300 * struct mdio_bus_stats - Statistics counters for MDIO busses
301 * @transfers: Total number of transfers, i.e. @writes + @reads
302 * @errors: Number of MDIO transfers that returned an error
303 * @writes: Number of write transfers
304 * @reads: Number of read transfers
305 * @syncp: Synchronisation for incrementing statistics
306 */
307struct mdio_bus_stats {
308 u64_stats_t transfers;
309 u64_stats_t errors;
310 u64_stats_t writes;
311 u64_stats_t reads;
312 /* Must be last, add new statistics above */
313 struct u64_stats_sync syncp;
314};
315
316/**
317 * struct phy_package_shared - Shared information in PHY packages
318 * @addr: Common PHY address used to combine PHYs in one package
319 * @refcnt: Number of PHYs connected to this shared data
320 * @flags: Initialization of PHY package
321 * @priv_size: Size of the shared private data @priv
322 * @priv: Driver private data shared across a PHY package
323 *
324 * Represents a shared structure between different phydev's in the same
325 * package, for example a quad PHY. See phy_package_join() and
326 * phy_package_leave().
327 */
328struct phy_package_shared {
329 int addr;
330 refcount_t refcnt;
331 unsigned long flags;
332 size_t priv_size;
333
334 /* private data pointer */
335 /* note that this pointer is shared between different phydevs and
336 * the user has to take care of appropriate locking. It is allocated
337 * and freed automatically by phy_package_join() and
338 * phy_package_leave().
339 */
340 void *priv;
341};
342
343/* used as bit number in atomic bitops */
344#define PHY_SHARED_F_INIT_DONE 0
345#define PHY_SHARED_F_PROBE_DONE 1
346
347/**
348 * struct mii_bus - Represents an MDIO bus
349 *
350 * @owner: Who owns this device
351 * @name: User friendly name for this MDIO device, or driver name
352 * @id: Unique identifier for this bus, typical from bus hierarchy
353 * @priv: Driver private data
354 *
355 * The Bus class for PHYs. Devices which provide access to
356 * PHYs should register using this structure
357 */
358struct mii_bus {
359 struct module *owner;
360 const char *name;
361 char id[MII_BUS_ID_SIZE];
362 void *priv;
363 /** @read: Perform a read transfer on the bus */
364 int (*read)(struct mii_bus *bus, int addr, int regnum);
365 /** @write: Perform a write transfer on the bus */
366 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
367 /** @reset: Perform a reset of the bus */
368 int (*reset)(struct mii_bus *bus);
369
370 /** @stats: Statistic counters per device on the bus */
371 struct mdio_bus_stats stats[PHY_MAX_ADDR];
372
373 /**
374 * @mdio_lock: A lock to ensure that only one thing can read/write
375 * the MDIO bus at a time
376 */
377 struct mutex mdio_lock;
378
379 /** @parent: Parent device of this bus */
380 struct device *parent;
381 /** @state: State of bus structure */
382 enum {
383 MDIOBUS_ALLOCATED = 1,
384 MDIOBUS_REGISTERED,
385 MDIOBUS_UNREGISTERED,
386 MDIOBUS_RELEASED,
387 } state;
388
389 /** @dev: Kernel device representation */
390 struct device dev;
391
392 /** @mdio_map: list of all MDIO devices on bus */
393 struct mdio_device *mdio_map[PHY_MAX_ADDR];
394
395 /** @phy_mask: PHY addresses to be ignored when probing */
396 u32 phy_mask;
397
398 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
399 u32 phy_ignore_ta_mask;
400
401 /**
402 * @irq: An array of interrupts, each PHY's interrupt at the index
403 * matching its address
404 */
405 int irq[PHY_MAX_ADDR];
406
407 /** @reset_delay_us: GPIO reset pulse width in microseconds */
408 int reset_delay_us;
409 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
410 int reset_post_delay_us;
411 /** @reset_gpiod: Reset GPIO descriptor pointer */
412 struct gpio_desc *reset_gpiod;
413
414 /** @probe_capabilities: bus capabilities, used for probing */
415 enum {
416 MDIOBUS_NO_CAP = 0,
417 MDIOBUS_C22,
418 MDIOBUS_C45,
419 MDIOBUS_C22_C45,
420 } probe_capabilities;
421
422 /** @shared_lock: protect access to the shared element */
423 struct mutex shared_lock;
424
425 /** @shared: shared state across different PHYs */
426 struct phy_package_shared *shared[PHY_MAX_ADDR];
427};
428#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
429
430struct mii_bus *mdiobus_alloc_size(size_t size);
431
432/**
433 * mdiobus_alloc - Allocate an MDIO bus structure
434 *
435 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
436 * for the driver to register the bus.
437 */
438static inline struct mii_bus *mdiobus_alloc(void)
439{
440 return mdiobus_alloc_size(0);
441}
442
443int __mdiobus_register(struct mii_bus *bus, struct module *owner);
444int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
445 struct module *owner);
446#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
447#define devm_mdiobus_register(dev, bus) \
448 __devm_mdiobus_register(dev, bus, THIS_MODULE)
449
450void mdiobus_unregister(struct mii_bus *bus);
451void mdiobus_free(struct mii_bus *bus);
452struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
453static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
454{
455 return devm_mdiobus_alloc_size(dev, 0);
456}
457
458struct mii_bus *mdio_find_bus(const char *mdio_name);
459struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
460
461#define PHY_INTERRUPT_DISABLED false
462#define PHY_INTERRUPT_ENABLED true
463
464/**
465 * enum phy_state - PHY state machine states:
466 *
467 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
468 * should be called if and only if the PHY is in this state,
469 * given that the PHY device exists.
470 * - PHY driver probe function will set the state to @PHY_READY
471 *
472 * @PHY_READY: PHY is ready to send and receive packets, but the
473 * controller is not. By default, PHYs which do not implement
474 * probe will be set to this state by phy_probe().
475 * - start will set the state to UP
476 *
477 * @PHY_UP: The PHY and attached device are ready to do work.
478 * Interrupts should be started here.
479 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
480 *
481 * @PHY_NOLINK: PHY is up, but not currently plugged in.
482 * - irq or timer will set @PHY_RUNNING if link comes back
483 * - phy_stop moves to @PHY_HALTED
484 *
485 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
486 * and/or receiving packets
487 * - irq or timer will set @PHY_NOLINK if link goes down
488 * - phy_stop moves to @PHY_HALTED
489 *
490 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
491 * is not expected to work, carrier will be indicated as down. PHY will be
492 * poll once per second, or on interrupt for it current state.
493 * Once complete, move to UP to restart the PHY.
494 * - phy_stop aborts the running test and moves to @PHY_HALTED
495 *
496 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
497 * PHY is in an error state.
498 * - phy_start moves to @PHY_UP
499 */
500enum phy_state {
501 PHY_DOWN = 0,
502 PHY_READY,
503 PHY_HALTED,
504 PHY_UP,
505 PHY_RUNNING,
506 PHY_NOLINK,
507 PHY_CABLETEST,
508};
509
510#define MDIO_MMD_NUM 32
511
512/**
513 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
514 * @devices_in_package: IEEE 802.3 devices in package register value.
515 * @mmds_present: bit vector of MMDs present.
516 * @device_ids: The device identifer for each present device.
517 */
518struct phy_c45_device_ids {
519 u32 devices_in_package;
520 u32 mmds_present;
521 u32 device_ids[MDIO_MMD_NUM];
522};
523
524struct macsec_context;
525struct macsec_ops;
526
527/**
528 * struct phy_device - An instance of a PHY
529 *
530 * @mdio: MDIO bus this PHY is on
531 * @drv: Pointer to the driver for this PHY instance
532 * @devlink: Create a link between phy dev and mac dev, if the external phy
533 * used by current mac interface is managed by another mac interface.
534 * @phy_id: UID for this device found during discovery
535 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
536 * @is_c45: Set to true if this PHY uses clause 45 addressing.
537 * @is_internal: Set to true if this PHY is internal to a MAC.
538 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
539 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
540 * @has_fixups: Set to true if this PHY has fixups/quirks.
541 * @suspended: Set to true if this PHY has been suspended successfully.
542 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
543 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
544 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
545 * @downshifted_rate: Set true if link speed has been downshifted.
546 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
547 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
548 * @state: State of the PHY for management purposes
549 * @dev_flags: Device-specific flags used by the PHY driver.
550 *
551 * - Bits [15:0] are free to use by the PHY driver to communicate
552 * driver specific behavior.
553 * - Bits [23:16] are currently reserved for future use.
554 * - Bits [31:24] are reserved for defining generic
555 * PHY driver behavior.
556 * @irq: IRQ number of the PHY's interrupt (-1 if none)
557 * @phy_timer: The timer for handling the state machine
558 * @phylink: Pointer to phylink instance for this PHY
559 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
560 * @sfp_bus: SFP bus attached to this PHY's fiber port
561 * @attached_dev: The attached enet driver's device instance ptr
562 * @adjust_link: Callback for the enet controller to respond to changes: in the
563 * link state.
564 * @phy_link_change: Callback for phylink for notification of link change
565 * @macsec_ops: MACsec offloading ops.
566 *
567 * @speed: Current link speed
568 * @duplex: Current duplex
569 * @port: Current port
570 * @pause: Current pause
571 * @asym_pause: Current asymmetric pause
572 * @supported: Combined MAC/PHY supported linkmodes
573 * @advertising: Currently advertised linkmodes
574 * @adv_old: Saved advertised while power saving for WoL
575 * @lp_advertising: Current link partner advertised linkmodes
576 * @host_interfaces: PHY interface modes supported by host
577 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
578 * @autoneg: Flag autoneg being used
579 * @rate_matching: Current rate matching mode
580 * @link: Current link state
581 * @autoneg_complete: Flag auto negotiation of the link has completed
582 * @mdix: Current crossover
583 * @mdix_ctrl: User setting of crossover
584 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
585 * @interrupts: Flag interrupts have been enabled
586 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
587 * handling shall be postponed until PHY has resumed
588 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
589 * requiring a rerun of the interrupt handler after resume
590 * @interface: enum phy_interface_t value
591 * @skb: Netlink message for cable diagnostics
592 * @nest: Netlink nest used for cable diagnostics
593 * @ehdr: nNtlink header for cable diagnostics
594 * @phy_led_triggers: Array of LED triggers
595 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
596 * @led_link_trigger: LED trigger for link up/down
597 * @last_triggered: last LED trigger for link speed
598 * @master_slave_set: User requested master/slave configuration
599 * @master_slave_get: Current master/slave advertisement
600 * @master_slave_state: Current master/slave configuration
601 * @mii_ts: Pointer to time stamper callbacks
602 * @psec: Pointer to Power Sourcing Equipment control struct
603 * @lock: Mutex for serialization access to PHY
604 * @state_queue: Work queue for state machine
605 * @link_down_events: Number of times link was lost
606 * @shared: Pointer to private data shared by phys in one package
607 * @priv: Pointer to driver private data
608 *
609 * interrupts currently only supports enabled or disabled,
610 * but could be changed in the future to support enabling
611 * and disabling specific interrupts
612 *
613 * Contains some infrastructure for polling and interrupt
614 * handling, as well as handling shifts in PHY hardware state
615 */
616struct phy_device {
617 struct mdio_device mdio;
618
619 /* Information about the PHY type */
620 /* And management functions */
621 struct phy_driver *drv;
622
623 struct device_link *devlink;
624
625 u32 phy_id;
626
627 struct phy_c45_device_ids c45_ids;
628 unsigned is_c45:1;
629 unsigned is_internal:1;
630 unsigned is_pseudo_fixed_link:1;
631 unsigned is_gigabit_capable:1;
632 unsigned has_fixups:1;
633 unsigned suspended:1;
634 unsigned suspended_by_mdio_bus:1;
635 unsigned sysfs_links:1;
636 unsigned loopback_enabled:1;
637 unsigned downshifted_rate:1;
638 unsigned is_on_sfp_module:1;
639 unsigned mac_managed_pm:1;
640
641 unsigned autoneg:1;
642 /* The most recently read link state */
643 unsigned link:1;
644 unsigned autoneg_complete:1;
645
646 /* Interrupts are enabled */
647 unsigned interrupts:1;
648 unsigned irq_suspended:1;
649 unsigned irq_rerun:1;
650
651 int rate_matching;
652
653 enum phy_state state;
654
655 u32 dev_flags;
656
657 phy_interface_t interface;
658
659 /*
660 * forced speed & duplex (no autoneg)
661 * partner speed & duplex & pause (autoneg)
662 */
663 int speed;
664 int duplex;
665 int port;
666 int pause;
667 int asym_pause;
668 u8 master_slave_get;
669 u8 master_slave_set;
670 u8 master_slave_state;
671
672 /* Union of PHY and Attached devices' supported link modes */
673 /* See ethtool.h for more info */
674 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
675 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
676 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
677 /* used with phy_speed_down */
678 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
679
680 /* Host supported PHY interface types. Should be ignored if empty. */
681 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
682
683 /* Energy efficient ethernet modes which should be prohibited */
684 u32 eee_broken_modes;
685
686#ifdef CONFIG_LED_TRIGGER_PHY
687 struct phy_led_trigger *phy_led_triggers;
688 unsigned int phy_num_led_triggers;
689 struct phy_led_trigger *last_triggered;
690
691 struct phy_led_trigger *led_link_trigger;
692#endif
693
694 /*
695 * Interrupt number for this PHY
696 * -1 means no interrupt
697 */
698 int irq;
699
700 /* private data pointer */
701 /* For use by PHYs to maintain extra state */
702 void *priv;
703
704 /* shared data pointer */
705 /* For use by PHYs inside the same package that need a shared state. */
706 struct phy_package_shared *shared;
707
708 /* Reporting cable test results */
709 struct sk_buff *skb;
710 void *ehdr;
711 struct nlattr *nest;
712
713 /* Interrupt and Polling infrastructure */
714 struct delayed_work state_queue;
715
716 struct mutex lock;
717
718 /* This may be modified under the rtnl lock */
719 bool sfp_bus_attached;
720 struct sfp_bus *sfp_bus;
721 struct phylink *phylink;
722 struct net_device *attached_dev;
723 struct mii_timestamper *mii_ts;
724 struct pse_control *psec;
725
726 u8 mdix;
727 u8 mdix_ctrl;
728
729 int pma_extable;
730
731 unsigned int link_down_events;
732
733 void (*phy_link_change)(struct phy_device *phydev, bool up);
734 void (*adjust_link)(struct net_device *dev);
735
736#if IS_ENABLED(CONFIG_MACSEC)
737 /* MACsec management functions */
738 const struct macsec_ops *macsec_ops;
739#endif
740};
741
742static inline struct phy_device *to_phy_device(const struct device *dev)
743{
744 return container_of(to_mdio_device(dev), struct phy_device, mdio);
745}
746
747/**
748 * struct phy_tdr_config - Configuration of a TDR raw test
749 *
750 * @first: Distance for first data collection point
751 * @last: Distance for last data collection point
752 * @step: Step between data collection points
753 * @pair: Bitmap of cable pairs to collect data for
754 *
755 * A structure containing possible configuration parameters
756 * for a TDR cable test. The driver does not need to implement
757 * all the parameters, but should report what is actually used.
758 * All distances are in centimeters.
759 */
760struct phy_tdr_config {
761 u32 first;
762 u32 last;
763 u32 step;
764 s8 pair;
765};
766#define PHY_PAIR_ALL -1
767
768/**
769 * struct phy_driver - Driver structure for a particular PHY type
770 *
771 * @mdiodrv: Data common to all MDIO devices
772 * @phy_id: The result of reading the UID registers of this PHY
773 * type, and ANDing them with the phy_id_mask. This driver
774 * only works for PHYs with IDs which match this field
775 * @name: The friendly name of this PHY type
776 * @phy_id_mask: Defines the important bits of the phy_id
777 * @features: A mandatory list of features (speed, duplex, etc)
778 * supported by this PHY
779 * @flags: A bitfield defining certain other features this PHY
780 * supports (like interrupts)
781 * @driver_data: Static driver data
782 *
783 * All functions are optional. If config_aneg or read_status
784 * are not implemented, the phy core uses the genphy versions.
785 * Note that none of these functions should be called from
786 * interrupt time. The goal is for the bus read/write functions
787 * to be able to block when the bus transaction is happening,
788 * and be freed up by an interrupt (The MPC85xx has this ability,
789 * though it is not currently supported in the driver).
790 */
791struct phy_driver {
792 struct mdio_driver_common mdiodrv;
793 u32 phy_id;
794 char *name;
795 u32 phy_id_mask;
796 const unsigned long * const features;
797 u32 flags;
798 const void *driver_data;
799
800 /**
801 * @soft_reset: Called to issue a PHY software reset
802 */
803 int (*soft_reset)(struct phy_device *phydev);
804
805 /**
806 * @config_init: Called to initialize the PHY,
807 * including after a reset
808 */
809 int (*config_init)(struct phy_device *phydev);
810
811 /**
812 * @probe: Called during discovery. Used to set
813 * up device-specific structures, if any
814 */
815 int (*probe)(struct phy_device *phydev);
816
817 /**
818 * @get_features: Probe the hardware to determine what
819 * abilities it has. Should only set phydev->supported.
820 */
821 int (*get_features)(struct phy_device *phydev);
822
823 /**
824 * @get_rate_matching: Get the supported type of rate matching for a
825 * particular phy interface. This is used by phy consumers to determine
826 * whether to advertise lower-speed modes for that interface. It is
827 * assumed that if a rate matching mode is supported on an interface,
828 * then that interface's rate can be adapted to all slower link speeds
829 * supported by the phy. If the interface is not supported, this should
830 * return %RATE_MATCH_NONE.
831 */
832 int (*get_rate_matching)(struct phy_device *phydev,
833 phy_interface_t iface);
834
835 /* PHY Power Management */
836 /** @suspend: Suspend the hardware, saving state if needed */
837 int (*suspend)(struct phy_device *phydev);
838 /** @resume: Resume the hardware, restoring state if needed */
839 int (*resume)(struct phy_device *phydev);
840
841 /**
842 * @config_aneg: Configures the advertisement and resets
843 * autonegotiation if phydev->autoneg is on,
844 * forces the speed to the current settings in phydev
845 * if phydev->autoneg is off
846 */
847 int (*config_aneg)(struct phy_device *phydev);
848
849 /** @aneg_done: Determines the auto negotiation result */
850 int (*aneg_done)(struct phy_device *phydev);
851
852 /** @read_status: Determines the negotiated speed and duplex */
853 int (*read_status)(struct phy_device *phydev);
854
855 /**
856 * @config_intr: Enables or disables interrupts.
857 * It should also clear any pending interrupts prior to enabling the
858 * IRQs and after disabling them.
859 */
860 int (*config_intr)(struct phy_device *phydev);
861
862 /** @handle_interrupt: Override default interrupt handling */
863 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
864
865 /** @remove: Clears up any memory if needed */
866 void (*remove)(struct phy_device *phydev);
867
868 /**
869 * @match_phy_device: Returns true if this is a suitable
870 * driver for the given phydev. If NULL, matching is based on
871 * phy_id and phy_id_mask.
872 */
873 int (*match_phy_device)(struct phy_device *phydev);
874
875 /**
876 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
877 * register changes to enable Wake on LAN, so set_wol is
878 * provided to be called in the ethernet driver's set_wol
879 * function.
880 */
881 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
882
883 /**
884 * @get_wol: See set_wol, but for checking whether Wake on LAN
885 * is enabled.
886 */
887 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
888
889 /**
890 * @link_change_notify: Called to inform a PHY device driver
891 * when the core is about to change the link state. This
892 * callback is supposed to be used as fixup hook for drivers
893 * that need to take action when the link state
894 * changes. Drivers are by no means allowed to mess with the
895 * PHY device structure in their implementations.
896 */
897 void (*link_change_notify)(struct phy_device *dev);
898
899 /**
900 * @read_mmd: PHY specific driver override for reading a MMD
901 * register. This function is optional for PHY specific
902 * drivers. When not provided, the default MMD read function
903 * will be used by phy_read_mmd(), which will use either a
904 * direct read for Clause 45 PHYs or an indirect read for
905 * Clause 22 PHYs. devnum is the MMD device number within the
906 * PHY device, regnum is the register within the selected MMD
907 * device.
908 */
909 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
910
911 /**
912 * @write_mmd: PHY specific driver override for writing a MMD
913 * register. This function is optional for PHY specific
914 * drivers. When not provided, the default MMD write function
915 * will be used by phy_write_mmd(), which will use either a
916 * direct write for Clause 45 PHYs, or an indirect write for
917 * Clause 22 PHYs. devnum is the MMD device number within the
918 * PHY device, regnum is the register within the selected MMD
919 * device. val is the value to be written.
920 */
921 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
922 u16 val);
923
924 /** @read_page: Return the current PHY register page number */
925 int (*read_page)(struct phy_device *dev);
926 /** @write_page: Set the current PHY register page number */
927 int (*write_page)(struct phy_device *dev, int page);
928
929 /**
930 * @module_info: Get the size and type of the eeprom contained
931 * within a plug-in module
932 */
933 int (*module_info)(struct phy_device *dev,
934 struct ethtool_modinfo *modinfo);
935
936 /**
937 * @module_eeprom: Get the eeprom information from the plug-in
938 * module
939 */
940 int (*module_eeprom)(struct phy_device *dev,
941 struct ethtool_eeprom *ee, u8 *data);
942
943 /** @cable_test_start: Start a cable test */
944 int (*cable_test_start)(struct phy_device *dev);
945
946 /** @cable_test_tdr_start: Start a raw TDR cable test */
947 int (*cable_test_tdr_start)(struct phy_device *dev,
948 const struct phy_tdr_config *config);
949
950 /**
951 * @cable_test_get_status: Once per second, or on interrupt,
952 * request the status of the test.
953 */
954 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
955
956 /* Get statistics from the PHY using ethtool */
957 /** @get_sset_count: Number of statistic counters */
958 int (*get_sset_count)(struct phy_device *dev);
959 /** @get_strings: Names of the statistic counters */
960 void (*get_strings)(struct phy_device *dev, u8 *data);
961 /** @get_stats: Return the statistic counter values */
962 void (*get_stats)(struct phy_device *dev,
963 struct ethtool_stats *stats, u64 *data);
964
965 /* Get and Set PHY tunables */
966 /** @get_tunable: Return the value of a tunable */
967 int (*get_tunable)(struct phy_device *dev,
968 struct ethtool_tunable *tuna, void *data);
969 /** @set_tunable: Set the value of a tunable */
970 int (*set_tunable)(struct phy_device *dev,
971 struct ethtool_tunable *tuna,
972 const void *data);
973 /** @set_loopback: Set the loopback mood of the PHY */
974 int (*set_loopback)(struct phy_device *dev, bool enable);
975 /** @get_sqi: Get the signal quality indication */
976 int (*get_sqi)(struct phy_device *dev);
977 /** @get_sqi_max: Get the maximum signal quality indication */
978 int (*get_sqi_max)(struct phy_device *dev);
979};
980#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
981 struct phy_driver, mdiodrv)
982
983#define PHY_ANY_ID "MATCH ANY PHY"
984#define PHY_ANY_UID 0xffffffff
985
986#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
987#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
988#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
989
990/* A Structure for boards to register fixups with the PHY Lib */
991struct phy_fixup {
992 struct list_head list;
993 char bus_id[MII_BUS_ID_SIZE + 3];
994 u32 phy_uid;
995 u32 phy_uid_mask;
996 int (*run)(struct phy_device *phydev);
997};
998
999const char *phy_speed_to_str(int speed);
1000const char *phy_duplex_to_str(unsigned int duplex);
1001const char *phy_rate_matching_to_str(int rate_matching);
1002
1003int phy_interface_num_ports(phy_interface_t interface);
1004
1005/* A structure for mapping a particular speed and duplex
1006 * combination to a particular SUPPORTED and ADVERTISED value
1007 */
1008struct phy_setting {
1009 u32 speed;
1010 u8 duplex;
1011 u8 bit;
1012};
1013
1014const struct phy_setting *
1015phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1016 bool exact);
1017size_t phy_speeds(unsigned int *speeds, size_t size,
1018 unsigned long *mask);
1019void of_set_phy_supported(struct phy_device *phydev);
1020void of_set_phy_eee_broken(struct phy_device *phydev);
1021int phy_speed_down_core(struct phy_device *phydev);
1022
1023/**
1024 * phy_is_started - Convenience function to check whether PHY is started
1025 * @phydev: The phy_device struct
1026 */
1027static inline bool phy_is_started(struct phy_device *phydev)
1028{
1029 return phydev->state >= PHY_UP;
1030}
1031
1032void phy_resolve_aneg_pause(struct phy_device *phydev);
1033void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1034void phy_check_downshift(struct phy_device *phydev);
1035
1036/**
1037 * phy_read - Convenience function for reading a given PHY register
1038 * @phydev: the phy_device struct
1039 * @regnum: register number to read
1040 *
1041 * NOTE: MUST NOT be called from interrupt context,
1042 * because the bus read/write functions may wait for an interrupt
1043 * to conclude the operation.
1044 */
1045static inline int phy_read(struct phy_device *phydev, u32 regnum)
1046{
1047 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1048}
1049
1050#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1051 timeout_us, sleep_before_read) \
1052({ \
1053 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
1054 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1055 if (val < 0) \
1056 __ret = val; \
1057 if (__ret) \
1058 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1059 __ret; \
1060})
1061
1062
1063/**
1064 * __phy_read - convenience function for reading a given PHY register
1065 * @phydev: the phy_device struct
1066 * @regnum: register number to read
1067 *
1068 * The caller must have taken the MDIO bus lock.
1069 */
1070static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1071{
1072 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1073}
1074
1075/**
1076 * phy_write - Convenience function for writing a given PHY register
1077 * @phydev: the phy_device struct
1078 * @regnum: register number to write
1079 * @val: value to write to @regnum
1080 *
1081 * NOTE: MUST NOT be called from interrupt context,
1082 * because the bus read/write functions may wait for an interrupt
1083 * to conclude the operation.
1084 */
1085static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1086{
1087 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1088}
1089
1090/**
1091 * __phy_write - Convenience function for writing a given PHY register
1092 * @phydev: the phy_device struct
1093 * @regnum: register number to write
1094 * @val: value to write to @regnum
1095 *
1096 * The caller must have taken the MDIO bus lock.
1097 */
1098static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1099{
1100 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1101 val);
1102}
1103
1104/**
1105 * __phy_modify_changed() - Convenience function for modifying a PHY register
1106 * @phydev: a pointer to a &struct phy_device
1107 * @regnum: register number
1108 * @mask: bit mask of bits to clear
1109 * @set: bit mask of bits to set
1110 *
1111 * Unlocked helper function which allows a PHY register to be modified as
1112 * new register value = (old register value & ~mask) | set
1113 *
1114 * Returns negative errno, 0 if there was no change, and 1 in case of change
1115 */
1116static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1117 u16 mask, u16 set)
1118{
1119 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1120 regnum, mask, set);
1121}
1122
1123/*
1124 * phy_read_mmd - Convenience function for reading a register
1125 * from an MMD on a given PHY.
1126 */
1127int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1128
1129/**
1130 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1131 * condition is met or a timeout occurs
1132 *
1133 * @phydev: The phy_device struct
1134 * @devaddr: The MMD to read from
1135 * @regnum: The register on the MMD to read
1136 * @val: Variable to read the register into
1137 * @cond: Break condition (usually involving @val)
1138 * @sleep_us: Maximum time to sleep between reads in us (0
1139 * tight-loops). Should be less than ~20ms since usleep_range
1140 * is used (see Documentation/timers/timers-howto.rst).
1141 * @timeout_us: Timeout in us, 0 means never timeout
1142 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1143 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1144 * case, the last read value at @args is stored in @val. Must not
1145 * be called from atomic context if sleep_us or timeout_us are used.
1146 */
1147#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1148 sleep_us, timeout_us, sleep_before_read) \
1149({ \
1150 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1151 sleep_us, timeout_us, sleep_before_read, \
1152 phydev, devaddr, regnum); \
1153 if (val < 0) \
1154 __ret = val; \
1155 if (__ret) \
1156 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1157 __ret; \
1158})
1159
1160/*
1161 * __phy_read_mmd - Convenience function for reading a register
1162 * from an MMD on a given PHY.
1163 */
1164int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1165
1166/*
1167 * phy_write_mmd - Convenience function for writing a register
1168 * on an MMD on a given PHY.
1169 */
1170int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1171
1172/*
1173 * __phy_write_mmd - Convenience function for writing a register
1174 * on an MMD on a given PHY.
1175 */
1176int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1177
1178int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1179 u16 set);
1180int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1181 u16 set);
1182int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1183int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1184
1185int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1186 u16 mask, u16 set);
1187int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1188 u16 mask, u16 set);
1189int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1190 u16 mask, u16 set);
1191int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1192 u16 mask, u16 set);
1193
1194/**
1195 * __phy_set_bits - Convenience function for setting bits in a PHY register
1196 * @phydev: the phy_device struct
1197 * @regnum: register number to write
1198 * @val: bits to set
1199 *
1200 * The caller must have taken the MDIO bus lock.
1201 */
1202static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1203{
1204 return __phy_modify(phydev, regnum, 0, val);
1205}
1206
1207/**
1208 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1209 * @phydev: the phy_device struct
1210 * @regnum: register number to write
1211 * @val: bits to clear
1212 *
1213 * The caller must have taken the MDIO bus lock.
1214 */
1215static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1216 u16 val)
1217{
1218 return __phy_modify(phydev, regnum, val, 0);
1219}
1220
1221/**
1222 * phy_set_bits - Convenience function for setting bits in a PHY register
1223 * @phydev: the phy_device struct
1224 * @regnum: register number to write
1225 * @val: bits to set
1226 */
1227static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1228{
1229 return phy_modify(phydev, regnum, 0, val);
1230}
1231
1232/**
1233 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1234 * @phydev: the phy_device struct
1235 * @regnum: register number to write
1236 * @val: bits to clear
1237 */
1238static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1239{
1240 return phy_modify(phydev, regnum, val, 0);
1241}
1242
1243/**
1244 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1245 * on MMD
1246 * @phydev: the phy_device struct
1247 * @devad: the MMD containing register to modify
1248 * @regnum: register number to modify
1249 * @val: bits to set
1250 *
1251 * The caller must have taken the MDIO bus lock.
1252 */
1253static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1254 u32 regnum, u16 val)
1255{
1256 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1257}
1258
1259/**
1260 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1261 * on MMD
1262 * @phydev: the phy_device struct
1263 * @devad: the MMD containing register to modify
1264 * @regnum: register number to modify
1265 * @val: bits to clear
1266 *
1267 * The caller must have taken the MDIO bus lock.
1268 */
1269static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1270 u32 regnum, u16 val)
1271{
1272 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1273}
1274
1275/**
1276 * phy_set_bits_mmd - Convenience function for setting bits in a register
1277 * on MMD
1278 * @phydev: the phy_device struct
1279 * @devad: the MMD containing register to modify
1280 * @regnum: register number to modify
1281 * @val: bits to set
1282 */
1283static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1284 u32 regnum, u16 val)
1285{
1286 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1287}
1288
1289/**
1290 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1291 * on MMD
1292 * @phydev: the phy_device struct
1293 * @devad: the MMD containing register to modify
1294 * @regnum: register number to modify
1295 * @val: bits to clear
1296 */
1297static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1298 u32 regnum, u16 val)
1299{
1300 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1301}
1302
1303/**
1304 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1305 * @phydev: the phy_device struct
1306 *
1307 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1308 * PHY_MAC_INTERRUPT
1309 */
1310static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1311{
1312 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1313}
1314
1315/**
1316 * phy_polling_mode - Convenience function for testing whether polling is
1317 * used to detect PHY status changes
1318 * @phydev: the phy_device struct
1319 */
1320static inline bool phy_polling_mode(struct phy_device *phydev)
1321{
1322 if (phydev->state == PHY_CABLETEST)
1323 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1324 return true;
1325
1326 return phydev->irq == PHY_POLL;
1327}
1328
1329/**
1330 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1331 * @phydev: the phy_device struct
1332 */
1333static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1334{
1335 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1336}
1337
1338/**
1339 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1340 * @phydev: the phy_device struct
1341 */
1342static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1343{
1344 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1345}
1346
1347/**
1348 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1349 * PTP hardware clock capabilities.
1350 * @phydev: the phy_device struct
1351 */
1352static inline bool phy_has_tsinfo(struct phy_device *phydev)
1353{
1354 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1355}
1356
1357/**
1358 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1359 * @phydev: the phy_device struct
1360 */
1361static inline bool phy_has_txtstamp(struct phy_device *phydev)
1362{
1363 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1364}
1365
1366static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1367{
1368 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1369}
1370
1371static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1372 int type)
1373{
1374 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1375}
1376
1377static inline int phy_ts_info(struct phy_device *phydev,
1378 struct ethtool_ts_info *tsinfo)
1379{
1380 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1381}
1382
1383static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1384 int type)
1385{
1386 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1387}
1388
1389/**
1390 * phy_is_internal - Convenience function for testing if a PHY is internal
1391 * @phydev: the phy_device struct
1392 */
1393static inline bool phy_is_internal(struct phy_device *phydev)
1394{
1395 return phydev->is_internal;
1396}
1397
1398/**
1399 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1400 * @phydev: the phy_device struct
1401 */
1402static inline bool phy_on_sfp(struct phy_device *phydev)
1403{
1404 return phydev->is_on_sfp_module;
1405}
1406
1407/**
1408 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1409 * PHY interface mode is RGMII (all variants)
1410 * @mode: the &phy_interface_t enum
1411 */
1412static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1413{
1414 return mode >= PHY_INTERFACE_MODE_RGMII &&
1415 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1416};
1417
1418/**
1419 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1420 * negotiation
1421 * @mode: one of &enum phy_interface_t
1422 *
1423 * Returns true if the PHY interface mode uses the 16-bit negotiation
1424 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1425 */
1426static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1427{
1428 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1429 mode == PHY_INTERFACE_MODE_2500BASEX;
1430}
1431
1432/**
1433 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1434 * is RGMII (all variants)
1435 * @phydev: the phy_device struct
1436 */
1437static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1438{
1439 return phy_interface_mode_is_rgmii(phydev->interface);
1440};
1441
1442/**
1443 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1444 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1445 * @phydev: the phy_device struct
1446 */
1447static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1448{
1449 return phydev->is_pseudo_fixed_link;
1450}
1451
1452int phy_save_page(struct phy_device *phydev);
1453int phy_select_page(struct phy_device *phydev, int page);
1454int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1455int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1456int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1457int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1458 u16 mask, u16 set);
1459int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1460 u16 mask, u16 set);
1461
1462struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1463 bool is_c45,
1464 struct phy_c45_device_ids *c45_ids);
1465#if IS_ENABLED(CONFIG_PHYLIB)
1466int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1467struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1468struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1469struct phy_device *device_phy_find_device(struct device *dev);
1470struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1471struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1472int phy_device_register(struct phy_device *phy);
1473void phy_device_free(struct phy_device *phydev);
1474#else
1475static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1476{
1477 return 0;
1478}
1479static inline
1480struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1481{
1482 return 0;
1483}
1484
1485static inline
1486struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1487{
1488 return NULL;
1489}
1490
1491static inline struct phy_device *device_phy_find_device(struct device *dev)
1492{
1493 return NULL;
1494}
1495
1496static inline
1497struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1498{
1499 return NULL;
1500}
1501
1502static inline
1503struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1504{
1505 return NULL;
1506}
1507
1508static inline int phy_device_register(struct phy_device *phy)
1509{
1510 return 0;
1511}
1512
1513static inline void phy_device_free(struct phy_device *phydev) { }
1514#endif /* CONFIG_PHYLIB */
1515void phy_device_remove(struct phy_device *phydev);
1516int phy_get_c45_ids(struct phy_device *phydev);
1517int phy_init_hw(struct phy_device *phydev);
1518int phy_suspend(struct phy_device *phydev);
1519int phy_resume(struct phy_device *phydev);
1520int __phy_resume(struct phy_device *phydev);
1521int phy_loopback(struct phy_device *phydev, bool enable);
1522void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1523void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1524int phy_sfp_probe(struct phy_device *phydev,
1525 const struct sfp_upstream_ops *ops);
1526struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1527 phy_interface_t interface);
1528struct phy_device *phy_find_first(struct mii_bus *bus);
1529int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1530 u32 flags, phy_interface_t interface);
1531int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1532 void (*handler)(struct net_device *),
1533 phy_interface_t interface);
1534struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1535 void (*handler)(struct net_device *),
1536 phy_interface_t interface);
1537void phy_disconnect(struct phy_device *phydev);
1538void phy_detach(struct phy_device *phydev);
1539void phy_start(struct phy_device *phydev);
1540void phy_stop(struct phy_device *phydev);
1541int phy_config_aneg(struct phy_device *phydev);
1542int phy_start_aneg(struct phy_device *phydev);
1543int phy_aneg_done(struct phy_device *phydev);
1544int phy_speed_down(struct phy_device *phydev, bool sync);
1545int phy_speed_up(struct phy_device *phydev);
1546
1547int phy_restart_aneg(struct phy_device *phydev);
1548int phy_reset_after_clk_enable(struct phy_device *phydev);
1549
1550#if IS_ENABLED(CONFIG_PHYLIB)
1551int phy_start_cable_test(struct phy_device *phydev,
1552 struct netlink_ext_ack *extack);
1553int phy_start_cable_test_tdr(struct phy_device *phydev,
1554 struct netlink_ext_ack *extack,
1555 const struct phy_tdr_config *config);
1556#else
1557static inline
1558int phy_start_cable_test(struct phy_device *phydev,
1559 struct netlink_ext_ack *extack)
1560{
1561 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1562 return -EOPNOTSUPP;
1563}
1564static inline
1565int phy_start_cable_test_tdr(struct phy_device *phydev,
1566 struct netlink_ext_ack *extack,
1567 const struct phy_tdr_config *config)
1568{
1569 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1570 return -EOPNOTSUPP;
1571}
1572#endif
1573
1574int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1575int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1576 u16 cm);
1577
1578static inline void phy_device_reset(struct phy_device *phydev, int value)
1579{
1580 mdio_device_reset(&phydev->mdio, value);
1581}
1582
1583#define phydev_err(_phydev, format, args...) \
1584 dev_err(&_phydev->mdio.dev, format, ##args)
1585
1586#define phydev_err_probe(_phydev, err, format, args...) \
1587 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1588
1589#define phydev_info(_phydev, format, args...) \
1590 dev_info(&_phydev->mdio.dev, format, ##args)
1591
1592#define phydev_warn(_phydev, format, args...) \
1593 dev_warn(&_phydev->mdio.dev, format, ##args)
1594
1595#define phydev_dbg(_phydev, format, args...) \
1596 dev_dbg(&_phydev->mdio.dev, format, ##args)
1597
1598static inline const char *phydev_name(const struct phy_device *phydev)
1599{
1600 return dev_name(&phydev->mdio.dev);
1601}
1602
1603static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1604{
1605 mutex_lock(&phydev->mdio.bus->mdio_lock);
1606}
1607
1608static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1609{
1610 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1611}
1612
1613void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1614 __printf(2, 3);
1615char *phy_attached_info_irq(struct phy_device *phydev)
1616 __malloc;
1617void phy_attached_info(struct phy_device *phydev);
1618
1619/* Clause 22 PHY */
1620int genphy_read_abilities(struct phy_device *phydev);
1621int genphy_setup_forced(struct phy_device *phydev);
1622int genphy_restart_aneg(struct phy_device *phydev);
1623int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1624int genphy_config_eee_advert(struct phy_device *phydev);
1625int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1626int genphy_aneg_done(struct phy_device *phydev);
1627int genphy_update_link(struct phy_device *phydev);
1628int genphy_read_lpa(struct phy_device *phydev);
1629int genphy_read_status_fixed(struct phy_device *phydev);
1630int genphy_read_status(struct phy_device *phydev);
1631int genphy_read_master_slave(struct phy_device *phydev);
1632int genphy_suspend(struct phy_device *phydev);
1633int genphy_resume(struct phy_device *phydev);
1634int genphy_loopback(struct phy_device *phydev, bool enable);
1635int genphy_soft_reset(struct phy_device *phydev);
1636irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1637
1638static inline int genphy_config_aneg(struct phy_device *phydev)
1639{
1640 return __genphy_config_aneg(phydev, false);
1641}
1642
1643static inline int genphy_no_config_intr(struct phy_device *phydev)
1644{
1645 return 0;
1646}
1647int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1648 u16 regnum);
1649int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1650 u16 regnum, u16 val);
1651
1652/* Clause 37 */
1653int genphy_c37_config_aneg(struct phy_device *phydev);
1654int genphy_c37_read_status(struct phy_device *phydev);
1655
1656/* Clause 45 PHY */
1657int genphy_c45_restart_aneg(struct phy_device *phydev);
1658int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1659int genphy_c45_aneg_done(struct phy_device *phydev);
1660int genphy_c45_read_link(struct phy_device *phydev);
1661int genphy_c45_read_lpa(struct phy_device *phydev);
1662int genphy_c45_read_pma(struct phy_device *phydev);
1663int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1664int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1665int genphy_c45_an_config_aneg(struct phy_device *phydev);
1666int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1667int genphy_c45_read_mdix(struct phy_device *phydev);
1668int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1669int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1670int genphy_c45_read_status(struct phy_device *phydev);
1671int genphy_c45_baset1_read_status(struct phy_device *phydev);
1672int genphy_c45_config_aneg(struct phy_device *phydev);
1673int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1674int genphy_c45_pma_resume(struct phy_device *phydev);
1675int genphy_c45_pma_suspend(struct phy_device *phydev);
1676int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1677
1678/* Generic C45 PHY driver */
1679extern struct phy_driver genphy_c45_driver;
1680
1681/* The gen10g_* functions are the old Clause 45 stub */
1682int gen10g_config_aneg(struct phy_device *phydev);
1683
1684static inline int phy_read_status(struct phy_device *phydev)
1685{
1686 if (!phydev->drv)
1687 return -EIO;
1688
1689 if (phydev->drv->read_status)
1690 return phydev->drv->read_status(phydev);
1691 else
1692 return genphy_read_status(phydev);
1693}
1694
1695void phy_driver_unregister(struct phy_driver *drv);
1696void phy_drivers_unregister(struct phy_driver *drv, int n);
1697int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1698int phy_drivers_register(struct phy_driver *new_driver, int n,
1699 struct module *owner);
1700void phy_error(struct phy_device *phydev);
1701void phy_state_machine(struct work_struct *work);
1702void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1703void phy_trigger_machine(struct phy_device *phydev);
1704void phy_mac_interrupt(struct phy_device *phydev);
1705void phy_start_machine(struct phy_device *phydev);
1706void phy_stop_machine(struct phy_device *phydev);
1707void phy_ethtool_ksettings_get(struct phy_device *phydev,
1708 struct ethtool_link_ksettings *cmd);
1709int phy_ethtool_ksettings_set(struct phy_device *phydev,
1710 const struct ethtool_link_ksettings *cmd);
1711int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1712int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1713int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1714int phy_disable_interrupts(struct phy_device *phydev);
1715void phy_request_interrupt(struct phy_device *phydev);
1716void phy_free_interrupt(struct phy_device *phydev);
1717void phy_print_status(struct phy_device *phydev);
1718int phy_get_rate_matching(struct phy_device *phydev,
1719 phy_interface_t iface);
1720void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1721void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1722void phy_advertise_supported(struct phy_device *phydev);
1723void phy_support_sym_pause(struct phy_device *phydev);
1724void phy_support_asym_pause(struct phy_device *phydev);
1725void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1726 bool autoneg);
1727void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1728bool phy_validate_pause(struct phy_device *phydev,
1729 struct ethtool_pauseparam *pp);
1730void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1731
1732s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1733 const int *delay_values, int size, bool is_rx);
1734
1735void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1736 bool *tx_pause, bool *rx_pause);
1737
1738int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1739 int (*run)(struct phy_device *));
1740int phy_register_fixup_for_id(const char *bus_id,
1741 int (*run)(struct phy_device *));
1742int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1743 int (*run)(struct phy_device *));
1744
1745int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1746int phy_unregister_fixup_for_id(const char *bus_id);
1747int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1748
1749int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1750int phy_get_eee_err(struct phy_device *phydev);
1751int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1752int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1753int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1754void phy_ethtool_get_wol(struct phy_device *phydev,
1755 struct ethtool_wolinfo *wol);
1756int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1757 struct ethtool_link_ksettings *cmd);
1758int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1759 const struct ethtool_link_ksettings *cmd);
1760int phy_ethtool_nway_reset(struct net_device *ndev);
1761int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1762void phy_package_leave(struct phy_device *phydev);
1763int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1764 int addr, size_t priv_size);
1765
1766#if IS_ENABLED(CONFIG_PHYLIB)
1767int __init mdio_bus_init(void);
1768void mdio_bus_exit(void);
1769#endif
1770
1771int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1772int phy_ethtool_get_sset_count(struct phy_device *phydev);
1773int phy_ethtool_get_stats(struct phy_device *phydev,
1774 struct ethtool_stats *stats, u64 *data);
1775
1776static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1777{
1778 struct phy_package_shared *shared = phydev->shared;
1779
1780 if (!shared)
1781 return -EIO;
1782
1783 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1784}
1785
1786static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1787{
1788 struct phy_package_shared *shared = phydev->shared;
1789
1790 if (!shared)
1791 return -EIO;
1792
1793 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1794}
1795
1796static inline int phy_package_write(struct phy_device *phydev,
1797 u32 regnum, u16 val)
1798{
1799 struct phy_package_shared *shared = phydev->shared;
1800
1801 if (!shared)
1802 return -EIO;
1803
1804 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1805}
1806
1807static inline int __phy_package_write(struct phy_device *phydev,
1808 u32 regnum, u16 val)
1809{
1810 struct phy_package_shared *shared = phydev->shared;
1811
1812 if (!shared)
1813 return -EIO;
1814
1815 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1816}
1817
1818static inline bool __phy_package_set_once(struct phy_device *phydev,
1819 unsigned int b)
1820{
1821 struct phy_package_shared *shared = phydev->shared;
1822
1823 if (!shared)
1824 return false;
1825
1826 return !test_and_set_bit(b, &shared->flags);
1827}
1828
1829static inline bool phy_package_init_once(struct phy_device *phydev)
1830{
1831 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1832}
1833
1834static inline bool phy_package_probe_once(struct phy_device *phydev)
1835{
1836 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1837}
1838
1839extern struct bus_type mdio_bus_type;
1840
1841struct mdio_board_info {
1842 const char *bus_id;
1843 char modalias[MDIO_NAME_SIZE];
1844 int mdio_addr;
1845 const void *platform_data;
1846};
1847
1848#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1849int mdiobus_register_board_info(const struct mdio_board_info *info,
1850 unsigned int n);
1851#else
1852static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1853 unsigned int n)
1854{
1855 return 0;
1856}
1857#endif
1858
1859
1860/**
1861 * phy_module_driver() - Helper macro for registering PHY drivers
1862 * @__phy_drivers: array of PHY drivers to register
1863 * @__count: Numbers of members in array
1864 *
1865 * Helper macro for PHY drivers which do not do anything special in module
1866 * init/exit. Each module may only use this macro once, and calling it
1867 * replaces module_init() and module_exit().
1868 */
1869#define phy_module_driver(__phy_drivers, __count) \
1870static int __init phy_module_init(void) \
1871{ \
1872 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1873} \
1874module_init(phy_module_init); \
1875static void __exit phy_module_exit(void) \
1876{ \
1877 phy_drivers_unregister(__phy_drivers, __count); \
1878} \
1879module_exit(phy_module_exit)
1880
1881#define module_phy_driver(__phy_drivers) \
1882 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1883
1884bool phy_driver_is_genphy(struct phy_device *phydev);
1885bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1886
1887#endif /* __PHY_H */