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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * LiteUART serial controller (LiteX) Driver 4 * 5 * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> 6 */ 7 8#include <linux/console.h> 9#include <linux/litex.h> 10#include <linux/module.h> 11#include <linux/of.h> 12#include <linux/of_address.h> 13#include <linux/of_platform.h> 14#include <linux/serial.h> 15#include <linux/serial_core.h> 16#include <linux/slab.h> 17#include <linux/timer.h> 18#include <linux/tty_flip.h> 19#include <linux/xarray.h> 20 21/* 22 * CSRs definitions (base address offsets + width) 23 * 24 * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus, 25 * 32-bit aligned. 26 * 27 * Supporting other configurations might require new definitions or a more 28 * generic way of indexing the LiteX CSRs. 29 * 30 * For more details on how CSRs are defined and handled in LiteX, see comments 31 * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c 32 */ 33#define OFF_RXTX 0x00 34#define OFF_TXFULL 0x04 35#define OFF_RXEMPTY 0x08 36#define OFF_EV_STATUS 0x0c 37#define OFF_EV_PENDING 0x10 38#define OFF_EV_ENABLE 0x14 39 40/* events */ 41#define EV_TX 0x1 42#define EV_RX 0x2 43 44struct liteuart_port { 45 struct uart_port port; 46 struct timer_list timer; 47 u32 id; 48}; 49 50#define to_liteuart_port(port) container_of(port, struct liteuart_port, port) 51 52static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC); 53 54#ifdef CONFIG_SERIAL_LITEUART_CONSOLE 55static struct console liteuart_console; 56#endif 57 58static struct uart_driver liteuart_driver = { 59 .owner = THIS_MODULE, 60 .driver_name = "liteuart", 61 .dev_name = "ttyLXU", 62 .major = 0, 63 .minor = 0, 64 .nr = CONFIG_SERIAL_LITEUART_MAX_PORTS, 65#ifdef CONFIG_SERIAL_LITEUART_CONSOLE 66 .cons = &liteuart_console, 67#endif 68}; 69 70static void liteuart_timer(struct timer_list *t) 71{ 72 struct liteuart_port *uart = from_timer(uart, t, timer); 73 struct uart_port *port = &uart->port; 74 unsigned char __iomem *membase = port->membase; 75 unsigned int flg = TTY_NORMAL; 76 int ch; 77 unsigned long status; 78 79 while ((status = !litex_read8(membase + OFF_RXEMPTY)) == 1) { 80 ch = litex_read8(membase + OFF_RXTX); 81 port->icount.rx++; 82 83 /* necessary for RXEMPTY to refresh its value */ 84 litex_write8(membase + OFF_EV_PENDING, EV_TX | EV_RX); 85 86 /* no overflow bits in status */ 87 if (!(uart_handle_sysrq_char(port, ch))) 88 uart_insert_char(port, status, 0, ch, flg); 89 90 tty_flip_buffer_push(&port->state->port); 91 } 92 93 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 94} 95 96static void liteuart_putchar(struct uart_port *port, unsigned char ch) 97{ 98 while (litex_read8(port->membase + OFF_TXFULL)) 99 cpu_relax(); 100 101 litex_write8(port->membase + OFF_RXTX, ch); 102} 103 104static unsigned int liteuart_tx_empty(struct uart_port *port) 105{ 106 /* not really tx empty, just checking if tx is not full */ 107 if (!litex_read8(port->membase + OFF_TXFULL)) 108 return TIOCSER_TEMT; 109 110 return 0; 111} 112 113static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl) 114{ 115 /* modem control register is not present in LiteUART */ 116} 117 118static unsigned int liteuart_get_mctrl(struct uart_port *port) 119{ 120 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 121} 122 123static void liteuart_stop_tx(struct uart_port *port) 124{ 125} 126 127static void liteuart_start_tx(struct uart_port *port) 128{ 129 struct circ_buf *xmit = &port->state->xmit; 130 unsigned char ch; 131 132 if (unlikely(port->x_char)) { 133 litex_write8(port->membase + OFF_RXTX, port->x_char); 134 port->icount.tx++; 135 port->x_char = 0; 136 } else if (!uart_circ_empty(xmit)) { 137 while (xmit->head != xmit->tail) { 138 ch = xmit->buf[xmit->tail]; 139 uart_xmit_advance(port, 1); 140 liteuart_putchar(port, ch); 141 } 142 } 143 144 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 145 uart_write_wakeup(port); 146} 147 148static void liteuart_stop_rx(struct uart_port *port) 149{ 150 struct liteuart_port *uart = to_liteuart_port(port); 151 152 /* just delete timer */ 153 del_timer(&uart->timer); 154} 155 156static void liteuart_break_ctl(struct uart_port *port, int break_state) 157{ 158 /* LiteUART doesn't support sending break signal */ 159} 160 161static int liteuart_startup(struct uart_port *port) 162{ 163 struct liteuart_port *uart = to_liteuart_port(port); 164 165 /* disable events */ 166 litex_write8(port->membase + OFF_EV_ENABLE, 0); 167 168 /* prepare timer for polling */ 169 timer_setup(&uart->timer, liteuart_timer, 0); 170 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 171 172 return 0; 173} 174 175static void liteuart_shutdown(struct uart_port *port) 176{ 177} 178 179static void liteuart_set_termios(struct uart_port *port, struct ktermios *new, 180 const struct ktermios *old) 181{ 182 unsigned int baud; 183 unsigned long flags; 184 185 spin_lock_irqsave(&port->lock, flags); 186 187 /* update baudrate */ 188 baud = uart_get_baud_rate(port, new, old, 0, 460800); 189 uart_update_timeout(port, new->c_cflag, baud); 190 191 spin_unlock_irqrestore(&port->lock, flags); 192} 193 194static const char *liteuart_type(struct uart_port *port) 195{ 196 return "liteuart"; 197} 198 199static void liteuart_release_port(struct uart_port *port) 200{ 201} 202 203static int liteuart_request_port(struct uart_port *port) 204{ 205 return 0; 206} 207 208static void liteuart_config_port(struct uart_port *port, int flags) 209{ 210 /* 211 * Driver core for serial ports forces a non-zero value for port type. 212 * Write an arbitrary value here to accommodate the serial core driver, 213 * as ID part of UAPI is redundant. 214 */ 215 port->type = 1; 216} 217 218static int liteuart_verify_port(struct uart_port *port, 219 struct serial_struct *ser) 220{ 221 if (port->type != PORT_UNKNOWN && ser->type != 1) 222 return -EINVAL; 223 224 return 0; 225} 226 227static const struct uart_ops liteuart_ops = { 228 .tx_empty = liteuart_tx_empty, 229 .set_mctrl = liteuart_set_mctrl, 230 .get_mctrl = liteuart_get_mctrl, 231 .stop_tx = liteuart_stop_tx, 232 .start_tx = liteuart_start_tx, 233 .stop_rx = liteuart_stop_rx, 234 .break_ctl = liteuart_break_ctl, 235 .startup = liteuart_startup, 236 .shutdown = liteuart_shutdown, 237 .set_termios = liteuart_set_termios, 238 .type = liteuart_type, 239 .release_port = liteuart_release_port, 240 .request_port = liteuart_request_port, 241 .config_port = liteuart_config_port, 242 .verify_port = liteuart_verify_port, 243}; 244 245static int liteuart_probe(struct platform_device *pdev) 246{ 247 struct liteuart_port *uart; 248 struct uart_port *port; 249 struct xa_limit limit; 250 int dev_id, ret; 251 252 /* look for aliases; auto-enumerate for free index if not found */ 253 dev_id = of_alias_get_id(pdev->dev.of_node, "serial"); 254 if (dev_id < 0) 255 limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS); 256 else 257 limit = XA_LIMIT(dev_id, dev_id); 258 259 uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL); 260 if (!uart) 261 return -ENOMEM; 262 263 ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL); 264 if (ret) 265 return ret; 266 267 uart->id = dev_id; 268 port = &uart->port; 269 270 /* get membase */ 271 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 272 if (IS_ERR(port->membase)) { 273 ret = PTR_ERR(port->membase); 274 goto err_erase_id; 275 } 276 277 /* values not from device tree */ 278 port->dev = &pdev->dev; 279 port->iotype = UPIO_MEM; 280 port->flags = UPF_BOOT_AUTOCONF; 281 port->ops = &liteuart_ops; 282 port->regshift = 2; 283 port->fifosize = 16; 284 port->iobase = 1; 285 port->type = PORT_UNKNOWN; 286 port->line = dev_id; 287 spin_lock_init(&port->lock); 288 289 platform_set_drvdata(pdev, port); 290 291 ret = uart_add_one_port(&liteuart_driver, &uart->port); 292 if (ret) 293 goto err_erase_id; 294 295 return 0; 296 297err_erase_id: 298 xa_erase(&liteuart_array, uart->id); 299 300 return ret; 301} 302 303static int liteuart_remove(struct platform_device *pdev) 304{ 305 struct uart_port *port = platform_get_drvdata(pdev); 306 struct liteuart_port *uart = to_liteuart_port(port); 307 308 uart_remove_one_port(&liteuart_driver, port); 309 xa_erase(&liteuart_array, uart->id); 310 311 return 0; 312} 313 314static const struct of_device_id liteuart_of_match[] = { 315 { .compatible = "litex,liteuart" }, 316 {} 317}; 318MODULE_DEVICE_TABLE(of, liteuart_of_match); 319 320static struct platform_driver liteuart_platform_driver = { 321 .probe = liteuart_probe, 322 .remove = liteuart_remove, 323 .driver = { 324 .name = "liteuart", 325 .of_match_table = liteuart_of_match, 326 }, 327}; 328 329#ifdef CONFIG_SERIAL_LITEUART_CONSOLE 330 331static void liteuart_console_write(struct console *co, const char *s, 332 unsigned int count) 333{ 334 struct liteuart_port *uart; 335 struct uart_port *port; 336 unsigned long flags; 337 338 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 339 port = &uart->port; 340 341 spin_lock_irqsave(&port->lock, flags); 342 uart_console_write(port, s, count, liteuart_putchar); 343 spin_unlock_irqrestore(&port->lock, flags); 344} 345 346static int liteuart_console_setup(struct console *co, char *options) 347{ 348 struct liteuart_port *uart; 349 struct uart_port *port; 350 int baud = 115200; 351 int bits = 8; 352 int parity = 'n'; 353 int flow = 'n'; 354 355 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 356 if (!uart) 357 return -ENODEV; 358 359 port = &uart->port; 360 if (!port->membase) 361 return -ENODEV; 362 363 if (options) 364 uart_parse_options(options, &baud, &parity, &bits, &flow); 365 366 return uart_set_options(port, co, baud, parity, bits, flow); 367} 368 369static struct console liteuart_console = { 370 .name = "liteuart", 371 .write = liteuart_console_write, 372 .device = uart_console_device, 373 .setup = liteuart_console_setup, 374 .flags = CON_PRINTBUFFER, 375 .index = -1, 376 .data = &liteuart_driver, 377}; 378 379static int __init liteuart_console_init(void) 380{ 381 register_console(&liteuart_console); 382 383 return 0; 384} 385console_initcall(liteuart_console_init); 386 387static void early_liteuart_write(struct console *console, const char *s, 388 unsigned int count) 389{ 390 struct earlycon_device *device = console->data; 391 struct uart_port *port = &device->port; 392 393 uart_console_write(port, s, count, liteuart_putchar); 394} 395 396static int __init early_liteuart_setup(struct earlycon_device *device, 397 const char *options) 398{ 399 if (!device->port.membase) 400 return -ENODEV; 401 402 device->con->write = early_liteuart_write; 403 return 0; 404} 405 406OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup); 407#endif /* CONFIG_SERIAL_LITEUART_CONSOLE */ 408 409static int __init liteuart_init(void) 410{ 411 int res; 412 413 res = uart_register_driver(&liteuart_driver); 414 if (res) 415 return res; 416 417 res = platform_driver_register(&liteuart_platform_driver); 418 if (res) { 419 uart_unregister_driver(&liteuart_driver); 420 return res; 421 } 422 423 return 0; 424} 425 426static void __exit liteuart_exit(void) 427{ 428 platform_driver_unregister(&liteuart_platform_driver); 429 uart_unregister_driver(&liteuart_driver); 430} 431 432module_init(liteuart_init); 433module_exit(liteuart_exit); 434 435MODULE_AUTHOR("Antmicro <www.antmicro.com>"); 436MODULE_DESCRIPTION("LiteUART serial driver"); 437MODULE_LICENSE("GPL v2"); 438MODULE_ALIAS("platform:liteuart");