tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QMP PHY controller (USB, SC8280XP)
8
9maintainers:
10 - Vinod Koul <vkoul@kernel.org>
11
12description:
13 The QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
15
16properties:
17 compatible:
18 enum:
19 - qcom,sc8280xp-qmp-usb3-uni-phy
20
21 reg:
22 maxItems: 1
23
24 clocks:
25 maxItems: 4
26
27 clock-names:
28 items:
29 - const: aux
30 - const: ref
31 - const: com_aux
32 - const: pipe
33
34 power-domains:
35 maxItems: 1
36
37 resets:
38 maxItems: 2
39
40 reset-names:
41 items:
42 - const: phy
43 - const: phy_phy
44
45 vdda-phy-supply: true
46
47 vdda-pll-supply: true
48
49 "#clock-cells":
50 const: 0
51
52 clock-output-names:
53 maxItems: 1
54
55 "#phy-cells":
56 const: 0
57
58required:
59 - compatible
60 - reg
61 - clocks
62 - clock-names
63 - power-domains
64 - resets
65 - reset-names
66 - vdda-phy-supply
67 - vdda-pll-supply
68 - "#clock-cells"
69 - clock-output-names
70 - "#phy-cells"
71
72additionalProperties: false
73
74examples:
75 - |
76 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
77 #include <dt-bindings/clock/qcom,rpmh.h>
78
79 phy@88ef000 {
80 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
81 reg = <0x088ef000 0x2000>;
82
83 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
84 <&gcc GCC_USB3_MP0_CLKREF_CLK>,
85 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
86 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
87 clock-names = "aux", "ref", "com_aux", "pipe";
88
89 power-domains = <&gcc USB30_MP_GDSC>;
90
91 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
92 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
93 reset-names = "phy", "phy_phy";
94
95 vdda-phy-supply = <&vreg_l3a>;
96 vdda-pll-supply = <&vreg_l5a>;
97
98 #clock-cells = <0>;
99 clock-output-names = "usb2_phy0_pipe_clk";
100
101 #phy-cells = <0>;
102 };