tjh.dev
Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: GPL-2.0
2# Intel pin control drivers
3menu "Intel pinctrl drivers"
4 depends on X86 || COMPILE_TEST
5
6config PINCTRL_BAYTRAIL
7 bool "Intel Baytrail GPIO pin control"
8 depends on ACPI
9 select PINCTRL_INTEL
10 help
11 driver for memory mapped GPIO functionality on Intel Baytrail
12 platforms. Supports 3 banks with 102, 28 and 44 gpios.
13 Most pins are usually muxed to some other functionality by firmware,
14 so only a small amount is available for gpio use.
15
16 Requires ACPI device enumeration code to set up a platform device.
17
18config PINCTRL_CHERRYVIEW
19 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
20 depends on ACPI
21 select PINCTRL_INTEL
22 help
23 Cherryview/Braswell pinctrl driver provides an interface that
24 allows configuring of SoC pins and using them as GPIOs.
25
26config PINCTRL_LYNXPOINT
27 tristate "Intel Lynxpoint pinctrl and GPIO driver"
28 depends on ACPI
29 select PINMUX
30 select PINCONF
31 select GENERIC_PINCONF
32 select GPIOLIB
33 select GPIOLIB_IRQCHIP
34 help
35 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
36 provides an interface that allows configuring of PCH pins and
37 using them as GPIOs.
38
39config PINCTRL_MERRIFIELD
40 tristate "Intel Merrifield pinctrl driver"
41 depends on X86_INTEL_MID
42 select PINMUX
43 select PINCONF
44 select GENERIC_PINCONF
45 help
46 Merrifield Family-Level Interface Shim (FLIS) driver provides an
47 interface that allows configuring of SoC pins and using them as
48 GPIOs.
49
50config PINCTRL_MOOREFIELD
51 tristate "Intel Moorefield pinctrl driver"
52 depends on X86_INTEL_MID
53 select PINMUX
54 select PINCONF
55 select GENERIC_PINCONF
56 help
57 Moorefield Family-Level Interface Shim (FLIS) driver provides an
58 interface that allows configuring of SoC pins and using them as
59 GPIOs.
60
61config PINCTRL_INTEL
62 tristate
63 select PINMUX
64 select PINCONF
65 select GENERIC_PINCONF
66 select GPIOLIB
67 select GPIOLIB_IRQCHIP
68
69config PINCTRL_ALDERLAKE
70 tristate "Intel Alder Lake pinctrl and GPIO driver"
71 depends on ACPI
72 select PINCTRL_INTEL
73 help
74 This pinctrl driver provides an interface that allows configuring
75 of Intel Alder Lake PCH pins and using them as GPIOs.
76
77config PINCTRL_BROXTON
78 tristate "Intel Broxton pinctrl and GPIO driver"
79 depends on ACPI
80 select PINCTRL_INTEL
81 help
82 Broxton pinctrl driver provides an interface that allows
83 configuring of SoC pins and using them as GPIOs.
84
85config PINCTRL_CANNONLAKE
86 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
87 depends on ACPI
88 select PINCTRL_INTEL
89 help
90 This pinctrl driver provides an interface that allows configuring
91 of Intel Cannon Lake PCH pins and using them as GPIOs.
92
93config PINCTRL_CEDARFORK
94 tristate "Intel Cedar Fork pinctrl and GPIO driver"
95 depends on ACPI
96 select PINCTRL_INTEL
97 help
98 This pinctrl driver provides an interface that allows configuring
99 of Intel Cedar Fork PCH pins and using them as GPIOs.
100
101config PINCTRL_DENVERTON
102 tristate "Intel Denverton pinctrl and GPIO driver"
103 depends on ACPI
104 select PINCTRL_INTEL
105 help
106 This pinctrl driver provides an interface that allows configuring
107 of Intel Denverton SoC pins and using them as GPIOs.
108
109config PINCTRL_ELKHARTLAKE
110 tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
111 depends on ACPI
112 select PINCTRL_INTEL
113 help
114 This pinctrl driver provides an interface that allows configuring
115 of Intel Elkhart Lake SoC pins and using them as GPIOs.
116
117config PINCTRL_EMMITSBURG
118 tristate "Intel Emmitsburg pinctrl and GPIO driver"
119 depends on ACPI
120 select PINCTRL_INTEL
121 help
122 This pinctrl driver provides an interface that allows configuring
123 of Intel Emmitsburg pins and using them as GPIOs.
124
125config PINCTRL_GEMINILAKE
126 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
127 depends on ACPI
128 select PINCTRL_INTEL
129 help
130 This pinctrl driver provides an interface that allows configuring
131 of Intel Gemini Lake SoC pins and using them as GPIOs.
132
133config PINCTRL_ICELAKE
134 tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
135 depends on ACPI
136 select PINCTRL_INTEL
137 help
138 This pinctrl driver provides an interface that allows configuring
139 of Intel Ice Lake PCH pins and using them as GPIOs.
140
141config PINCTRL_JASPERLAKE
142 tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
143 depends on ACPI
144 select PINCTRL_INTEL
145 help
146 This pinctrl driver provides an interface that allows configuring
147 of Intel Jasper Lake PCH pins and using them as GPIOs.
148
149config PINCTRL_LAKEFIELD
150 tristate "Intel Lakefield SoC pinctrl and GPIO driver"
151 depends on ACPI
152 select PINCTRL_INTEL
153 help
154 This pinctrl driver provides an interface that allows configuring
155 of Intel Lakefield SoC pins and using them as GPIOs.
156
157config PINCTRL_LEWISBURG
158 tristate "Intel Lewisburg pinctrl and GPIO driver"
159 depends on ACPI
160 select PINCTRL_INTEL
161 help
162 This pinctrl driver provides an interface that allows configuring
163 of Intel Lewisburg pins and using them as GPIOs.
164
165config PINCTRL_METEORLAKE
166 tristate "Intel Meteor Lake pinctrl and GPIO driver"
167 depends on ACPI
168 select PINCTRL_INTEL
169 help
170 This pinctrl driver provides an interface that allows configuring
171 of Intel Meteor Lake pins and using them as GPIOs.
172
173config PINCTRL_SUNRISEPOINT
174 tristate "Intel Sunrisepoint pinctrl and GPIO driver"
175 depends on ACPI
176 select PINCTRL_INTEL
177 help
178 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
179 provides an interface that allows configuring of PCH pins and
180 using them as GPIOs.
181
182config PINCTRL_TIGERLAKE
183 tristate "Intel Tiger Lake pinctrl and GPIO driver"
184 depends on ACPI
185 select PINCTRL_INTEL
186 help
187 This pinctrl driver provides an interface that allows configuring
188 of Intel Tiger Lake PCH pins and using them as GPIOs.
189
190endmenu