Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
4 * Copyright 2016 Microsemi Corporation
5 * Copyright 2014-2015 PMC-Sierra, Inc.
6 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15 * NON INFRINGEMENT. See the GNU General Public License for more details.
16 *
17 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/interrupt.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25#include <linux/kernel.h>
26#include <linux/slab.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/timer.h>
30#include <linux/init.h>
31#include <linux/spinlock.h>
32#include <linux/compat.h>
33#include <linux/blktrace_api.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/completion.h>
38#include <linux/moduleparam.h>
39#include <scsi/scsi.h>
40#include <scsi/scsi_cmnd.h>
41#include <scsi/scsi_device.h>
42#include <scsi/scsi_host.h>
43#include <scsi/scsi_tcq.h>
44#include <scsi/scsi_eh.h>
45#include <scsi/scsi_transport_sas.h>
46#include <scsi/scsi_dbg.h>
47#include <linux/cciss_ioctl.h>
48#include <linux/string.h>
49#include <linux/bitmap.h>
50#include <linux/atomic.h>
51#include <linux/jiffies.h>
52#include <linux/percpu-defs.h>
53#include <linux/percpu.h>
54#include <linux/unaligned.h>
55#include <asm/div64.h>
56#include "hpsa_cmd.h"
57#include "hpsa.h"
58
59/*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63#define HPSA_DRIVER_VERSION "3.4.20-200"
64#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65#define HPSA "hpsa"
66
67/* How long to wait for CISS doorbell communication */
68#define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69#define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70#define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71#define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72#define MAX_IOCTL_CONFIG_WAIT 1000
73
74/*define how many times we will try a command because of bus resets */
75#define MAX_CMD_RETRIES 3
76/* How long to wait before giving up on a command */
77#define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78
79/* Embedded module documentation macros - see modules.h */
80MODULE_AUTHOR("Hewlett-Packard Company");
81MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82 HPSA_DRIVER_VERSION);
83MODULE_VERSION(HPSA_DRIVER_VERSION);
84MODULE_LICENSE("GPL");
85MODULE_ALIAS("cciss");
86
87static int hpsa_simple_mode;
88module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
89MODULE_PARM_DESC(hpsa_simple_mode,
90 "Use 'simple mode' rather than 'performant mode'");
91
92/* define the PCI info for the cards we can control */
93static const struct pci_device_id hpsa_pci_device_id[] = {
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151 {0,}
152};
153
154MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155
156/* board_id = Subsystem Device ID & Vendor ID
157 * product = Marketing Name for the board
158 * access = Address of the struct of function pointers
159 */
160static struct board_type products[] = {
161 {0x40700E11, "Smart Array 5300", &SA5A_access},
162 {0x40800E11, "Smart Array 5i", &SA5B_access},
163 {0x40820E11, "Smart Array 532", &SA5B_access},
164 {0x40830E11, "Smart Array 5312", &SA5B_access},
165 {0x409A0E11, "Smart Array 641", &SA5A_access},
166 {0x409B0E11, "Smart Array 642", &SA5A_access},
167 {0x409C0E11, "Smart Array 6400", &SA5A_access},
168 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169 {0x40910E11, "Smart Array 6i", &SA5A_access},
170 {0x3225103C, "Smart Array P600", &SA5A_access},
171 {0x3223103C, "Smart Array P800", &SA5A_access},
172 {0x3234103C, "Smart Array P400", &SA5A_access},
173 {0x3235103C, "Smart Array P400i", &SA5A_access},
174 {0x3211103C, "Smart Array E200i", &SA5A_access},
175 {0x3212103C, "Smart Array E200", &SA5A_access},
176 {0x3213103C, "Smart Array E200i", &SA5A_access},
177 {0x3214103C, "Smart Array E200i", &SA5A_access},
178 {0x3215103C, "Smart Array E200i", &SA5A_access},
179 {0x3237103C, "Smart Array E500", &SA5A_access},
180 {0x323D103C, "Smart Array P700m", &SA5A_access},
181 {0x3241103C, "Smart Array P212", &SA5_access},
182 {0x3243103C, "Smart Array P410", &SA5_access},
183 {0x3245103C, "Smart Array P410i", &SA5_access},
184 {0x3247103C, "Smart Array P411", &SA5_access},
185 {0x3249103C, "Smart Array P812", &SA5_access},
186 {0x324A103C, "Smart Array P712m", &SA5_access},
187 {0x324B103C, "Smart Array P711m", &SA5_access},
188 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189 {0x3350103C, "Smart Array P222", &SA5_access},
190 {0x3351103C, "Smart Array P420", &SA5_access},
191 {0x3352103C, "Smart Array P421", &SA5_access},
192 {0x3353103C, "Smart Array P822", &SA5_access},
193 {0x3354103C, "Smart Array P420i", &SA5_access},
194 {0x3355103C, "Smart Array P220i", &SA5_access},
195 {0x3356103C, "Smart Array P721m", &SA5_access},
196 {0x1920103C, "Smart Array P430i", &SA5_access},
197 {0x1921103C, "Smart Array P830i", &SA5_access},
198 {0x1922103C, "Smart Array P430", &SA5_access},
199 {0x1923103C, "Smart Array P431", &SA5_access},
200 {0x1924103C, "Smart Array P830", &SA5_access},
201 {0x1925103C, "Smart Array P831", &SA5_access},
202 {0x1926103C, "Smart Array P731m", &SA5_access},
203 {0x1928103C, "Smart Array P230i", &SA5_access},
204 {0x1929103C, "Smart Array P530", &SA5_access},
205 {0x21BD103C, "Smart Array P244br", &SA5_access},
206 {0x21BE103C, "Smart Array P741m", &SA5_access},
207 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
208 {0x21C0103C, "Smart Array P440ar", &SA5_access},
209 {0x21C1103C, "Smart Array P840ar", &SA5_access},
210 {0x21C2103C, "Smart Array P440", &SA5_access},
211 {0x21C3103C, "Smart Array P441", &SA5_access},
212 {0x21C4103C, "Smart Array", &SA5_access},
213 {0x21C5103C, "Smart Array P841", &SA5_access},
214 {0x21C6103C, "Smart HBA H244br", &SA5_access},
215 {0x21C7103C, "Smart HBA H240", &SA5_access},
216 {0x21C8103C, "Smart HBA H241", &SA5_access},
217 {0x21C9103C, "Smart Array", &SA5_access},
218 {0x21CA103C, "Smart Array P246br", &SA5_access},
219 {0x21CB103C, "Smart Array P840", &SA5_access},
220 {0x21CC103C, "Smart Array", &SA5_access},
221 {0x21CD103C, "Smart Array", &SA5_access},
222 {0x21CE103C, "Smart HBA", &SA5_access},
223 {0x05809005, "SmartHBA-SA", &SA5_access},
224 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
225 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
227 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
228 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
229 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
230 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
231 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
232 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
233 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
235};
236
237static struct scsi_transport_template *hpsa_sas_transport_template;
238static int hpsa_add_sas_host(struct ctlr_info *h);
239static void hpsa_delete_sas_host(struct ctlr_info *h);
240static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241 struct hpsa_scsi_dev_t *device);
242static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243static struct hpsa_scsi_dev_t
244 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245 struct sas_rphy *rphy);
246
247#define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248static const struct scsi_cmnd hpsa_cmd_busy;
249#define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250static const struct scsi_cmnd hpsa_cmd_idle;
251static int number_of_controllers;
252
253static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
254static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
255static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
256 void __user *arg);
257static int hpsa_passthru_ioctl(struct ctlr_info *h,
258 IOCTL_Command_struct *iocommand);
259static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
260 BIG_IOCTL_Command_struct *ioc);
261
262#ifdef CONFIG_COMPAT
263static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
264 void __user *arg);
265#endif
266
267static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268static struct CommandList *cmd_alloc(struct ctlr_info *h);
269static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
270static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
271 struct scsi_cmnd *scmd);
272static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274 int cmd_type);
275static void hpsa_free_cmd_pool(struct ctlr_info *h);
276#define VPD_PAGE (1 << 8)
277#define HPSA_SIMPLE_ERROR_BITS 0x03
278
279static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280static void hpsa_scan_start(struct Scsi_Host *);
281static int hpsa_scan_finished(struct Scsi_Host *sh,
282 unsigned long elapsed_time);
283static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284
285static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286static int hpsa_sdev_init(struct scsi_device *sdev);
287static int hpsa_sdev_configure(struct scsi_device *sdev,
288 struct queue_limits *lim);
289static void hpsa_sdev_destroy(struct scsi_device *sdev);
290
291static void hpsa_update_scsi_devices(struct ctlr_info *h);
292static int check_for_unit_attention(struct ctlr_info *h,
293 struct CommandList *c);
294static void check_ioctl_unit_attention(struct ctlr_info *h,
295 struct CommandList *c);
296/* performant mode helper functions */
297static void calc_bucket_map(int *bucket, int num_buckets,
298 int nsgs, int min_blocks, u32 *bucket_map);
299static void hpsa_free_performant_mode(struct ctlr_info *h);
300static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
301static inline u32 next_command(struct ctlr_info *h, u8 q);
302static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
303 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
304 u64 *cfg_offset);
305static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
306 unsigned long *memory_bar);
307static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
308 bool *legacy_board);
309static int wait_for_device_to_become_ready(struct ctlr_info *h,
310 unsigned char lunaddr[],
311 int reply_queue);
312static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
313 int wait_for_ready);
314static inline void finish_cmd(struct CommandList *c);
315static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
316#define BOARD_NOT_READY 0
317#define BOARD_READY 1
318static void hpsa_drain_accel_commands(struct ctlr_info *h);
319static void hpsa_flush_cache(struct ctlr_info *h);
320static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
321 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
322 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
323static void hpsa_command_resubmit_worker(struct work_struct *work);
324static u32 lockup_detected(struct ctlr_info *h);
325static int detect_controller_lockup(struct ctlr_info *h);
326static void hpsa_disable_rld_caching(struct ctlr_info *h);
327static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
328 struct ReportExtendedLUNdata *buf, int bufsize);
329static bool hpsa_vpd_page_supported(struct ctlr_info *h,
330 unsigned char scsi3addr[], u8 page);
331static int hpsa_luns_changed(struct ctlr_info *h);
332static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
333 struct hpsa_scsi_dev_t *dev,
334 unsigned char *scsi3addr);
335
336static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
337{
338 unsigned long *priv = shost_priv(sdev->host);
339 return (struct ctlr_info *) *priv;
340}
341
342static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
343{
344 unsigned long *priv = shost_priv(sh);
345 return (struct ctlr_info *) *priv;
346}
347
348static inline bool hpsa_is_cmd_idle(struct CommandList *c)
349{
350 return c->scsi_cmd == SCSI_CMD_IDLE;
351}
352
353/* extract sense key, asc, and ascq from sense data. -1 means invalid. */
354static void decode_sense_data(const u8 *sense_data, int sense_data_len,
355 u8 *sense_key, u8 *asc, u8 *ascq)
356{
357 struct scsi_sense_hdr sshdr;
358 bool rc;
359
360 *sense_key = -1;
361 *asc = -1;
362 *ascq = -1;
363
364 if (sense_data_len < 1)
365 return;
366
367 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
368 if (rc) {
369 *sense_key = sshdr.sense_key;
370 *asc = sshdr.asc;
371 *ascq = sshdr.ascq;
372 }
373}
374
375static int check_for_unit_attention(struct ctlr_info *h,
376 struct CommandList *c)
377{
378 u8 sense_key, asc, ascq;
379 int sense_len;
380
381 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
382 sense_len = sizeof(c->err_info->SenseInfo);
383 else
384 sense_len = c->err_info->SenseLen;
385
386 decode_sense_data(c->err_info->SenseInfo, sense_len,
387 &sense_key, &asc, &ascq);
388 if (sense_key != UNIT_ATTENTION || asc == 0xff)
389 return 0;
390
391 switch (asc) {
392 case STATE_CHANGED:
393 dev_warn(&h->pdev->dev,
394 "%s: a state change detected, command retried\n",
395 h->devname);
396 break;
397 case LUN_FAILED:
398 dev_warn(&h->pdev->dev,
399 "%s: LUN failure detected\n", h->devname);
400 break;
401 case REPORT_LUNS_CHANGED:
402 dev_warn(&h->pdev->dev,
403 "%s: report LUN data changed\n", h->devname);
404 /*
405 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
406 * target (array) devices.
407 */
408 break;
409 case POWER_OR_RESET:
410 dev_warn(&h->pdev->dev,
411 "%s: a power on or device reset detected\n",
412 h->devname);
413 break;
414 case UNIT_ATTENTION_CLEARED:
415 dev_warn(&h->pdev->dev,
416 "%s: unit attention cleared by another initiator\n",
417 h->devname);
418 break;
419 default:
420 dev_warn(&h->pdev->dev,
421 "%s: unknown unit attention detected\n",
422 h->devname);
423 break;
424 }
425 return 1;
426}
427
428static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
429{
430 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
431 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
432 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
433 return 0;
434 dev_warn(&h->pdev->dev, HPSA "device busy");
435 return 1;
436}
437
438static u32 lockup_detected(struct ctlr_info *h);
439static ssize_t host_show_lockup_detected(struct device *dev,
440 struct device_attribute *attr, char *buf)
441{
442 int ld;
443 struct ctlr_info *h;
444 struct Scsi_Host *shost = class_to_shost(dev);
445
446 h = shost_to_hba(shost);
447 ld = lockup_detected(h);
448
449 return sprintf(buf, "ld=%d\n", ld);
450}
451
452static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
453 struct device_attribute *attr,
454 const char *buf, size_t count)
455{
456 int status;
457 struct ctlr_info *h;
458 struct Scsi_Host *shost = class_to_shost(dev);
459
460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 return -EACCES;
462 if (kstrtoint(buf, 10, &status))
463 return -EINVAL;
464 h = shost_to_hba(shost);
465 h->acciopath_status = !!status;
466 dev_warn(&h->pdev->dev,
467 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
468 h->acciopath_status ? "enabled" : "disabled");
469 return count;
470}
471
472static ssize_t host_store_raid_offload_debug(struct device *dev,
473 struct device_attribute *attr,
474 const char *buf, size_t count)
475{
476 int debug_level;
477 struct ctlr_info *h;
478 struct Scsi_Host *shost = class_to_shost(dev);
479
480 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
481 return -EACCES;
482 if (kstrtoint(buf, 10, &debug_level))
483 return -EINVAL;
484 if (debug_level < 0)
485 debug_level = 0;
486 h = shost_to_hba(shost);
487 h->raid_offload_debug = debug_level;
488 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
489 h->raid_offload_debug);
490 return count;
491}
492
493static ssize_t host_store_rescan(struct device *dev,
494 struct device_attribute *attr,
495 const char *buf, size_t count)
496{
497 struct ctlr_info *h;
498 struct Scsi_Host *shost = class_to_shost(dev);
499 h = shost_to_hba(shost);
500 hpsa_scan_start(h->scsi_host);
501 return count;
502}
503
504static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
505{
506 device->offload_enabled = 0;
507 device->offload_to_be_enabled = 0;
508}
509
510static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
512{
513 struct ctlr_info *h;
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
516
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
519 return 0;
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523}
524
525static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
527{
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
530
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
533}
534
535static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
537{
538 struct ctlr_info *h;
539 struct Scsi_Host *shost = class_to_shost(dev);
540
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
545}
546
547static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
549{
550 struct ctlr_info *h;
551 struct Scsi_Host *shost = class_to_shost(dev);
552
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
556}
557
558/* List of controllers which cannot be hard reset on kexec with reset_devices */
559static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
581};
582
583/* List of controllers which cannot even be soft reset */
584static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
598 */
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
601};
602
603static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604{
605 int i;
606
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
609 return 1;
610 return 0;
611}
612
613static int ctlr_is_hard_resettable(u32 board_id)
614{
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
617}
618
619static int ctlr_is_soft_resettable(u32 board_id)
620{
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
623}
624
625static int ctlr_is_resettable(u32 board_id)
626{
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
629}
630
631static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
633{
634 struct ctlr_info *h;
635 struct Scsi_Host *shost = class_to_shost(dev);
636
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639}
640
641static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642{
643 return (scsi3addr[3] & 0xC0) == 0x40;
644}
645
646static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648};
649#define HPSA_RAID_0 0
650#define HPSA_RAID_4 1
651#define HPSA_RAID_1 2 /* also used for RAID 10 */
652#define HPSA_RAID_5 3 /* also used for RAID 50 */
653#define HPSA_RAID_51 4
654#define HPSA_RAID_6 5 /* also used for RAID 60 */
655#define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657#define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
659static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660{
661 return !device->physical_device;
662}
663
664static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666{
667 ssize_t l = 0;
668 unsigned char rlevel;
669 struct ctlr_info *h;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
672 unsigned long flags;
673
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
678 if (!hdev) {
679 spin_unlock_irqrestore(&h->lock, flags);
680 return -ENODEV;
681 }
682
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687 return l;
688 }
689
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695 return l;
696}
697
698static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
700{
701 struct ctlr_info *h;
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
704 unsigned long flags;
705 unsigned char lunid[8];
706
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
711 if (!hdev) {
712 spin_unlock_irqrestore(&h->lock, flags);
713 return -ENODEV;
714 }
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
718}
719
720static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
722{
723 struct ctlr_info *h;
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
726 unsigned long flags;
727 unsigned char sn[16];
728
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
733 if (!hdev) {
734 spin_unlock_irqrestore(&h->lock, flags);
735 return -ENODEV;
736 }
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
746}
747
748static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
750{
751 struct ctlr_info *h;
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
754 unsigned long flags;
755 u64 sas_address;
756
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
763 return -ENODEV;
764 }
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
767
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769}
770
771static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
773{
774 struct ctlr_info *h;
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
777 unsigned long flags;
778 int offload_enabled;
779
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
784 if (!hdev) {
785 spin_unlock_irqrestore(&h->lock, flags);
786 return -ENODEV;
787 }
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
790
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
793 else
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
796}
797
798#define MAX_PATHS 8
799static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
801{
802 struct ctlr_info *h;
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
805 unsigned long flags;
806 int i;
807 int output_len = 0;
808 u8 box;
809 u8 bay;
810 u8 path_map_index = 0;
811 char *active;
812 unsigned char phys_connector[2];
813
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
818 if (!hdev) {
819 spin_unlock_irqrestore(&h->devlock, flags);
820 return -ENODEV;
821 }
822
823 bay = hdev->bay;
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
827 active = "Active";
828 else if (hdev->path_map & path_map_index)
829 active = "Inactive";
830 else
831 continue;
832
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
839
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "%s\n", active);
844 continue;
845 }
846
847 box = hdev->box[i];
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
856 "PORT: %.2s ",
857 phys_connector);
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "BAY: %hhu %s\n",
864 bay, active);
865 } else {
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
869 box, bay, active);
870 }
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 box, active);
875 } else
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
878 }
879
880 spin_unlock_irqrestore(&h->devlock, flags);
881 return output_len;
882}
883
884static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
886{
887 struct ctlr_info *h;
888 struct Scsi_Host *shost = class_to_shost(dev);
889
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
892}
893
894static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
896{
897 struct ctlr_info *h;
898 struct Scsi_Host *shost = class_to_shost(dev);
899
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902}
903
904static DEVICE_ATTR_RO(raid_level);
905static DEVICE_ATTR_RO(lunid);
906static DEVICE_ATTR_RO(unique_id);
907static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908static DEVICE_ATTR_RO(sas_address);
909static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911static DEVICE_ATTR_RO(path_info);
912static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
931
932static struct attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level.attr,
934 &dev_attr_lunid.attr,
935 &dev_attr_unique_id.attr,
936 &dev_attr_hp_ssd_smart_path_enabled.attr,
937 &dev_attr_path_info.attr,
938 &dev_attr_sas_address.attr,
939 NULL,
940};
941
942ATTRIBUTE_GROUPS(hpsa_sdev);
943
944static struct attribute *hpsa_shost_attrs[] = {
945 &dev_attr_rescan.attr,
946 &dev_attr_firmware_revision.attr,
947 &dev_attr_commands_outstanding.attr,
948 &dev_attr_transport_mode.attr,
949 &dev_attr_resettable.attr,
950 &dev_attr_hp_ssd_smart_path_status.attr,
951 &dev_attr_raid_offload_debug.attr,
952 &dev_attr_lockup_detected.attr,
953 &dev_attr_ctlr_num.attr,
954 &dev_attr_legacy_board.attr,
955 NULL,
956};
957
958ATTRIBUTE_GROUPS(hpsa_shost);
959
960#define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
961 HPSA_MAX_CONCURRENT_PASSTHRUS)
962
963static const struct scsi_host_template hpsa_driver_template = {
964 .module = THIS_MODULE,
965 .name = HPSA,
966 .proc_name = HPSA,
967 .queuecommand = hpsa_scsi_queue_command,
968 .scan_start = hpsa_scan_start,
969 .scan_finished = hpsa_scan_finished,
970 .change_queue_depth = hpsa_change_queue_depth,
971 .this_id = -1,
972 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
973 .ioctl = hpsa_ioctl,
974 .sdev_init = hpsa_sdev_init,
975 .sdev_configure = hpsa_sdev_configure,
976 .sdev_destroy = hpsa_sdev_destroy,
977#ifdef CONFIG_COMPAT
978 .compat_ioctl = hpsa_compat_ioctl,
979#endif
980 .sdev_groups = hpsa_sdev_groups,
981 .shost_groups = hpsa_shost_groups,
982 .max_sectors = 2048,
983 .no_write_same = 1,
984};
985
986static inline u32 next_command(struct ctlr_info *h, u8 q)
987{
988 u32 a;
989 struct reply_queue_buffer *rq = &h->reply_queue[q];
990
991 if (h->transMethod & CFGTBL_Trans_io_accel1)
992 return h->access.command_completed(h, q);
993
994 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
995 return h->access.command_completed(h, q);
996
997 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
998 a = rq->head[rq->current_entry];
999 rq->current_entry++;
1000 atomic_dec(&h->commands_outstanding);
1001 } else {
1002 a = FIFO_EMPTY;
1003 }
1004 /* Check for wraparound */
1005 if (rq->current_entry == h->max_commands) {
1006 rq->current_entry = 0;
1007 rq->wraparound ^= 1;
1008 }
1009 return a;
1010}
1011
1012/*
1013 * There are some special bits in the bus address of the
1014 * command that we have to set for the controller to know
1015 * how to process the command:
1016 *
1017 * Normal performant mode:
1018 * bit 0: 1 means performant mode, 0 means simple mode.
1019 * bits 1-3 = block fetch table entry
1020 * bits 4-6 = command type (== 0)
1021 *
1022 * ioaccel1 mode:
1023 * bit 0 = "performant mode" bit.
1024 * bits 1-3 = block fetch table entry
1025 * bits 4-6 = command type (== 110)
1026 * (command type is needed because ioaccel1 mode
1027 * commands are submitted through the same register as normal
1028 * mode commands, so this is how the controller knows whether
1029 * the command is normal mode or ioaccel1 mode.)
1030 *
1031 * ioaccel2 mode:
1032 * bit 0 = "performant mode" bit.
1033 * bits 1-4 = block fetch table entry (note extra bit)
1034 * bits 4-6 = not needed, because ioaccel2 mode has
1035 * a separate special register for submitting commands.
1036 */
1037
1038/*
1039 * set_performant_mode: Modify the tag for cciss performant
1040 * set bit 0 for pull model, bits 3-1 for block fetch
1041 * register number
1042 */
1043#define DEFAULT_REPLY_QUEUE (-1)
1044static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1045 int reply_queue)
1046{
1047 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1048 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1049 if (unlikely(!h->msix_vectors))
1050 return;
1051 c->Header.ReplyQueue = reply_queue;
1052 }
1053}
1054
1055static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1056 struct CommandList *c,
1057 int reply_queue)
1058{
1059 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1060
1061 /*
1062 * Tell the controller to post the reply to the queue for this
1063 * processor. This seems to give the best I/O throughput.
1064 */
1065 cp->ReplyQueue = reply_queue;
1066 /*
1067 * Set the bits in the address sent down to include:
1068 * - performant mode bit (bit 0)
1069 * - pull count (bits 1-3)
1070 * - command type (bits 4-6)
1071 */
1072 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1073 IOACCEL1_BUSADDR_CMDTYPE;
1074}
1075
1076static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1077 struct CommandList *c,
1078 int reply_queue)
1079{
1080 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1081 &h->ioaccel2_cmd_pool[c->cmdindex];
1082
1083 /* Tell the controller to post the reply to the queue for this
1084 * processor. This seems to give the best I/O throughput.
1085 */
1086 cp->reply_queue = reply_queue;
1087 /* Set the bits in the address sent down to include:
1088 * - performant mode bit not used in ioaccel mode 2
1089 * - pull count (bits 0-3)
1090 * - command type isn't needed for ioaccel2
1091 */
1092 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1093}
1094
1095static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1096 struct CommandList *c,
1097 int reply_queue)
1098{
1099 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1100
1101 /*
1102 * Tell the controller to post the reply to the queue for this
1103 * processor. This seems to give the best I/O throughput.
1104 */
1105 cp->reply_queue = reply_queue;
1106 /*
1107 * Set the bits in the address sent down to include:
1108 * - performant mode bit not used in ioaccel mode 2
1109 * - pull count (bits 0-3)
1110 * - command type isn't needed for ioaccel2
1111 */
1112 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1113}
1114
1115static int is_firmware_flash_cmd(u8 *cdb)
1116{
1117 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1118}
1119
1120/*
1121 * During firmware flash, the heartbeat register may not update as frequently
1122 * as it should. So we dial down lockup detection during firmware flash. and
1123 * dial it back up when firmware flash completes.
1124 */
1125#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1126#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1127#define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1128static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1129 struct CommandList *c)
1130{
1131 if (!is_firmware_flash_cmd(c->Request.CDB))
1132 return;
1133 atomic_inc(&h->firmware_flash_in_progress);
1134 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1135}
1136
1137static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1138 struct CommandList *c)
1139{
1140 if (is_firmware_flash_cmd(c->Request.CDB) &&
1141 atomic_dec_and_test(&h->firmware_flash_in_progress))
1142 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1143}
1144
1145static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1146 struct CommandList *c, int reply_queue)
1147{
1148 dial_down_lockup_detection_during_fw_flash(h, c);
1149 atomic_inc(&h->commands_outstanding);
1150 /*
1151 * Check to see if the command is being retried.
1152 */
1153 if (c->device && !c->retry_pending)
1154 atomic_inc(&c->device->commands_outstanding);
1155
1156 reply_queue = h->reply_map[raw_smp_processor_id()];
1157 switch (c->cmd_type) {
1158 case CMD_IOACCEL1:
1159 set_ioaccel1_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1161 break;
1162 case CMD_IOACCEL2:
1163 set_ioaccel2_performant_mode(h, c, reply_queue);
1164 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1165 break;
1166 case IOACCEL2_TMF:
1167 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1168 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1169 break;
1170 default:
1171 set_performant_mode(h, c, reply_queue);
1172 h->access.submit_command(h, c);
1173 }
1174}
1175
1176static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1177{
1178 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1179}
1180
1181static inline int is_hba_lunid(unsigned char scsi3addr[])
1182{
1183 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1184}
1185
1186static inline int is_scsi_rev_5(struct ctlr_info *h)
1187{
1188 if (!h->hba_inquiry_data)
1189 return 0;
1190 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1191 return 1;
1192 return 0;
1193}
1194
1195static int hpsa_find_target_lun(struct ctlr_info *h,
1196 unsigned char scsi3addr[], int bus, int *target, int *lun)
1197{
1198 /* finds an unused bus, target, lun for a new physical device
1199 * assumes h->devlock is held
1200 */
1201 int i, found = 0;
1202 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1203
1204 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1205
1206 for (i = 0; i < h->ndevices; i++) {
1207 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1208 __set_bit(h->dev[i]->target, lun_taken);
1209 }
1210
1211 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1212 if (i < HPSA_MAX_DEVICES) {
1213 /* *bus = 1; */
1214 *target = i;
1215 *lun = 0;
1216 found = 1;
1217 }
1218 return !found;
1219}
1220
1221static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1222 struct hpsa_scsi_dev_t *dev, char *description)
1223{
1224#define LABEL_SIZE 25
1225 char label[LABEL_SIZE];
1226
1227 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1228 return;
1229
1230 switch (dev->devtype) {
1231 case TYPE_RAID:
1232 snprintf(label, LABEL_SIZE, "controller");
1233 break;
1234 case TYPE_ENCLOSURE:
1235 snprintf(label, LABEL_SIZE, "enclosure");
1236 break;
1237 case TYPE_DISK:
1238 case TYPE_ZBC:
1239 if (dev->external)
1240 snprintf(label, LABEL_SIZE, "external");
1241 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1242 snprintf(label, LABEL_SIZE, "%s",
1243 raid_label[PHYSICAL_DRIVE]);
1244 else
1245 snprintf(label, LABEL_SIZE, "RAID-%s",
1246 dev->raid_level > RAID_UNKNOWN ? "?" :
1247 raid_label[dev->raid_level]);
1248 break;
1249 case TYPE_ROM:
1250 snprintf(label, LABEL_SIZE, "rom");
1251 break;
1252 case TYPE_TAPE:
1253 snprintf(label, LABEL_SIZE, "tape");
1254 break;
1255 case TYPE_MEDIUM_CHANGER:
1256 snprintf(label, LABEL_SIZE, "changer");
1257 break;
1258 default:
1259 snprintf(label, LABEL_SIZE, "UNKNOWN");
1260 break;
1261 }
1262
1263 dev_printk(level, &h->pdev->dev,
1264 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1265 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1266 description,
1267 scsi_device_type(dev->devtype),
1268 dev->vendor,
1269 dev->model,
1270 label,
1271 dev->offload_config ? '+' : '-',
1272 dev->offload_to_be_enabled ? '+' : '-',
1273 dev->expose_device);
1274}
1275
1276/* Add an entry into h->dev[] array. */
1277static int hpsa_scsi_add_entry(struct ctlr_info *h,
1278 struct hpsa_scsi_dev_t *device,
1279 struct hpsa_scsi_dev_t *added[], int *nadded)
1280{
1281 /* assumes h->devlock is held */
1282 int n = h->ndevices;
1283 int i;
1284 unsigned char addr1[8], addr2[8];
1285 struct hpsa_scsi_dev_t *sd;
1286
1287 if (n >= HPSA_MAX_DEVICES) {
1288 dev_err(&h->pdev->dev, "too many devices, some will be "
1289 "inaccessible.\n");
1290 return -1;
1291 }
1292
1293 /* physical devices do not have lun or target assigned until now. */
1294 if (device->lun != -1)
1295 /* Logical device, lun is already assigned. */
1296 goto lun_assigned;
1297
1298 /* If this device a non-zero lun of a multi-lun device
1299 * byte 4 of the 8-byte LUN addr will contain the logical
1300 * unit no, zero otherwise.
1301 */
1302 if (device->scsi3addr[4] == 0) {
1303 /* This is not a non-zero lun of a multi-lun device */
1304 if (hpsa_find_target_lun(h, device->scsi3addr,
1305 device->bus, &device->target, &device->lun) != 0)
1306 return -1;
1307 goto lun_assigned;
1308 }
1309
1310 /* This is a non-zero lun of a multi-lun device.
1311 * Search through our list and find the device which
1312 * has the same 8 byte LUN address, excepting byte 4 and 5.
1313 * Assign the same bus and target for this new LUN.
1314 * Use the logical unit number from the firmware.
1315 */
1316 memcpy(addr1, device->scsi3addr, 8);
1317 addr1[4] = 0;
1318 addr1[5] = 0;
1319 for (i = 0; i < n; i++) {
1320 sd = h->dev[i];
1321 memcpy(addr2, sd->scsi3addr, 8);
1322 addr2[4] = 0;
1323 addr2[5] = 0;
1324 /* differ only in byte 4 and 5? */
1325 if (memcmp(addr1, addr2, 8) == 0) {
1326 device->bus = sd->bus;
1327 device->target = sd->target;
1328 device->lun = device->scsi3addr[4];
1329 break;
1330 }
1331 }
1332 if (device->lun == -1) {
1333 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1334 " suspect firmware bug or unsupported hardware "
1335 "configuration.\n");
1336 return -1;
1337 }
1338
1339lun_assigned:
1340
1341 h->dev[n] = device;
1342 h->ndevices++;
1343 added[*nadded] = device;
1344 (*nadded)++;
1345 hpsa_show_dev_msg(KERN_INFO, h, device,
1346 device->expose_device ? "added" : "masked");
1347 return 0;
1348}
1349
1350/*
1351 * Called during a scan operation.
1352 *
1353 * Update an entry in h->dev[] array.
1354 */
1355static void hpsa_scsi_update_entry(struct ctlr_info *h,
1356 int entry, struct hpsa_scsi_dev_t *new_entry)
1357{
1358 /* assumes h->devlock is held */
1359 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1360
1361 /* Raid level changed. */
1362 h->dev[entry]->raid_level = new_entry->raid_level;
1363
1364 /*
1365 * ioacccel_handle may have changed for a dual domain disk
1366 */
1367 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1368
1369 /* Raid offload parameters changed. Careful about the ordering. */
1370 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1371 /*
1372 * if drive is newly offload_enabled, we want to copy the
1373 * raid map data first. If previously offload_enabled and
1374 * offload_config were set, raid map data had better be
1375 * the same as it was before. If raid map data has changed
1376 * then it had better be the case that
1377 * h->dev[entry]->offload_enabled is currently 0.
1378 */
1379 h->dev[entry]->raid_map = new_entry->raid_map;
1380 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1381 }
1382 if (new_entry->offload_to_be_enabled) {
1383 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1384 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1385 }
1386 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1387 h->dev[entry]->offload_config = new_entry->offload_config;
1388 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1389 h->dev[entry]->queue_depth = new_entry->queue_depth;
1390
1391 /*
1392 * We can turn off ioaccel offload now, but need to delay turning
1393 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1394 * can't do that until all the devices are updated.
1395 */
1396 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1397
1398 /*
1399 * turn ioaccel off immediately if told to do so.
1400 */
1401 if (!new_entry->offload_to_be_enabled)
1402 h->dev[entry]->offload_enabled = 0;
1403
1404 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1405}
1406
1407/* Replace an entry from h->dev[] array. */
1408static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1409 int entry, struct hpsa_scsi_dev_t *new_entry,
1410 struct hpsa_scsi_dev_t *added[], int *nadded,
1411 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1412{
1413 /* assumes h->devlock is held */
1414 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1415 removed[*nremoved] = h->dev[entry];
1416 (*nremoved)++;
1417
1418 /*
1419 * New physical devices won't have target/lun assigned yet
1420 * so we need to preserve the values in the slot we are replacing.
1421 */
1422 if (new_entry->target == -1) {
1423 new_entry->target = h->dev[entry]->target;
1424 new_entry->lun = h->dev[entry]->lun;
1425 }
1426
1427 h->dev[entry] = new_entry;
1428 added[*nadded] = new_entry;
1429 (*nadded)++;
1430
1431 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1432}
1433
1434/* Remove an entry from h->dev[] array. */
1435static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1436 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1437{
1438 /* assumes h->devlock is held */
1439 int i;
1440 struct hpsa_scsi_dev_t *sd;
1441
1442 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1443
1444 sd = h->dev[entry];
1445 removed[*nremoved] = h->dev[entry];
1446 (*nremoved)++;
1447
1448 for (i = entry; i < h->ndevices-1; i++)
1449 h->dev[i] = h->dev[i+1];
1450 h->ndevices--;
1451 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1452}
1453
1454#define SCSI3ADDR_EQ(a, b) ( \
1455 (a)[7] == (b)[7] && \
1456 (a)[6] == (b)[6] && \
1457 (a)[5] == (b)[5] && \
1458 (a)[4] == (b)[4] && \
1459 (a)[3] == (b)[3] && \
1460 (a)[2] == (b)[2] && \
1461 (a)[1] == (b)[1] && \
1462 (a)[0] == (b)[0])
1463
1464static void fixup_botched_add(struct ctlr_info *h,
1465 struct hpsa_scsi_dev_t *added)
1466{
1467 /* called when scsi_add_device fails in order to re-adjust
1468 * h->dev[] to match the mid layer's view.
1469 */
1470 unsigned long flags;
1471 int i, j;
1472
1473 spin_lock_irqsave(&h->lock, flags);
1474 for (i = 0; i < h->ndevices; i++) {
1475 if (h->dev[i] == added) {
1476 for (j = i; j < h->ndevices-1; j++)
1477 h->dev[j] = h->dev[j+1];
1478 h->ndevices--;
1479 break;
1480 }
1481 }
1482 spin_unlock_irqrestore(&h->lock, flags);
1483 kfree(added);
1484}
1485
1486static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1487 struct hpsa_scsi_dev_t *dev2)
1488{
1489 /* we compare everything except lun and target as these
1490 * are not yet assigned. Compare parts likely
1491 * to differ first
1492 */
1493 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1494 sizeof(dev1->scsi3addr)) != 0)
1495 return 0;
1496 if (memcmp(dev1->device_id, dev2->device_id,
1497 sizeof(dev1->device_id)) != 0)
1498 return 0;
1499 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1500 return 0;
1501 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1502 return 0;
1503 if (dev1->devtype != dev2->devtype)
1504 return 0;
1505 if (dev1->bus != dev2->bus)
1506 return 0;
1507 return 1;
1508}
1509
1510static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1511 struct hpsa_scsi_dev_t *dev2)
1512{
1513 /* Device attributes that can change, but don't mean
1514 * that the device is a different device, nor that the OS
1515 * needs to be told anything about the change.
1516 */
1517 if (dev1->raid_level != dev2->raid_level)
1518 return 1;
1519 if (dev1->offload_config != dev2->offload_config)
1520 return 1;
1521 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1522 return 1;
1523 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1524 if (dev1->queue_depth != dev2->queue_depth)
1525 return 1;
1526 /*
1527 * This can happen for dual domain devices. An active
1528 * path change causes the ioaccel handle to change
1529 *
1530 * for example note the handle differences between p0 and p1
1531 * Device WWN ,WWN hash,Handle
1532 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1533 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1534 */
1535 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1536 return 1;
1537 return 0;
1538}
1539
1540/* Find needle in haystack. If exact match found, return DEVICE_SAME,
1541 * and return needle location in *index. If scsi3addr matches, but not
1542 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1543 * location in *index.
1544 * In the case of a minor device attribute change, such as RAID level, just
1545 * return DEVICE_UPDATED, along with the updated device's location in index.
1546 * If needle not found, return DEVICE_NOT_FOUND.
1547 */
1548static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1549 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1550 int *index)
1551{
1552 int i;
1553#define DEVICE_NOT_FOUND 0
1554#define DEVICE_CHANGED 1
1555#define DEVICE_SAME 2
1556#define DEVICE_UPDATED 3
1557 if (needle == NULL)
1558 return DEVICE_NOT_FOUND;
1559
1560 for (i = 0; i < haystack_size; i++) {
1561 if (haystack[i] == NULL) /* previously removed. */
1562 continue;
1563 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1564 *index = i;
1565 if (device_is_the_same(needle, haystack[i])) {
1566 if (device_updated(needle, haystack[i]))
1567 return DEVICE_UPDATED;
1568 return DEVICE_SAME;
1569 } else {
1570 /* Keep offline devices offline */
1571 if (needle->volume_offline)
1572 return DEVICE_NOT_FOUND;
1573 return DEVICE_CHANGED;
1574 }
1575 }
1576 }
1577 *index = -1;
1578 return DEVICE_NOT_FOUND;
1579}
1580
1581static void hpsa_monitor_offline_device(struct ctlr_info *h,
1582 unsigned char scsi3addr[])
1583{
1584 struct offline_device_entry *device;
1585 unsigned long flags;
1586
1587 /* Check to see if device is already on the list */
1588 spin_lock_irqsave(&h->offline_device_lock, flags);
1589 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1590 if (memcmp(device->scsi3addr, scsi3addr,
1591 sizeof(device->scsi3addr)) == 0) {
1592 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1593 return;
1594 }
1595 }
1596 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1597
1598 /* Device is not on the list, add it. */
1599 device = kmalloc(sizeof(*device), GFP_KERNEL);
1600 if (!device)
1601 return;
1602
1603 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1604 spin_lock_irqsave(&h->offline_device_lock, flags);
1605 list_add_tail(&device->offline_list, &h->offline_device_list);
1606 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1607}
1608
1609/* Print a message explaining various offline volume states */
1610static void hpsa_show_volume_status(struct ctlr_info *h,
1611 struct hpsa_scsi_dev_t *sd)
1612{
1613 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1614 dev_info(&h->pdev->dev,
1615 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1616 h->scsi_host->host_no,
1617 sd->bus, sd->target, sd->lun);
1618 switch (sd->volume_offline) {
1619 case HPSA_LV_OK:
1620 break;
1621 case HPSA_LV_UNDERGOING_ERASE:
1622 dev_info(&h->pdev->dev,
1623 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1624 h->scsi_host->host_no,
1625 sd->bus, sd->target, sd->lun);
1626 break;
1627 case HPSA_LV_NOT_AVAILABLE:
1628 dev_info(&h->pdev->dev,
1629 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1630 h->scsi_host->host_no,
1631 sd->bus, sd->target, sd->lun);
1632 break;
1633 case HPSA_LV_UNDERGOING_RPI:
1634 dev_info(&h->pdev->dev,
1635 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1636 h->scsi_host->host_no,
1637 sd->bus, sd->target, sd->lun);
1638 break;
1639 case HPSA_LV_PENDING_RPI:
1640 dev_info(&h->pdev->dev,
1641 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1642 h->scsi_host->host_no,
1643 sd->bus, sd->target, sd->lun);
1644 break;
1645 case HPSA_LV_ENCRYPTED_NO_KEY:
1646 dev_info(&h->pdev->dev,
1647 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1648 h->scsi_host->host_no,
1649 sd->bus, sd->target, sd->lun);
1650 break;
1651 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1652 dev_info(&h->pdev->dev,
1653 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1654 h->scsi_host->host_no,
1655 sd->bus, sd->target, sd->lun);
1656 break;
1657 case HPSA_LV_UNDERGOING_ENCRYPTION:
1658 dev_info(&h->pdev->dev,
1659 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1660 h->scsi_host->host_no,
1661 sd->bus, sd->target, sd->lun);
1662 break;
1663 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1664 dev_info(&h->pdev->dev,
1665 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1666 h->scsi_host->host_no,
1667 sd->bus, sd->target, sd->lun);
1668 break;
1669 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1670 dev_info(&h->pdev->dev,
1671 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1672 h->scsi_host->host_no,
1673 sd->bus, sd->target, sd->lun);
1674 break;
1675 case HPSA_LV_PENDING_ENCRYPTION:
1676 dev_info(&h->pdev->dev,
1677 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1678 h->scsi_host->host_no,
1679 sd->bus, sd->target, sd->lun);
1680 break;
1681 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1682 dev_info(&h->pdev->dev,
1683 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1684 h->scsi_host->host_no,
1685 sd->bus, sd->target, sd->lun);
1686 break;
1687 }
1688}
1689
1690/*
1691 * Figure the list of physical drive pointers for a logical drive with
1692 * raid offload configured.
1693 */
1694static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1695 struct hpsa_scsi_dev_t *dev[], int ndevices,
1696 struct hpsa_scsi_dev_t *logical_drive)
1697{
1698 struct raid_map_data *map = &logical_drive->raid_map;
1699 struct raid_map_disk_data *dd = &map->data[0];
1700 int i, j;
1701 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1702 le16_to_cpu(map->metadata_disks_per_row);
1703 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1704 le16_to_cpu(map->layout_map_count) *
1705 total_disks_per_row;
1706 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1707 total_disks_per_row;
1708 int qdepth;
1709
1710 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1711 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1712
1713 logical_drive->nphysical_disks = nraid_map_entries;
1714
1715 qdepth = 0;
1716 for (i = 0; i < nraid_map_entries; i++) {
1717 logical_drive->phys_disk[i] = NULL;
1718 if (!logical_drive->offload_config)
1719 continue;
1720 for (j = 0; j < ndevices; j++) {
1721 if (dev[j] == NULL)
1722 continue;
1723 if (dev[j]->devtype != TYPE_DISK &&
1724 dev[j]->devtype != TYPE_ZBC)
1725 continue;
1726 if (is_logical_device(dev[j]))
1727 continue;
1728 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1729 continue;
1730
1731 logical_drive->phys_disk[i] = dev[j];
1732 if (i < nphys_disk)
1733 qdepth = min(h->nr_cmds, qdepth +
1734 logical_drive->phys_disk[i]->queue_depth);
1735 break;
1736 }
1737
1738 /*
1739 * This can happen if a physical drive is removed and
1740 * the logical drive is degraded. In that case, the RAID
1741 * map data will refer to a physical disk which isn't actually
1742 * present. And in that case offload_enabled should already
1743 * be 0, but we'll turn it off here just in case
1744 */
1745 if (!logical_drive->phys_disk[i]) {
1746 dev_warn(&h->pdev->dev,
1747 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1748 __func__,
1749 h->scsi_host->host_no, logical_drive->bus,
1750 logical_drive->target, logical_drive->lun);
1751 hpsa_turn_off_ioaccel_for_device(logical_drive);
1752 logical_drive->queue_depth = 8;
1753 }
1754 }
1755 if (nraid_map_entries)
1756 /*
1757 * This is correct for reads, too high for full stripe writes,
1758 * way too high for partial stripe writes
1759 */
1760 logical_drive->queue_depth = qdepth;
1761 else {
1762 if (logical_drive->external)
1763 logical_drive->queue_depth = EXTERNAL_QD;
1764 else
1765 logical_drive->queue_depth = h->nr_cmds;
1766 }
1767}
1768
1769static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1770 struct hpsa_scsi_dev_t *dev[], int ndevices)
1771{
1772 int i;
1773
1774 for (i = 0; i < ndevices; i++) {
1775 if (dev[i] == NULL)
1776 continue;
1777 if (dev[i]->devtype != TYPE_DISK &&
1778 dev[i]->devtype != TYPE_ZBC)
1779 continue;
1780 if (!is_logical_device(dev[i]))
1781 continue;
1782
1783 /*
1784 * If offload is currently enabled, the RAID map and
1785 * phys_disk[] assignment *better* not be changing
1786 * because we would be changing ioaccel phsy_disk[] pointers
1787 * on a ioaccel volume processing I/O requests.
1788 *
1789 * If an ioaccel volume status changed, initially because it was
1790 * re-configured and thus underwent a transformation, or
1791 * a drive failed, we would have received a state change
1792 * request and ioaccel should have been turned off. When the
1793 * transformation completes, we get another state change
1794 * request to turn ioaccel back on. In this case, we need
1795 * to update the ioaccel information.
1796 *
1797 * Thus: If it is not currently enabled, but will be after
1798 * the scan completes, make sure the ioaccel pointers
1799 * are up to date.
1800 */
1801
1802 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1803 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1804 }
1805}
1806
1807static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1808{
1809 int rc = 0;
1810
1811 if (!h->scsi_host)
1812 return 1;
1813
1814 if (is_logical_device(device)) /* RAID */
1815 rc = scsi_add_device(h->scsi_host, device->bus,
1816 device->target, device->lun);
1817 else /* HBA */
1818 rc = hpsa_add_sas_device(h->sas_host, device);
1819
1820 return rc;
1821}
1822
1823static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1824 struct hpsa_scsi_dev_t *dev)
1825{
1826 int i;
1827 int count = 0;
1828
1829 for (i = 0; i < h->nr_cmds; i++) {
1830 struct CommandList *c = h->cmd_pool + i;
1831 int refcount = atomic_inc_return(&c->refcount);
1832
1833 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1834 dev->scsi3addr)) {
1835 unsigned long flags;
1836
1837 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1838 if (!hpsa_is_cmd_idle(c))
1839 ++count;
1840 spin_unlock_irqrestore(&h->lock, flags);
1841 }
1842
1843 cmd_free(h, c);
1844 }
1845
1846 return count;
1847}
1848
1849#define NUM_WAIT 20
1850static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1851 struct hpsa_scsi_dev_t *device)
1852{
1853 int cmds = 0;
1854 int waits = 0;
1855 int num_wait = NUM_WAIT;
1856
1857 if (device->external)
1858 num_wait = HPSA_EH_PTRAID_TIMEOUT;
1859
1860 while (1) {
1861 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1862 if (cmds == 0)
1863 break;
1864 if (++waits > num_wait)
1865 break;
1866 msleep(1000);
1867 }
1868
1869 if (waits > num_wait) {
1870 dev_warn(&h->pdev->dev,
1871 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1872 __func__,
1873 h->scsi_host->host_no,
1874 device->bus, device->target, device->lun, cmds);
1875 }
1876}
1877
1878static void hpsa_remove_device(struct ctlr_info *h,
1879 struct hpsa_scsi_dev_t *device)
1880{
1881 struct scsi_device *sdev = NULL;
1882
1883 if (!h->scsi_host)
1884 return;
1885
1886 /*
1887 * Allow for commands to drain
1888 */
1889 device->removed = 1;
1890 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1891
1892 if (is_logical_device(device)) { /* RAID */
1893 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1894 device->target, device->lun);
1895 if (sdev) {
1896 scsi_remove_device(sdev);
1897 scsi_device_put(sdev);
1898 } else {
1899 /*
1900 * We don't expect to get here. Future commands
1901 * to this device will get a selection timeout as
1902 * if the device were gone.
1903 */
1904 hpsa_show_dev_msg(KERN_WARNING, h, device,
1905 "didn't find device for removal.");
1906 }
1907 } else { /* HBA */
1908
1909 hpsa_remove_sas_device(device);
1910 }
1911}
1912
1913static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1914 struct hpsa_scsi_dev_t *sd[], int nsds)
1915{
1916 /* sd contains scsi3 addresses and devtypes, and inquiry
1917 * data. This function takes what's in sd to be the current
1918 * reality and updates h->dev[] to reflect that reality.
1919 */
1920 int i, entry, device_change, changes = 0;
1921 struct hpsa_scsi_dev_t *csd;
1922 unsigned long flags;
1923 struct hpsa_scsi_dev_t **added, **removed;
1924 int nadded, nremoved;
1925
1926 /*
1927 * A reset can cause a device status to change
1928 * re-schedule the scan to see what happened.
1929 */
1930 spin_lock_irqsave(&h->reset_lock, flags);
1931 if (h->reset_in_progress) {
1932 h->drv_req_rescan = 1;
1933 spin_unlock_irqrestore(&h->reset_lock, flags);
1934 return;
1935 }
1936 spin_unlock_irqrestore(&h->reset_lock, flags);
1937
1938 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1939 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1940
1941 if (!added || !removed) {
1942 dev_warn(&h->pdev->dev, "out of memory in "
1943 "adjust_hpsa_scsi_table\n");
1944 goto free_and_out;
1945 }
1946
1947 spin_lock_irqsave(&h->devlock, flags);
1948
1949 /* find any devices in h->dev[] that are not in
1950 * sd[] and remove them from h->dev[], and for any
1951 * devices which have changed, remove the old device
1952 * info and add the new device info.
1953 * If minor device attributes change, just update
1954 * the existing device structure.
1955 */
1956 i = 0;
1957 nremoved = 0;
1958 nadded = 0;
1959 while (i < h->ndevices) {
1960 csd = h->dev[i];
1961 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1962 if (device_change == DEVICE_NOT_FOUND) {
1963 changes++;
1964 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1965 continue; /* remove ^^^, hence i not incremented */
1966 } else if (device_change == DEVICE_CHANGED) {
1967 changes++;
1968 hpsa_scsi_replace_entry(h, i, sd[entry],
1969 added, &nadded, removed, &nremoved);
1970 /* Set it to NULL to prevent it from being freed
1971 * at the bottom of hpsa_update_scsi_devices()
1972 */
1973 sd[entry] = NULL;
1974 } else if (device_change == DEVICE_UPDATED) {
1975 hpsa_scsi_update_entry(h, i, sd[entry]);
1976 }
1977 i++;
1978 }
1979
1980 /* Now, make sure every device listed in sd[] is also
1981 * listed in h->dev[], adding them if they aren't found
1982 */
1983
1984 for (i = 0; i < nsds; i++) {
1985 if (!sd[i]) /* if already added above. */
1986 continue;
1987
1988 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1989 * as the SCSI mid-layer does not handle such devices well.
1990 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1991 * at 160Hz, and prevents the system from coming up.
1992 */
1993 if (sd[i]->volume_offline) {
1994 hpsa_show_volume_status(h, sd[i]);
1995 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1996 continue;
1997 }
1998
1999 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2000 h->ndevices, &entry);
2001 if (device_change == DEVICE_NOT_FOUND) {
2002 changes++;
2003 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2004 break;
2005 sd[i] = NULL; /* prevent from being freed later. */
2006 } else if (device_change == DEVICE_CHANGED) {
2007 /* should never happen... */
2008 changes++;
2009 dev_warn(&h->pdev->dev,
2010 "device unexpectedly changed.\n");
2011 /* but if it does happen, we just ignore that device */
2012 }
2013 }
2014 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2015
2016 /*
2017 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2018 * any logical drives that need it enabled.
2019 *
2020 * The raid map should be current by now.
2021 *
2022 * We are updating the device list used for I/O requests.
2023 */
2024 for (i = 0; i < h->ndevices; i++) {
2025 if (h->dev[i] == NULL)
2026 continue;
2027 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2028 }
2029
2030 spin_unlock_irqrestore(&h->devlock, flags);
2031
2032 /* Monitor devices which are in one of several NOT READY states to be
2033 * brought online later. This must be done without holding h->devlock,
2034 * so don't touch h->dev[]
2035 */
2036 for (i = 0; i < nsds; i++) {
2037 if (!sd[i]) /* if already added above. */
2038 continue;
2039 if (sd[i]->volume_offline)
2040 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2041 }
2042
2043 /* Don't notify scsi mid layer of any changes the first time through
2044 * (or if there are no changes) scsi_scan_host will do it later the
2045 * first time through.
2046 */
2047 if (!changes)
2048 goto free_and_out;
2049
2050 /* Notify scsi mid layer of any removed devices */
2051 for (i = 0; i < nremoved; i++) {
2052 if (removed[i] == NULL)
2053 continue;
2054 if (removed[i]->expose_device)
2055 hpsa_remove_device(h, removed[i]);
2056 kfree(removed[i]);
2057 removed[i] = NULL;
2058 }
2059
2060 /* Notify scsi mid layer of any added devices */
2061 for (i = 0; i < nadded; i++) {
2062 int rc = 0;
2063
2064 if (added[i] == NULL)
2065 continue;
2066 if (!(added[i]->expose_device))
2067 continue;
2068 rc = hpsa_add_device(h, added[i]);
2069 if (!rc)
2070 continue;
2071 dev_warn(&h->pdev->dev,
2072 "addition failed %d, device not added.", rc);
2073 /* now we have to remove it from h->dev,
2074 * since it didn't get added to scsi mid layer
2075 */
2076 fixup_botched_add(h, added[i]);
2077 h->drv_req_rescan = 1;
2078 }
2079
2080free_and_out:
2081 kfree(added);
2082 kfree(removed);
2083}
2084
2085/*
2086 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2087 * Assume's h->devlock is held.
2088 */
2089static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2090 int bus, int target, int lun)
2091{
2092 int i;
2093 struct hpsa_scsi_dev_t *sd;
2094
2095 for (i = 0; i < h->ndevices; i++) {
2096 sd = h->dev[i];
2097 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2098 return sd;
2099 }
2100 return NULL;
2101}
2102
2103static int hpsa_sdev_init(struct scsi_device *sdev)
2104{
2105 struct hpsa_scsi_dev_t *sd = NULL;
2106 unsigned long flags;
2107 struct ctlr_info *h;
2108
2109 h = sdev_to_hba(sdev);
2110 spin_lock_irqsave(&h->devlock, flags);
2111 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2112 struct scsi_target *starget;
2113 struct sas_rphy *rphy;
2114
2115 starget = scsi_target(sdev);
2116 rphy = target_to_rphy(starget);
2117 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2118 if (sd) {
2119 sd->target = sdev_id(sdev);
2120 sd->lun = sdev->lun;
2121 }
2122 }
2123 if (!sd)
2124 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2125 sdev_id(sdev), sdev->lun);
2126
2127 if (sd && sd->expose_device) {
2128 atomic_set(&sd->ioaccel_cmds_out, 0);
2129 sdev->hostdata = sd;
2130 } else
2131 sdev->hostdata = NULL;
2132 spin_unlock_irqrestore(&h->devlock, flags);
2133 return 0;
2134}
2135
2136/* configure scsi device based on internal per-device structure */
2137#define CTLR_TIMEOUT (120 * HZ)
2138static int hpsa_sdev_configure(struct scsi_device *sdev,
2139 struct queue_limits *lim)
2140{
2141 struct hpsa_scsi_dev_t *sd;
2142 int queue_depth;
2143
2144 sd = sdev->hostdata;
2145 sdev->no_uld_attach = !sd || !sd->expose_device;
2146
2147 if (sd) {
2148 sd->was_removed = 0;
2149 queue_depth = sd->queue_depth != 0 ?
2150 sd->queue_depth : sdev->host->can_queue;
2151 if (sd->external) {
2152 queue_depth = EXTERNAL_QD;
2153 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2154 blk_queue_rq_timeout(sdev->request_queue,
2155 HPSA_EH_PTRAID_TIMEOUT);
2156 }
2157 if (is_hba_lunid(sd->scsi3addr)) {
2158 sdev->eh_timeout = CTLR_TIMEOUT;
2159 blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2160 }
2161 } else {
2162 queue_depth = sdev->host->can_queue;
2163 }
2164
2165 scsi_change_queue_depth(sdev, queue_depth);
2166
2167 return 0;
2168}
2169
2170static void hpsa_sdev_destroy(struct scsi_device *sdev)
2171{
2172 struct hpsa_scsi_dev_t *hdev = NULL;
2173
2174 hdev = sdev->hostdata;
2175
2176 if (hdev)
2177 hdev->was_removed = 1;
2178}
2179
2180static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2181{
2182 int i;
2183
2184 if (!h->ioaccel2_cmd_sg_list)
2185 return;
2186 for (i = 0; i < h->nr_cmds; i++) {
2187 kfree(h->ioaccel2_cmd_sg_list[i]);
2188 h->ioaccel2_cmd_sg_list[i] = NULL;
2189 }
2190 kfree(h->ioaccel2_cmd_sg_list);
2191 h->ioaccel2_cmd_sg_list = NULL;
2192}
2193
2194static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2195{
2196 int i;
2197
2198 if (h->chainsize <= 0)
2199 return 0;
2200
2201 h->ioaccel2_cmd_sg_list =
2202 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2203 GFP_KERNEL);
2204 if (!h->ioaccel2_cmd_sg_list)
2205 return -ENOMEM;
2206 for (i = 0; i < h->nr_cmds; i++) {
2207 h->ioaccel2_cmd_sg_list[i] =
2208 kmalloc_array(h->maxsgentries,
2209 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2210 GFP_KERNEL);
2211 if (!h->ioaccel2_cmd_sg_list[i])
2212 goto clean;
2213 }
2214 return 0;
2215
2216clean:
2217 hpsa_free_ioaccel2_sg_chain_blocks(h);
2218 return -ENOMEM;
2219}
2220
2221static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2222{
2223 int i;
2224
2225 if (!h->cmd_sg_list)
2226 return;
2227 for (i = 0; i < h->nr_cmds; i++) {
2228 kfree(h->cmd_sg_list[i]);
2229 h->cmd_sg_list[i] = NULL;
2230 }
2231 kfree(h->cmd_sg_list);
2232 h->cmd_sg_list = NULL;
2233}
2234
2235static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2236{
2237 int i;
2238
2239 if (h->chainsize <= 0)
2240 return 0;
2241
2242 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2243 GFP_KERNEL);
2244 if (!h->cmd_sg_list)
2245 return -ENOMEM;
2246
2247 for (i = 0; i < h->nr_cmds; i++) {
2248 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2249 sizeof(*h->cmd_sg_list[i]),
2250 GFP_KERNEL);
2251 if (!h->cmd_sg_list[i])
2252 goto clean;
2253
2254 }
2255 return 0;
2256
2257clean:
2258 hpsa_free_sg_chain_blocks(h);
2259 return -ENOMEM;
2260}
2261
2262static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2263 struct io_accel2_cmd *cp, struct CommandList *c)
2264{
2265 struct ioaccel2_sg_element *chain_block;
2266 u64 temp64;
2267 u32 chain_size;
2268
2269 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2270 chain_size = le32_to_cpu(cp->sg[0].length);
2271 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
2272 DMA_TO_DEVICE);
2273 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2274 /* prevent subsequent unmapping */
2275 cp->sg->address = 0;
2276 return -1;
2277 }
2278 cp->sg->address = cpu_to_le64(temp64);
2279 return 0;
2280}
2281
2282static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2283 struct io_accel2_cmd *cp)
2284{
2285 struct ioaccel2_sg_element *chain_sg;
2286 u64 temp64;
2287 u32 chain_size;
2288
2289 chain_sg = cp->sg;
2290 temp64 = le64_to_cpu(chain_sg->address);
2291 chain_size = le32_to_cpu(cp->sg[0].length);
2292 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2293}
2294
2295static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2296 struct CommandList *c)
2297{
2298 struct SGDescriptor *chain_sg, *chain_block;
2299 u64 temp64;
2300 u32 chain_len;
2301
2302 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2303 chain_block = h->cmd_sg_list[c->cmdindex];
2304 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2305 chain_len = sizeof(*chain_sg) *
2306 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2307 chain_sg->Len = cpu_to_le32(chain_len);
2308 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
2309 DMA_TO_DEVICE);
2310 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2311 /* prevent subsequent unmapping */
2312 chain_sg->Addr = cpu_to_le64(0);
2313 return -1;
2314 }
2315 chain_sg->Addr = cpu_to_le64(temp64);
2316 return 0;
2317}
2318
2319static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2320 struct CommandList *c)
2321{
2322 struct SGDescriptor *chain_sg;
2323
2324 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2325 return;
2326
2327 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2328 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
2329 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
2330}
2331
2332
2333/* Decode the various types of errors on ioaccel2 path.
2334 * Return 1 for any error that should generate a RAID path retry.
2335 * Return 0 for errors that don't require a RAID path retry.
2336 */
2337static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2338 struct CommandList *c,
2339 struct scsi_cmnd *cmd,
2340 struct io_accel2_cmd *c2,
2341 struct hpsa_scsi_dev_t *dev)
2342{
2343 int data_len;
2344 int retry = 0;
2345 u32 ioaccel2_resid = 0;
2346
2347 switch (c2->error_data.serv_response) {
2348 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2349 switch (c2->error_data.status) {
2350 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2351 if (cmd)
2352 cmd->result = 0;
2353 break;
2354 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2355 cmd->result |= SAM_STAT_CHECK_CONDITION;
2356 if (c2->error_data.data_present !=
2357 IOACCEL2_SENSE_DATA_PRESENT) {
2358 memset(cmd->sense_buffer, 0,
2359 SCSI_SENSE_BUFFERSIZE);
2360 break;
2361 }
2362 /* copy the sense data */
2363 data_len = c2->error_data.sense_data_len;
2364 if (data_len > SCSI_SENSE_BUFFERSIZE)
2365 data_len = SCSI_SENSE_BUFFERSIZE;
2366 if (data_len > sizeof(c2->error_data.sense_data_buff))
2367 data_len =
2368 sizeof(c2->error_data.sense_data_buff);
2369 memcpy(cmd->sense_buffer,
2370 c2->error_data.sense_data_buff, data_len);
2371 retry = 1;
2372 break;
2373 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2374 retry = 1;
2375 break;
2376 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2377 retry = 1;
2378 break;
2379 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2380 retry = 1;
2381 break;
2382 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2383 retry = 1;
2384 break;
2385 default:
2386 retry = 1;
2387 break;
2388 }
2389 break;
2390 case IOACCEL2_SERV_RESPONSE_FAILURE:
2391 switch (c2->error_data.status) {
2392 case IOACCEL2_STATUS_SR_IO_ERROR:
2393 case IOACCEL2_STATUS_SR_IO_ABORTED:
2394 case IOACCEL2_STATUS_SR_OVERRUN:
2395 retry = 1;
2396 break;
2397 case IOACCEL2_STATUS_SR_UNDERRUN:
2398 cmd->result = (DID_OK << 16); /* host byte */
2399 ioaccel2_resid = get_unaligned_le32(
2400 &c2->error_data.resid_cnt[0]);
2401 scsi_set_resid(cmd, ioaccel2_resid);
2402 break;
2403 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2404 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2405 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2406 /*
2407 * Did an HBA disk disappear? We will eventually
2408 * get a state change event from the controller but
2409 * in the meantime, we need to tell the OS that the
2410 * HBA disk is no longer there and stop I/O
2411 * from going down. This allows the potential re-insert
2412 * of the disk to get the same device node.
2413 */
2414 if (dev->physical_device && dev->expose_device) {
2415 cmd->result = DID_NO_CONNECT << 16;
2416 dev->removed = 1;
2417 h->drv_req_rescan = 1;
2418 dev_warn(&h->pdev->dev,
2419 "%s: device is gone!\n", __func__);
2420 } else
2421 /*
2422 * Retry by sending down the RAID path.
2423 * We will get an event from ctlr to
2424 * trigger rescan regardless.
2425 */
2426 retry = 1;
2427 break;
2428 default:
2429 retry = 1;
2430 }
2431 break;
2432 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2433 break;
2434 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2435 break;
2436 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2437 retry = 1;
2438 break;
2439 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2440 break;
2441 default:
2442 retry = 1;
2443 break;
2444 }
2445
2446 if (dev->in_reset)
2447 retry = 0;
2448
2449 return retry; /* retry on raid path? */
2450}
2451
2452static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2453 struct CommandList *c)
2454{
2455 struct hpsa_scsi_dev_t *dev = c->device;
2456
2457 /*
2458 * Reset c->scsi_cmd here so that the reset handler will know
2459 * this command has completed. Then, check to see if the handler is
2460 * waiting for this command, and, if so, wake it.
2461 */
2462 c->scsi_cmd = SCSI_CMD_IDLE;
2463 mb(); /* Declare command idle before checking for pending events. */
2464 if (dev) {
2465 atomic_dec(&dev->commands_outstanding);
2466 if (dev->in_reset &&
2467 atomic_read(&dev->commands_outstanding) <= 0)
2468 wake_up_all(&h->event_sync_wait_queue);
2469 }
2470}
2471
2472static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2473 struct CommandList *c)
2474{
2475 hpsa_cmd_resolve_events(h, c);
2476 cmd_tagged_free(h, c);
2477}
2478
2479static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2480 struct CommandList *c, struct scsi_cmnd *cmd)
2481{
2482 hpsa_cmd_resolve_and_free(h, c);
2483 if (cmd)
2484 scsi_done(cmd);
2485}
2486
2487static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2488{
2489 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2490 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2491}
2492
2493static void process_ioaccel2_completion(struct ctlr_info *h,
2494 struct CommandList *c, struct scsi_cmnd *cmd,
2495 struct hpsa_scsi_dev_t *dev)
2496{
2497 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2498
2499 /* check for good status */
2500 if (likely(c2->error_data.serv_response == 0 &&
2501 c2->error_data.status == 0)) {
2502 cmd->result = 0;
2503 return hpsa_cmd_free_and_done(h, c, cmd);
2504 }
2505
2506 /*
2507 * Any RAID offload error results in retry which will use
2508 * the normal I/O path so the controller can handle whatever is
2509 * wrong.
2510 */
2511 if (is_logical_device(dev) &&
2512 c2->error_data.serv_response ==
2513 IOACCEL2_SERV_RESPONSE_FAILURE) {
2514 if (c2->error_data.status ==
2515 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2516 hpsa_turn_off_ioaccel_for_device(dev);
2517 }
2518
2519 if (dev->in_reset) {
2520 cmd->result = DID_RESET << 16;
2521 return hpsa_cmd_free_and_done(h, c, cmd);
2522 }
2523
2524 return hpsa_retry_cmd(h, c);
2525 }
2526
2527 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2528 return hpsa_retry_cmd(h, c);
2529
2530 return hpsa_cmd_free_and_done(h, c, cmd);
2531}
2532
2533/* Returns 0 on success, < 0 otherwise. */
2534static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2535 struct CommandList *cp)
2536{
2537 u8 tmf_status = cp->err_info->ScsiStatus;
2538
2539 switch (tmf_status) {
2540 case CISS_TMF_COMPLETE:
2541 /*
2542 * CISS_TMF_COMPLETE never happens, instead,
2543 * ei->CommandStatus == 0 for this case.
2544 */
2545 case CISS_TMF_SUCCESS:
2546 return 0;
2547 case CISS_TMF_INVALID_FRAME:
2548 case CISS_TMF_NOT_SUPPORTED:
2549 case CISS_TMF_FAILED:
2550 case CISS_TMF_WRONG_LUN:
2551 case CISS_TMF_OVERLAPPED_TAG:
2552 break;
2553 default:
2554 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2555 tmf_status);
2556 break;
2557 }
2558 return -tmf_status;
2559}
2560
2561static void complete_scsi_command(struct CommandList *cp)
2562{
2563 struct scsi_cmnd *cmd;
2564 struct ctlr_info *h;
2565 struct ErrorInfo *ei;
2566 struct hpsa_scsi_dev_t *dev;
2567 struct io_accel2_cmd *c2;
2568
2569 u8 sense_key;
2570 u8 asc; /* additional sense code */
2571 u8 ascq; /* additional sense code qualifier */
2572 unsigned long sense_data_size;
2573
2574 ei = cp->err_info;
2575 cmd = cp->scsi_cmd;
2576 h = cp->h;
2577
2578 if (!cmd->device) {
2579 cmd->result = DID_NO_CONNECT << 16;
2580 return hpsa_cmd_free_and_done(h, cp, cmd);
2581 }
2582
2583 dev = cmd->device->hostdata;
2584 if (!dev) {
2585 cmd->result = DID_NO_CONNECT << 16;
2586 return hpsa_cmd_free_and_done(h, cp, cmd);
2587 }
2588 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2589
2590 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2591 if ((cp->cmd_type == CMD_SCSI) &&
2592 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2593 hpsa_unmap_sg_chain_block(h, cp);
2594
2595 if ((cp->cmd_type == CMD_IOACCEL2) &&
2596 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2597 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2598
2599 cmd->result = (DID_OK << 16); /* host byte */
2600
2601 /* SCSI command has already been cleaned up in SML */
2602 if (dev->was_removed) {
2603 hpsa_cmd_resolve_and_free(h, cp);
2604 return;
2605 }
2606
2607 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2608 if (dev->physical_device && dev->expose_device &&
2609 dev->removed) {
2610 cmd->result = DID_NO_CONNECT << 16;
2611 return hpsa_cmd_free_and_done(h, cp, cmd);
2612 }
2613 if (likely(cp->phys_disk != NULL))
2614 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2615 }
2616
2617 /*
2618 * We check for lockup status here as it may be set for
2619 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2620 * fail_all_oustanding_cmds()
2621 */
2622 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2623 /* DID_NO_CONNECT will prevent a retry */
2624 cmd->result = DID_NO_CONNECT << 16;
2625 return hpsa_cmd_free_and_done(h, cp, cmd);
2626 }
2627
2628 if (cp->cmd_type == CMD_IOACCEL2)
2629 return process_ioaccel2_completion(h, cp, cmd, dev);
2630
2631 scsi_set_resid(cmd, ei->ResidualCnt);
2632 if (ei->CommandStatus == 0)
2633 return hpsa_cmd_free_and_done(h, cp, cmd);
2634
2635 /* For I/O accelerator commands, copy over some fields to the normal
2636 * CISS header used below for error handling.
2637 */
2638 if (cp->cmd_type == CMD_IOACCEL1) {
2639 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2640 cp->Header.SGList = scsi_sg_count(cmd);
2641 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2642 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2643 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2644 cp->Header.tag = c->tag;
2645 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2646 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2647
2648 /* Any RAID offload error results in retry which will use
2649 * the normal I/O path so the controller can handle whatever's
2650 * wrong.
2651 */
2652 if (is_logical_device(dev)) {
2653 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2654 dev->offload_enabled = 0;
2655 return hpsa_retry_cmd(h, cp);
2656 }
2657 }
2658
2659 /* an error has occurred */
2660 switch (ei->CommandStatus) {
2661
2662 case CMD_TARGET_STATUS:
2663 cmd->result |= ei->ScsiStatus;
2664 /* copy the sense data */
2665 sense_data_size = min_t(unsigned long, SCSI_SENSE_BUFFERSIZE,
2666 sizeof(ei->SenseInfo));
2667 if (ei->SenseLen < sense_data_size)
2668 sense_data_size = ei->SenseLen;
2669 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2670 if (ei->ScsiStatus)
2671 decode_sense_data(ei->SenseInfo, sense_data_size,
2672 &sense_key, &asc, &ascq);
2673 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2674 switch (sense_key) {
2675 case ABORTED_COMMAND:
2676 cmd->result |= DID_SOFT_ERROR << 16;
2677 break;
2678 case UNIT_ATTENTION:
2679 if (asc == 0x3F && ascq == 0x0E)
2680 h->drv_req_rescan = 1;
2681 break;
2682 case ILLEGAL_REQUEST:
2683 if (asc == 0x25 && ascq == 0x00) {
2684 dev->removed = 1;
2685 cmd->result = DID_NO_CONNECT << 16;
2686 }
2687 break;
2688 }
2689 break;
2690 }
2691 /* Problem was not a check condition
2692 * Pass it up to the upper layers...
2693 */
2694 if (ei->ScsiStatus) {
2695 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2696 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2697 "Returning result: 0x%x\n",
2698 cp, ei->ScsiStatus,
2699 sense_key, asc, ascq,
2700 cmd->result);
2701 } else { /* scsi status is zero??? How??? */
2702 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2703 "Returning no connection.\n", cp),
2704
2705 /* Ordinarily, this case should never happen,
2706 * but there is a bug in some released firmware
2707 * revisions that allows it to happen if, for
2708 * example, a 4100 backplane loses power and
2709 * the tape drive is in it. We assume that
2710 * it's a fatal error of some kind because we
2711 * can't show that it wasn't. We will make it
2712 * look like selection timeout since that is
2713 * the most common reason for this to occur,
2714 * and it's severe enough.
2715 */
2716
2717 cmd->result = DID_NO_CONNECT << 16;
2718 }
2719 break;
2720
2721 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2722 break;
2723 case CMD_DATA_OVERRUN:
2724 dev_warn(&h->pdev->dev,
2725 "CDB %16phN data overrun\n", cp->Request.CDB);
2726 break;
2727 case CMD_INVALID: {
2728 /* print_bytes(cp, sizeof(*cp), 1, 0);
2729 print_cmd(cp); */
2730 /* We get CMD_INVALID if you address a non-existent device
2731 * instead of a selection timeout (no response). You will
2732 * see this if you yank out a drive, then try to access it.
2733 * This is kind of a shame because it means that any other
2734 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2735 * missing target. */
2736 cmd->result = DID_NO_CONNECT << 16;
2737 }
2738 break;
2739 case CMD_PROTOCOL_ERR:
2740 cmd->result = DID_ERROR << 16;
2741 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2742 cp->Request.CDB);
2743 break;
2744 case CMD_HARDWARE_ERR:
2745 cmd->result = DID_ERROR << 16;
2746 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2747 cp->Request.CDB);
2748 break;
2749 case CMD_CONNECTION_LOST:
2750 cmd->result = DID_ERROR << 16;
2751 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2752 cp->Request.CDB);
2753 break;
2754 case CMD_ABORTED:
2755 cmd->result = DID_ABORT << 16;
2756 break;
2757 case CMD_ABORT_FAILED:
2758 cmd->result = DID_ERROR << 16;
2759 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2760 cp->Request.CDB);
2761 break;
2762 case CMD_UNSOLICITED_ABORT:
2763 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2764 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2765 cp->Request.CDB);
2766 break;
2767 case CMD_TIMEOUT:
2768 cmd->result = DID_TIME_OUT << 16;
2769 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2770 cp->Request.CDB);
2771 break;
2772 case CMD_UNABORTABLE:
2773 cmd->result = DID_ERROR << 16;
2774 dev_warn(&h->pdev->dev, "Command unabortable\n");
2775 break;
2776 case CMD_TMF_STATUS:
2777 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2778 cmd->result = DID_ERROR << 16;
2779 break;
2780 case CMD_IOACCEL_DISABLED:
2781 /* This only handles the direct pass-through case since RAID
2782 * offload is handled above. Just attempt a retry.
2783 */
2784 cmd->result = DID_SOFT_ERROR << 16;
2785 dev_warn(&h->pdev->dev,
2786 "cp %p had HP SSD Smart Path error\n", cp);
2787 break;
2788 default:
2789 cmd->result = DID_ERROR << 16;
2790 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2791 cp, ei->CommandStatus);
2792 }
2793
2794 return hpsa_cmd_free_and_done(h, cp, cmd);
2795}
2796
2797static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
2798 int sg_used, enum dma_data_direction data_direction)
2799{
2800 int i;
2801
2802 for (i = 0; i < sg_used; i++)
2803 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
2804 le32_to_cpu(c->SG[i].Len),
2805 data_direction);
2806}
2807
2808static int hpsa_map_one(struct pci_dev *pdev,
2809 struct CommandList *cp,
2810 unsigned char *buf,
2811 size_t buflen,
2812 enum dma_data_direction data_direction)
2813{
2814 u64 addr64;
2815
2816 if (buflen == 0 || data_direction == DMA_NONE) {
2817 cp->Header.SGList = 0;
2818 cp->Header.SGTotal = cpu_to_le16(0);
2819 return 0;
2820 }
2821
2822 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2823 if (dma_mapping_error(&pdev->dev, addr64)) {
2824 /* Prevent subsequent unmap of something never mapped */
2825 cp->Header.SGList = 0;
2826 cp->Header.SGTotal = cpu_to_le16(0);
2827 return -1;
2828 }
2829 cp->SG[0].Addr = cpu_to_le64(addr64);
2830 cp->SG[0].Len = cpu_to_le32(buflen);
2831 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2832 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2833 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2834 return 0;
2835}
2836
2837#define NO_TIMEOUT ((unsigned long) -1)
2838#define DEFAULT_TIMEOUT 30000 /* milliseconds */
2839static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2840 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2841{
2842 DECLARE_COMPLETION_ONSTACK(wait);
2843
2844 c->waiting = &wait;
2845 __enqueue_cmd_and_start_io(h, c, reply_queue);
2846 if (timeout_msecs == NO_TIMEOUT) {
2847 /* TODO: get rid of this no-timeout thing */
2848 wait_for_completion_io(&wait);
2849 return IO_OK;
2850 }
2851 if (!wait_for_completion_io_timeout(&wait,
2852 msecs_to_jiffies(timeout_msecs))) {
2853 dev_warn(&h->pdev->dev, "Command timed out.\n");
2854 return -ETIMEDOUT;
2855 }
2856 return IO_OK;
2857}
2858
2859static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2860 int reply_queue, unsigned long timeout_msecs)
2861{
2862 if (unlikely(lockup_detected(h))) {
2863 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2864 return IO_OK;
2865 }
2866 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2867}
2868
2869static u32 lockup_detected(struct ctlr_info *h)
2870{
2871 int cpu;
2872 u32 rc, *lockup_detected;
2873
2874 cpu = get_cpu();
2875 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2876 rc = *lockup_detected;
2877 put_cpu();
2878 return rc;
2879}
2880
2881#define MAX_DRIVER_CMD_RETRIES 25
2882static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2883 struct CommandList *c, enum dma_data_direction data_direction,
2884 unsigned long timeout_msecs)
2885{
2886 int backoff_time = 10, retry_count = 0;
2887 int rc;
2888
2889 do {
2890 memset(c->err_info, 0, sizeof(*c->err_info));
2891 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2892 timeout_msecs);
2893 if (rc)
2894 break;
2895 retry_count++;
2896 if (retry_count > 3) {
2897 msleep(backoff_time);
2898 if (backoff_time < 1000)
2899 backoff_time *= 2;
2900 }
2901 } while ((check_for_unit_attention(h, c) ||
2902 check_for_busy(h, c)) &&
2903 retry_count <= MAX_DRIVER_CMD_RETRIES);
2904 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2905 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2906 rc = -EIO;
2907 return rc;
2908}
2909
2910static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2911 struct CommandList *c)
2912{
2913 const u8 *cdb = c->Request.CDB;
2914 const u8 *lun = c->Header.LUN.LunAddrBytes;
2915
2916 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2917 txt, lun, cdb);
2918}
2919
2920static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2921 struct CommandList *cp)
2922{
2923 const struct ErrorInfo *ei = cp->err_info;
2924 struct device *d = &cp->h->pdev->dev;
2925 u8 sense_key, asc, ascq;
2926 int sense_len;
2927
2928 switch (ei->CommandStatus) {
2929 case CMD_TARGET_STATUS:
2930 if (ei->SenseLen > sizeof(ei->SenseInfo))
2931 sense_len = sizeof(ei->SenseInfo);
2932 else
2933 sense_len = ei->SenseLen;
2934 decode_sense_data(ei->SenseInfo, sense_len,
2935 &sense_key, &asc, &ascq);
2936 hpsa_print_cmd(h, "SCSI status", cp);
2937 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2938 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2939 sense_key, asc, ascq);
2940 else
2941 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2942 if (ei->ScsiStatus == 0)
2943 dev_warn(d, "SCSI status is abnormally zero. "
2944 "(probably indicates selection timeout "
2945 "reported incorrectly due to a known "
2946 "firmware bug, circa July, 2001.)\n");
2947 break;
2948 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2949 break;
2950 case CMD_DATA_OVERRUN:
2951 hpsa_print_cmd(h, "overrun condition", cp);
2952 break;
2953 case CMD_INVALID: {
2954 /* controller unfortunately reports SCSI passthru's
2955 * to non-existent targets as invalid commands.
2956 */
2957 hpsa_print_cmd(h, "invalid command", cp);
2958 dev_warn(d, "probably means device no longer present\n");
2959 }
2960 break;
2961 case CMD_PROTOCOL_ERR:
2962 hpsa_print_cmd(h, "protocol error", cp);
2963 break;
2964 case CMD_HARDWARE_ERR:
2965 hpsa_print_cmd(h, "hardware error", cp);
2966 break;
2967 case CMD_CONNECTION_LOST:
2968 hpsa_print_cmd(h, "connection lost", cp);
2969 break;
2970 case CMD_ABORTED:
2971 hpsa_print_cmd(h, "aborted", cp);
2972 break;
2973 case CMD_ABORT_FAILED:
2974 hpsa_print_cmd(h, "abort failed", cp);
2975 break;
2976 case CMD_UNSOLICITED_ABORT:
2977 hpsa_print_cmd(h, "unsolicited abort", cp);
2978 break;
2979 case CMD_TIMEOUT:
2980 hpsa_print_cmd(h, "timed out", cp);
2981 break;
2982 case CMD_UNABORTABLE:
2983 hpsa_print_cmd(h, "unabortable", cp);
2984 break;
2985 case CMD_CTLR_LOCKUP:
2986 hpsa_print_cmd(h, "controller lockup detected", cp);
2987 break;
2988 default:
2989 hpsa_print_cmd(h, "unknown status", cp);
2990 dev_warn(d, "Unknown command status %x\n",
2991 ei->CommandStatus);
2992 }
2993}
2994
2995static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2996 u8 page, u8 *buf, size_t bufsize)
2997{
2998 int rc = IO_OK;
2999 struct CommandList *c;
3000 struct ErrorInfo *ei;
3001
3002 c = cmd_alloc(h);
3003 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
3004 page, scsi3addr, TYPE_CMD)) {
3005 rc = -1;
3006 goto out;
3007 }
3008 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3009 NO_TIMEOUT);
3010 if (rc)
3011 goto out;
3012 ei = c->err_info;
3013 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3014 hpsa_scsi_interpret_error(h, c);
3015 rc = -1;
3016 }
3017out:
3018 cmd_free(h, c);
3019 return rc;
3020}
3021
3022static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
3023 u8 *scsi3addr)
3024{
3025 u8 *buf;
3026 u64 sa = 0;
3027 int rc = 0;
3028
3029 buf = kzalloc(1024, GFP_KERNEL);
3030 if (!buf)
3031 return 0;
3032
3033 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3034 buf, 1024);
3035
3036 if (rc)
3037 goto out;
3038
3039 sa = get_unaligned_be64(buf+12);
3040
3041out:
3042 kfree(buf);
3043 return sa;
3044}
3045
3046static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3047 u16 page, unsigned char *buf,
3048 unsigned char bufsize)
3049{
3050 int rc = IO_OK;
3051 struct CommandList *c;
3052 struct ErrorInfo *ei;
3053
3054 c = cmd_alloc(h);
3055
3056 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3057 page, scsi3addr, TYPE_CMD)) {
3058 rc = -1;
3059 goto out;
3060 }
3061 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3062 NO_TIMEOUT);
3063 if (rc)
3064 goto out;
3065 ei = c->err_info;
3066 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3067 hpsa_scsi_interpret_error(h, c);
3068 rc = -1;
3069 }
3070out:
3071 cmd_free(h, c);
3072 return rc;
3073}
3074
3075static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3076 u8 reset_type, int reply_queue)
3077{
3078 int rc = IO_OK;
3079 struct CommandList *c;
3080 struct ErrorInfo *ei;
3081
3082 c = cmd_alloc(h);
3083 c->device = dev;
3084
3085 /* fill_cmd can't fail here, no data buffer to map. */
3086 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
3087 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3088 if (rc) {
3089 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3090 goto out;
3091 }
3092 /* no unmap needed here because no data xfer. */
3093
3094 ei = c->err_info;
3095 if (ei->CommandStatus != 0) {
3096 hpsa_scsi_interpret_error(h, c);
3097 rc = -1;
3098 }
3099out:
3100 cmd_free(h, c);
3101 return rc;
3102}
3103
3104static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3105 struct hpsa_scsi_dev_t *dev,
3106 unsigned char *scsi3addr)
3107{
3108 int i;
3109 bool match = false;
3110 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3111 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3112
3113 if (hpsa_is_cmd_idle(c))
3114 return false;
3115
3116 switch (c->cmd_type) {
3117 case CMD_SCSI:
3118 case CMD_IOCTL_PEND:
3119 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3120 sizeof(c->Header.LUN.LunAddrBytes));
3121 break;
3122
3123 case CMD_IOACCEL1:
3124 case CMD_IOACCEL2:
3125 if (c->phys_disk == dev) {
3126 /* HBA mode match */
3127 match = true;
3128 } else {
3129 /* Possible RAID mode -- check each phys dev. */
3130 /* FIXME: Do we need to take out a lock here? If
3131 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3132 * instead. */
3133 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3134 /* FIXME: an alternate test might be
3135 *
3136 * match = dev->phys_disk[i]->ioaccel_handle
3137 * == c2->scsi_nexus; */
3138 match = dev->phys_disk[i] == c->phys_disk;
3139 }
3140 }
3141 break;
3142
3143 case IOACCEL2_TMF:
3144 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3145 match = dev->phys_disk[i]->ioaccel_handle ==
3146 le32_to_cpu(ac->it_nexus);
3147 }
3148 break;
3149
3150 case 0: /* The command is in the middle of being initialized. */
3151 match = false;
3152 break;
3153
3154 default:
3155 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3156 c->cmd_type);
3157 BUG();
3158 }
3159
3160 return match;
3161}
3162
3163static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3164 u8 reset_type, int reply_queue)
3165{
3166 int rc = 0;
3167
3168 /* We can really only handle one reset at a time */
3169 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3170 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3171 return -EINTR;
3172 }
3173
3174 rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3175 if (!rc) {
3176 /* incremented by sending the reset request */
3177 atomic_dec(&dev->commands_outstanding);
3178 wait_event(h->event_sync_wait_queue,
3179 atomic_read(&dev->commands_outstanding) <= 0 ||
3180 lockup_detected(h));
3181 }
3182
3183 if (unlikely(lockup_detected(h))) {
3184 dev_warn(&h->pdev->dev,
3185 "Controller lockup detected during reset wait\n");
3186 rc = -ENODEV;
3187 }
3188
3189 if (!rc)
3190 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3191
3192 mutex_unlock(&h->reset_mutex);
3193 return rc;
3194}
3195
3196static void hpsa_get_raid_level(struct ctlr_info *h,
3197 unsigned char *scsi3addr, unsigned char *raid_level)
3198{
3199 int rc;
3200 unsigned char *buf;
3201
3202 *raid_level = RAID_UNKNOWN;
3203 buf = kzalloc(64, GFP_KERNEL);
3204 if (!buf)
3205 return;
3206
3207 if (!hpsa_vpd_page_supported(h, scsi3addr,
3208 HPSA_VPD_LV_DEVICE_GEOMETRY))
3209 goto exit;
3210
3211 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3212 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3213
3214 if (rc == 0)
3215 *raid_level = buf[8];
3216 if (*raid_level > RAID_UNKNOWN)
3217 *raid_level = RAID_UNKNOWN;
3218exit:
3219 kfree(buf);
3220 return;
3221}
3222
3223#define HPSA_MAP_DEBUG
3224#ifdef HPSA_MAP_DEBUG
3225static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3226 struct raid_map_data *map_buff)
3227{
3228 struct raid_map_disk_data *dd = &map_buff->data[0];
3229 int map, row, col;
3230 u16 map_cnt, row_cnt, disks_per_row;
3231
3232 if (rc != 0)
3233 return;
3234
3235 /* Show details only if debugging has been activated. */
3236 if (h->raid_offload_debug < 2)
3237 return;
3238
3239 dev_info(&h->pdev->dev, "structure_size = %u\n",
3240 le32_to_cpu(map_buff->structure_size));
3241 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3242 le32_to_cpu(map_buff->volume_blk_size));
3243 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3244 le64_to_cpu(map_buff->volume_blk_cnt));
3245 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3246 map_buff->phys_blk_shift);
3247 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3248 map_buff->parity_rotation_shift);
3249 dev_info(&h->pdev->dev, "strip_size = %u\n",
3250 le16_to_cpu(map_buff->strip_size));
3251 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3252 le64_to_cpu(map_buff->disk_starting_blk));
3253 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3254 le64_to_cpu(map_buff->disk_blk_cnt));
3255 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3256 le16_to_cpu(map_buff->data_disks_per_row));
3257 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3258 le16_to_cpu(map_buff->metadata_disks_per_row));
3259 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3260 le16_to_cpu(map_buff->row_cnt));
3261 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3262 le16_to_cpu(map_buff->layout_map_count));
3263 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3264 le16_to_cpu(map_buff->flags));
3265 dev_info(&h->pdev->dev, "encryption = %s\n",
3266 le16_to_cpu(map_buff->flags) &
3267 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3268 dev_info(&h->pdev->dev, "dekindex = %u\n",
3269 le16_to_cpu(map_buff->dekindex));
3270 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3271 for (map = 0; map < map_cnt; map++) {
3272 dev_info(&h->pdev->dev, "Map%u:\n", map);
3273 row_cnt = le16_to_cpu(map_buff->row_cnt);
3274 for (row = 0; row < row_cnt; row++) {
3275 dev_info(&h->pdev->dev, " Row%u:\n", row);
3276 disks_per_row =
3277 le16_to_cpu(map_buff->data_disks_per_row);
3278 for (col = 0; col < disks_per_row; col++, dd++)
3279 dev_info(&h->pdev->dev,
3280 " D%02u: h=0x%04x xor=%u,%u\n",
3281 col, dd->ioaccel_handle,
3282 dd->xor_mult[0], dd->xor_mult[1]);
3283 disks_per_row =
3284 le16_to_cpu(map_buff->metadata_disks_per_row);
3285 for (col = 0; col < disks_per_row; col++, dd++)
3286 dev_info(&h->pdev->dev,
3287 " M%02u: h=0x%04x xor=%u,%u\n",
3288 col, dd->ioaccel_handle,
3289 dd->xor_mult[0], dd->xor_mult[1]);
3290 }
3291 }
3292}
3293#else
3294static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3295 __attribute__((unused)) int rc,
3296 __attribute__((unused)) struct raid_map_data *map_buff)
3297{
3298}
3299#endif
3300
3301static int hpsa_get_raid_map(struct ctlr_info *h,
3302 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3303{
3304 int rc = 0;
3305 struct CommandList *c;
3306 struct ErrorInfo *ei;
3307
3308 c = cmd_alloc(h);
3309
3310 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3311 sizeof(this_device->raid_map), 0,
3312 scsi3addr, TYPE_CMD)) {
3313 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3314 cmd_free(h, c);
3315 return -1;
3316 }
3317 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3318 NO_TIMEOUT);
3319 if (rc)
3320 goto out;
3321 ei = c->err_info;
3322 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3323 hpsa_scsi_interpret_error(h, c);
3324 rc = -1;
3325 goto out;
3326 }
3327 cmd_free(h, c);
3328
3329 /* @todo in the future, dynamically allocate RAID map memory */
3330 if (le32_to_cpu(this_device->raid_map.structure_size) >
3331 sizeof(this_device->raid_map)) {
3332 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3333 rc = -1;
3334 }
3335 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3336 return rc;
3337out:
3338 cmd_free(h, c);
3339 return rc;
3340}
3341
3342static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3343 unsigned char scsi3addr[], u16 bmic_device_index,
3344 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3345{
3346 int rc = IO_OK;
3347 struct CommandList *c;
3348 struct ErrorInfo *ei;
3349
3350 c = cmd_alloc(h);
3351
3352 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3353 0, RAID_CTLR_LUNID, TYPE_CMD);
3354 if (rc)
3355 goto out;
3356
3357 c->Request.CDB[2] = bmic_device_index & 0xff;
3358 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3359
3360 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3361 NO_TIMEOUT);
3362 if (rc)
3363 goto out;
3364 ei = c->err_info;
3365 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3366 hpsa_scsi_interpret_error(h, c);
3367 rc = -1;
3368 }
3369out:
3370 cmd_free(h, c);
3371 return rc;
3372}
3373
3374static int hpsa_bmic_id_controller(struct ctlr_info *h,
3375 struct bmic_identify_controller *buf, size_t bufsize)
3376{
3377 int rc = IO_OK;
3378 struct CommandList *c;
3379 struct ErrorInfo *ei;
3380
3381 c = cmd_alloc(h);
3382
3383 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3384 0, RAID_CTLR_LUNID, TYPE_CMD);
3385 if (rc)
3386 goto out;
3387
3388 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3389 NO_TIMEOUT);
3390 if (rc)
3391 goto out;
3392 ei = c->err_info;
3393 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3394 hpsa_scsi_interpret_error(h, c);
3395 rc = -1;
3396 }
3397out:
3398 cmd_free(h, c);
3399 return rc;
3400}
3401
3402static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3403 unsigned char scsi3addr[], u16 bmic_device_index,
3404 struct bmic_identify_physical_device *buf, size_t bufsize)
3405{
3406 int rc = IO_OK;
3407 struct CommandList *c;
3408 struct ErrorInfo *ei;
3409
3410 c = cmd_alloc(h);
3411 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3412 0, RAID_CTLR_LUNID, TYPE_CMD);
3413 if (rc)
3414 goto out;
3415
3416 c->Request.CDB[2] = bmic_device_index & 0xff;
3417 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3418
3419 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3420 NO_TIMEOUT);
3421 ei = c->err_info;
3422 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3423 hpsa_scsi_interpret_error(h, c);
3424 rc = -1;
3425 }
3426out:
3427 cmd_free(h, c);
3428
3429 return rc;
3430}
3431
3432/*
3433 * get enclosure information
3434 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3435 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3436 * Uses id_physical_device to determine the box_index.
3437 */
3438static void hpsa_get_enclosure_info(struct ctlr_info *h,
3439 unsigned char *scsi3addr,
3440 struct ReportExtendedLUNdata *rlep, int rle_index,
3441 struct hpsa_scsi_dev_t *encl_dev)
3442{
3443 int rc = -1;
3444 struct CommandList *c = NULL;
3445 struct ErrorInfo *ei = NULL;
3446 struct bmic_sense_storage_box_params *bssbp = NULL;
3447 struct bmic_identify_physical_device *id_phys = NULL;
3448 struct ext_report_lun_entry *rle;
3449 u16 bmic_device_index = 0;
3450
3451 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
3452 return;
3453
3454 rle = &rlep->LUN[rle_index];
3455
3456 encl_dev->eli =
3457 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3458
3459 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3460
3461 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3462 rc = IO_OK;
3463 goto out;
3464 }
3465
3466 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3467 rc = IO_OK;
3468 goto out;
3469 }
3470
3471 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3472 if (!bssbp)
3473 goto out;
3474
3475 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3476 if (!id_phys)
3477 goto out;
3478
3479 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3480 id_phys, sizeof(*id_phys));
3481 if (rc) {
3482 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3483 __func__, encl_dev->external, bmic_device_index);
3484 goto out;
3485 }
3486
3487 c = cmd_alloc(h);
3488
3489 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3490 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3491
3492 if (rc)
3493 goto out;
3494
3495 if (id_phys->phys_connector[1] == 'E')
3496 c->Request.CDB[5] = id_phys->box_index;
3497 else
3498 c->Request.CDB[5] = 0;
3499
3500 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3501 NO_TIMEOUT);
3502 if (rc)
3503 goto out;
3504
3505 ei = c->err_info;
3506 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3507 rc = -1;
3508 goto out;
3509 }
3510
3511 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3512 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3513 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3514
3515 rc = IO_OK;
3516out:
3517 kfree(bssbp);
3518 kfree(id_phys);
3519
3520 if (c)
3521 cmd_free(h, c);
3522
3523 if (rc != IO_OK)
3524 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3525 "Error, could not get enclosure information");
3526}
3527
3528static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3529 unsigned char *scsi3addr)
3530{
3531 struct ReportExtendedLUNdata *physdev;
3532 u32 nphysicals;
3533 u64 sa = 0;
3534 int i;
3535
3536 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3537 if (!physdev)
3538 return 0;
3539
3540 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3541 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3542 kfree(physdev);
3543 return 0;
3544 }
3545 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3546
3547 for (i = 0; i < nphysicals; i++)
3548 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3549 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3550 break;
3551 }
3552
3553 kfree(physdev);
3554
3555 return sa;
3556}
3557
3558static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3559 struct hpsa_scsi_dev_t *dev)
3560{
3561 int rc;
3562 u64 sa = 0;
3563
3564 if (is_hba_lunid(scsi3addr)) {
3565 struct bmic_sense_subsystem_info *ssi;
3566
3567 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3568 if (!ssi)
3569 return;
3570
3571 rc = hpsa_bmic_sense_subsystem_information(h,
3572 scsi3addr, 0, ssi, sizeof(*ssi));
3573 if (rc == 0) {
3574 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3575 h->sas_address = sa;
3576 }
3577
3578 kfree(ssi);
3579 } else
3580 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3581
3582 dev->sas_address = sa;
3583}
3584
3585static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3586 struct ReportExtendedLUNdata *physdev)
3587{
3588 u32 nphysicals;
3589 int i;
3590
3591 if (h->discovery_polling)
3592 return;
3593
3594 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3595
3596 for (i = 0; i < nphysicals; i++) {
3597 if (physdev->LUN[i].device_type ==
3598 BMIC_DEVICE_TYPE_CONTROLLER
3599 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3600 dev_info(&h->pdev->dev,
3601 "External controller present, activate discovery polling and disable rld caching\n");
3602 hpsa_disable_rld_caching(h);
3603 h->discovery_polling = 1;
3604 break;
3605 }
3606 }
3607}
3608
3609/* Get a device id from inquiry page 0x83 */
3610static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3611 unsigned char scsi3addr[], u8 page)
3612{
3613 int rc;
3614 int i;
3615 int pages;
3616 unsigned char *buf, bufsize;
3617
3618 buf = kzalloc(256, GFP_KERNEL);
3619 if (!buf)
3620 return false;
3621
3622 /* Get the size of the page list first */
3623 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3624 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3625 buf, HPSA_VPD_HEADER_SZ);
3626 if (rc != 0)
3627 goto exit_unsupported;
3628 pages = buf[3];
3629 bufsize = min(pages + HPSA_VPD_HEADER_SZ, 255);
3630
3631 /* Get the whole VPD page list */
3632 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3633 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3634 buf, bufsize);
3635 if (rc != 0)
3636 goto exit_unsupported;
3637
3638 pages = buf[3];
3639 for (i = 1; i <= pages; i++)
3640 if (buf[3 + i] == page)
3641 goto exit_supported;
3642exit_unsupported:
3643 kfree(buf);
3644 return false;
3645exit_supported:
3646 kfree(buf);
3647 return true;
3648}
3649
3650/*
3651 * Called during a scan operation.
3652 * Sets ioaccel status on the new device list, not the existing device list
3653 *
3654 * The device list used during I/O will be updated later in
3655 * adjust_hpsa_scsi_table.
3656 */
3657static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3658 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3659{
3660 int rc;
3661 unsigned char *buf;
3662 u8 ioaccel_status;
3663
3664 this_device->offload_config = 0;
3665 this_device->offload_enabled = 0;
3666 this_device->offload_to_be_enabled = 0;
3667
3668 buf = kzalloc(64, GFP_KERNEL);
3669 if (!buf)
3670 return;
3671 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3672 goto out;
3673 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3674 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3675 if (rc != 0)
3676 goto out;
3677
3678#define IOACCEL_STATUS_BYTE 4
3679#define OFFLOAD_CONFIGURED_BIT 0x01
3680#define OFFLOAD_ENABLED_BIT 0x02
3681 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3682 this_device->offload_config =
3683 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3684 if (this_device->offload_config) {
3685 bool offload_enabled =
3686 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3687 /*
3688 * Check to see if offload can be enabled.
3689 */
3690 if (offload_enabled) {
3691 rc = hpsa_get_raid_map(h, scsi3addr, this_device);
3692 if (rc) /* could not load raid_map */
3693 goto out;
3694 this_device->offload_to_be_enabled = 1;
3695 }
3696 }
3697
3698out:
3699 kfree(buf);
3700 return;
3701}
3702
3703/* Get the device id from inquiry page 0x83 */
3704static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3705 unsigned char *device_id, int index, int buflen)
3706{
3707 int rc;
3708 unsigned char *buf;
3709
3710 /* Does controller have VPD for device id? */
3711 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3712 return 1; /* not supported */
3713
3714 buf = kzalloc(64, GFP_KERNEL);
3715 if (!buf)
3716 return -ENOMEM;
3717
3718 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3719 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3720 if (rc == 0) {
3721 if (buflen > 16)
3722 buflen = 16;
3723 memcpy(device_id, &buf[8], buflen);
3724 }
3725
3726 kfree(buf);
3727
3728 return rc; /*0 - got id, otherwise, didn't */
3729}
3730
3731static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3732 void *buf, int bufsize,
3733 int extended_response)
3734{
3735 int rc = IO_OK;
3736 struct CommandList *c;
3737 unsigned char scsi3addr[8];
3738 struct ErrorInfo *ei;
3739
3740 c = cmd_alloc(h);
3741
3742 /* address the controller */
3743 memset(scsi3addr, 0, sizeof(scsi3addr));
3744 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3745 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3746 rc = -EAGAIN;
3747 goto out;
3748 }
3749 if (extended_response)
3750 c->Request.CDB[1] = extended_response;
3751 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
3752 NO_TIMEOUT);
3753 if (rc)
3754 goto out;
3755 ei = c->err_info;
3756 if (ei->CommandStatus != 0 &&
3757 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3758 hpsa_scsi_interpret_error(h, c);
3759 rc = -EIO;
3760 } else {
3761 struct ReportLUNdata *rld = buf;
3762
3763 if (rld->extended_response_flag != extended_response) {
3764 if (!h->legacy_board) {
3765 dev_err(&h->pdev->dev,
3766 "report luns requested format %u, got %u\n",
3767 extended_response,
3768 rld->extended_response_flag);
3769 rc = -EINVAL;
3770 } else
3771 rc = -EOPNOTSUPP;
3772 }
3773 }
3774out:
3775 cmd_free(h, c);
3776 return rc;
3777}
3778
3779static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3780 struct ReportExtendedLUNdata *buf, int bufsize)
3781{
3782 int rc;
3783 struct ReportLUNdata *lbuf;
3784
3785 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3786 HPSA_REPORT_PHYS_EXTENDED);
3787 if (!rc || rc != -EOPNOTSUPP)
3788 return rc;
3789
3790 /* REPORT PHYS EXTENDED is not supported */
3791 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3792 if (!lbuf)
3793 return -ENOMEM;
3794
3795 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3796 if (!rc) {
3797 int i;
3798 u32 nphys;
3799
3800 /* Copy ReportLUNdata header */
3801 memcpy(buf, lbuf, 8);
3802 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3803 for (i = 0; i < nphys; i++)
3804 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3805 }
3806 kfree(lbuf);
3807 return rc;
3808}
3809
3810static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3811 struct ReportLUNdata *buf, int bufsize)
3812{
3813 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3814}
3815
3816static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3817 int bus, int target, int lun)
3818{
3819 device->bus = bus;
3820 device->target = target;
3821 device->lun = lun;
3822}
3823
3824/* Use VPD inquiry to get details of volume status */
3825static int hpsa_get_volume_status(struct ctlr_info *h,
3826 unsigned char scsi3addr[])
3827{
3828 int rc;
3829 int status;
3830 int size;
3831 unsigned char *buf;
3832
3833 buf = kzalloc(64, GFP_KERNEL);
3834 if (!buf)
3835 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3836
3837 /* Does controller have VPD for logical volume status? */
3838 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3839 goto exit_failed;
3840
3841 /* Get the size of the VPD return buffer */
3842 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3843 buf, HPSA_VPD_HEADER_SZ);
3844 if (rc != 0)
3845 goto exit_failed;
3846 size = buf[3];
3847
3848 /* Now get the whole VPD buffer */
3849 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3850 buf, size + HPSA_VPD_HEADER_SZ);
3851 if (rc != 0)
3852 goto exit_failed;
3853 status = buf[4]; /* status byte */
3854
3855 kfree(buf);
3856 return status;
3857exit_failed:
3858 kfree(buf);
3859 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3860}
3861
3862/* Determine offline status of a volume.
3863 * Return either:
3864 * 0 (not offline)
3865 * 0xff (offline for unknown reasons)
3866 * # (integer code indicating one of several NOT READY states
3867 * describing why a volume is to be kept offline)
3868 */
3869static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3870 unsigned char scsi3addr[])
3871{
3872 struct CommandList *c;
3873 unsigned char *sense;
3874 u8 sense_key, asc, ascq;
3875 int sense_len;
3876 int rc, ldstat = 0;
3877#define ASC_LUN_NOT_READY 0x04
3878#define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3879#define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3880
3881 c = cmd_alloc(h);
3882
3883 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3884 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3885 NO_TIMEOUT);
3886 if (rc) {
3887 cmd_free(h, c);
3888 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3889 }
3890 sense = c->err_info->SenseInfo;
3891 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3892 sense_len = sizeof(c->err_info->SenseInfo);
3893 else
3894 sense_len = c->err_info->SenseLen;
3895 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3896 cmd_free(h, c);
3897
3898 /* Determine the reason for not ready state */
3899 ldstat = hpsa_get_volume_status(h, scsi3addr);
3900
3901 /* Keep volume offline in certain cases: */
3902 switch (ldstat) {
3903 case HPSA_LV_FAILED:
3904 case HPSA_LV_UNDERGOING_ERASE:
3905 case HPSA_LV_NOT_AVAILABLE:
3906 case HPSA_LV_UNDERGOING_RPI:
3907 case HPSA_LV_PENDING_RPI:
3908 case HPSA_LV_ENCRYPTED_NO_KEY:
3909 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3910 case HPSA_LV_UNDERGOING_ENCRYPTION:
3911 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3912 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3913 return ldstat;
3914 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3915 /* If VPD status page isn't available,
3916 * use ASC/ASCQ to determine state
3917 */
3918 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3919 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3920 return ldstat;
3921 break;
3922 default:
3923 break;
3924 }
3925 return HPSA_LV_OK;
3926}
3927
3928static int hpsa_update_device_info(struct ctlr_info *h,
3929 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3930 unsigned char *is_OBDR_device)
3931{
3932
3933#define OBDR_SIG_OFFSET 43
3934#define OBDR_TAPE_SIG "$DR-10"
3935#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3936#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3937
3938 unsigned char *inq_buff;
3939 unsigned char *obdr_sig;
3940 int rc = 0;
3941
3942 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3943 if (!inq_buff) {
3944 rc = -ENOMEM;
3945 goto bail_out;
3946 }
3947
3948 /* Do an inquiry to the device to see what it is. */
3949 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3950 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3951 dev_err(&h->pdev->dev,
3952 "%s: inquiry failed, device will be skipped.\n",
3953 __func__);
3954 rc = HPSA_INQUIRY_FAILED;
3955 goto bail_out;
3956 }
3957
3958 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3959 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3960
3961 this_device->devtype = (inq_buff[0] & 0x1f);
3962 memcpy(this_device->scsi3addr, scsi3addr, 8);
3963 memcpy(this_device->vendor, &inq_buff[8],
3964 sizeof(this_device->vendor));
3965 memcpy(this_device->model, &inq_buff[16],
3966 sizeof(this_device->model));
3967 this_device->rev = inq_buff[2];
3968 memset(this_device->device_id, 0,
3969 sizeof(this_device->device_id));
3970 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3971 sizeof(this_device->device_id)) < 0) {
3972 dev_err(&h->pdev->dev,
3973 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
3974 h->ctlr, __func__,
3975 h->scsi_host->host_no,
3976 this_device->bus, this_device->target,
3977 this_device->lun,
3978 scsi_device_type(this_device->devtype),
3979 this_device->model);
3980 rc = HPSA_LV_FAILED;
3981 goto bail_out;
3982 }
3983
3984 if ((this_device->devtype == TYPE_DISK ||
3985 this_device->devtype == TYPE_ZBC) &&
3986 is_logical_dev_addr_mode(scsi3addr)) {
3987 unsigned char volume_offline;
3988
3989 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3990 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3991 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3992 volume_offline = hpsa_volume_offline(h, scsi3addr);
3993 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3994 h->legacy_board) {
3995 /*
3996 * Legacy boards might not support volume status
3997 */
3998 dev_info(&h->pdev->dev,
3999 "C0:T%d:L%d Volume status not available, assuming online.\n",
4000 this_device->target, this_device->lun);
4001 volume_offline = 0;
4002 }
4003 this_device->volume_offline = volume_offline;
4004 if (volume_offline == HPSA_LV_FAILED) {
4005 rc = HPSA_LV_FAILED;
4006 dev_err(&h->pdev->dev,
4007 "%s: LV failed, device will be skipped.\n",
4008 __func__);
4009 goto bail_out;
4010 }
4011 } else {
4012 this_device->raid_level = RAID_UNKNOWN;
4013 this_device->offload_config = 0;
4014 hpsa_turn_off_ioaccel_for_device(this_device);
4015 this_device->hba_ioaccel_enabled = 0;
4016 this_device->volume_offline = 0;
4017 this_device->queue_depth = h->nr_cmds;
4018 }
4019
4020 if (this_device->external)
4021 this_device->queue_depth = EXTERNAL_QD;
4022
4023 if (is_OBDR_device) {
4024 /* See if this is a One-Button-Disaster-Recovery device
4025 * by looking for "$DR-10" at offset 43 in inquiry data.
4026 */
4027 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4028 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4029 strncmp(obdr_sig, OBDR_TAPE_SIG,
4030 OBDR_SIG_LEN) == 0);
4031 }
4032 kfree(inq_buff);
4033 return 0;
4034
4035bail_out:
4036 kfree(inq_buff);
4037 return rc;
4038}
4039
4040/*
4041 * Helper function to assign bus, target, lun mapping of devices.
4042 * Logical drive target and lun are assigned at this time, but
4043 * physical device lun and target assignment are deferred (assigned
4044 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4045*/
4046static void figure_bus_target_lun(struct ctlr_info *h,
4047 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4048{
4049 u32 lunid = get_unaligned_le32(lunaddrbytes);
4050
4051 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4052 /* physical device, target and lun filled in later */
4053 if (is_hba_lunid(lunaddrbytes)) {
4054 int bus = HPSA_HBA_BUS;
4055
4056 if (!device->rev)
4057 bus = HPSA_LEGACY_HBA_BUS;
4058 hpsa_set_bus_target_lun(device,
4059 bus, 0, lunid & 0x3fff);
4060 } else
4061 /* defer target, lun assignment for physical devices */
4062 hpsa_set_bus_target_lun(device,
4063 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4064 return;
4065 }
4066 /* It's a logical device */
4067 if (device->external) {
4068 hpsa_set_bus_target_lun(device,
4069 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4070 lunid & 0x00ff);
4071 return;
4072 }
4073 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4074 0, lunid & 0x3fff);
4075}
4076
4077static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4078 int i, int nphysicals, int nlocal_logicals)
4079{
4080 /* In report logicals, local logicals are listed first,
4081 * then any externals.
4082 */
4083 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4084
4085 if (i == raid_ctlr_position)
4086 return 0;
4087
4088 if (i < logicals_start)
4089 return 0;
4090
4091 /* i is in logicals range, but still within local logicals */
4092 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4093 return 0;
4094
4095 return 1; /* it's an external lun */
4096}
4097
4098/*
4099 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4100 * logdev. The number of luns in physdev and logdev are returned in
4101 * *nphysicals and *nlogicals, respectively.
4102 * Returns 0 on success, -1 otherwise.
4103 */
4104static int hpsa_gather_lun_info(struct ctlr_info *h,
4105 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4106 struct ReportLUNdata *logdev, u32 *nlogicals)
4107{
4108 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4109 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4110 return -1;
4111 }
4112 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4113 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4114 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4115 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4116 *nphysicals = HPSA_MAX_PHYS_LUN;
4117 }
4118 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4119 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4120 return -1;
4121 }
4122 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4123 /* Reject Logicals in excess of our max capability. */
4124 if (*nlogicals > HPSA_MAX_LUN) {
4125 dev_warn(&h->pdev->dev,
4126 "maximum logical LUNs (%d) exceeded. "
4127 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4128 *nlogicals - HPSA_MAX_LUN);
4129 *nlogicals = HPSA_MAX_LUN;
4130 }
4131 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4132 dev_warn(&h->pdev->dev,
4133 "maximum logical + physical LUNs (%d) exceeded. "
4134 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4135 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4136 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4137 }
4138 return 0;
4139}
4140
4141static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4142 int i, int nphysicals, int nlogicals,
4143 struct ReportExtendedLUNdata *physdev_list,
4144 struct ReportLUNdata *logdev_list)
4145{
4146 /* Helper function, figure out where the LUN ID info is coming from
4147 * given index i, lists of physical and logical devices, where in
4148 * the list the raid controller is supposed to appear (first or last)
4149 */
4150
4151 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4152 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4153
4154 if (i == raid_ctlr_position)
4155 return RAID_CTLR_LUNID;
4156
4157 if (i < logicals_start)
4158 return &physdev_list->LUN[i -
4159 (raid_ctlr_position == 0)].lunid[0];
4160
4161 if (i < last_device)
4162 return &logdev_list->LUN[i - nphysicals -
4163 (raid_ctlr_position == 0)][0];
4164 BUG();
4165 return NULL;
4166}
4167
4168/* get physical drive ioaccel handle and queue depth */
4169static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4170 struct hpsa_scsi_dev_t *dev,
4171 struct ReportExtendedLUNdata *rlep, int rle_index,
4172 struct bmic_identify_physical_device *id_phys)
4173{
4174 int rc;
4175 struct ext_report_lun_entry *rle;
4176
4177 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4178 return;
4179
4180 rle = &rlep->LUN[rle_index];
4181
4182 dev->ioaccel_handle = rle->ioaccel_handle;
4183 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4184 dev->hba_ioaccel_enabled = 1;
4185 memset(id_phys, 0, sizeof(*id_phys));
4186 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4187 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4188 sizeof(*id_phys));
4189 if (!rc)
4190 /* Reserve space for FW operations */
4191#define DRIVE_CMDS_RESERVED_FOR_FW 2
4192#define DRIVE_QUEUE_DEPTH 7
4193 dev->queue_depth =
4194 le16_to_cpu(id_phys->current_queue_depth_limit) -
4195 DRIVE_CMDS_RESERVED_FOR_FW;
4196 else
4197 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4198}
4199
4200static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4201 struct ReportExtendedLUNdata *rlep, int rle_index,
4202 struct bmic_identify_physical_device *id_phys)
4203{
4204 struct ext_report_lun_entry *rle;
4205
4206 if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
4207 return;
4208
4209 rle = &rlep->LUN[rle_index];
4210
4211 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4212 this_device->hba_ioaccel_enabled = 1;
4213
4214 memcpy(&this_device->active_path_index,
4215 &id_phys->active_path_number,
4216 sizeof(this_device->active_path_index));
4217 memcpy(&this_device->path_map,
4218 &id_phys->redundant_path_present_map,
4219 sizeof(this_device->path_map));
4220 memcpy(&this_device->box,
4221 &id_phys->alternate_paths_phys_box_on_port,
4222 sizeof(this_device->box));
4223 memcpy(&this_device->phys_connector,
4224 &id_phys->alternate_paths_phys_connector,
4225 sizeof(this_device->phys_connector));
4226 memcpy(&this_device->bay,
4227 &id_phys->phys_bay_in_box,
4228 sizeof(this_device->bay));
4229}
4230
4231/* get number of local logical disks. */
4232static int hpsa_set_local_logical_count(struct ctlr_info *h,
4233 struct bmic_identify_controller *id_ctlr,
4234 u32 *nlocals)
4235{
4236 int rc;
4237
4238 if (!id_ctlr) {
4239 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4240 __func__);
4241 return -ENOMEM;
4242 }
4243 memset(id_ctlr, 0, sizeof(*id_ctlr));
4244 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4245 if (!rc)
4246 if (id_ctlr->configured_logical_drive_count < 255)
4247 *nlocals = id_ctlr->configured_logical_drive_count;
4248 else
4249 *nlocals = le16_to_cpu(
4250 id_ctlr->extended_logical_unit_count);
4251 else
4252 *nlocals = -1;
4253 return rc;
4254}
4255
4256static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4257{
4258 struct bmic_identify_physical_device *id_phys;
4259 bool is_spare = false;
4260 int rc;
4261
4262 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4263 if (!id_phys)
4264 return false;
4265
4266 rc = hpsa_bmic_id_physical_device(h,
4267 lunaddrbytes,
4268 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4269 id_phys, sizeof(*id_phys));
4270 if (rc == 0)
4271 is_spare = (id_phys->more_flags >> 6) & 0x01;
4272
4273 kfree(id_phys);
4274 return is_spare;
4275}
4276
4277#define RPL_DEV_FLAG_NON_DISK 0x1
4278#define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4279#define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4280
4281#define BMIC_DEVICE_TYPE_ENCLOSURE 6
4282
4283static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4284 struct ext_report_lun_entry *rle)
4285{
4286 u8 device_flags;
4287 u8 device_type;
4288
4289 if (!MASKED_DEVICE(lunaddrbytes))
4290 return false;
4291
4292 device_flags = rle->device_flags;
4293 device_type = rle->device_type;
4294
4295 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4296 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4297 return false;
4298 return true;
4299 }
4300
4301 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4302 return false;
4303
4304 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4305 return false;
4306
4307 /*
4308 * Spares may be spun down, we do not want to
4309 * do an Inquiry to a RAID set spare drive as
4310 * that would have them spun up, that is a
4311 * performance hit because I/O to the RAID device
4312 * stops while the spin up occurs which can take
4313 * over 50 seconds.
4314 */
4315 if (hpsa_is_disk_spare(h, lunaddrbytes))
4316 return true;
4317
4318 return false;
4319}
4320
4321static void hpsa_update_scsi_devices(struct ctlr_info *h)
4322{
4323 /* the idea here is we could get notified
4324 * that some devices have changed, so we do a report
4325 * physical luns and report logical luns cmd, and adjust
4326 * our list of devices accordingly.
4327 *
4328 * The scsi3addr's of devices won't change so long as the
4329 * adapter is not reset. That means we can rescan and
4330 * tell which devices we already know about, vs. new
4331 * devices, vs. disappearing devices.
4332 */
4333 struct ReportExtendedLUNdata *physdev_list = NULL;
4334 struct ReportLUNdata *logdev_list = NULL;
4335 struct bmic_identify_physical_device *id_phys = NULL;
4336 struct bmic_identify_controller *id_ctlr = NULL;
4337 u32 nphysicals = 0;
4338 u32 nlogicals = 0;
4339 u32 nlocal_logicals = 0;
4340 u32 ndev_allocated = 0;
4341 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4342 int ncurrent = 0;
4343 int i, ndevs_to_allocate;
4344 int raid_ctlr_position;
4345 bool physical_device;
4346
4347 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4348 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4349 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4350 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4351 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4352 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4353
4354 if (!currentsd || !physdev_list || !logdev_list ||
4355 !tmpdevice || !id_phys || !id_ctlr) {
4356 dev_err(&h->pdev->dev, "out of memory\n");
4357 goto out;
4358 }
4359
4360 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4361
4362 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4363 logdev_list, &nlogicals)) {
4364 h->drv_req_rescan = 1;
4365 goto out;
4366 }
4367
4368 /* Set number of local logicals (non PTRAID) */
4369 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4370 dev_warn(&h->pdev->dev,
4371 "%s: Can't determine number of local logical devices.\n",
4372 __func__);
4373 }
4374
4375 /* We might see up to the maximum number of logical and physical disks
4376 * plus external target devices, and a device for the local RAID
4377 * controller.
4378 */
4379 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4380
4381 hpsa_ext_ctrl_present(h, physdev_list);
4382
4383 /* Allocate the per device structures */
4384 for (i = 0; i < ndevs_to_allocate; i++) {
4385 if (i >= HPSA_MAX_DEVICES) {
4386 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4387 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4388 ndevs_to_allocate - HPSA_MAX_DEVICES);
4389 break;
4390 }
4391
4392 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4393 if (!currentsd[i]) {
4394 h->drv_req_rescan = 1;
4395 goto out;
4396 }
4397 ndev_allocated++;
4398 }
4399
4400 if (is_scsi_rev_5(h))
4401 raid_ctlr_position = 0;
4402 else
4403 raid_ctlr_position = nphysicals + nlogicals;
4404
4405 /* adjust our table of devices */
4406 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4407 u8 *lunaddrbytes, is_OBDR = 0;
4408 int rc = 0;
4409 int phys_dev_index = i - (raid_ctlr_position == 0);
4410 bool skip_device = false;
4411
4412 memset(tmpdevice, 0, sizeof(*tmpdevice));
4413
4414 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4415
4416 /* Figure out where the LUN ID info is coming from */
4417 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4418 i, nphysicals, nlogicals, physdev_list, logdev_list);
4419
4420 /* Determine if this is a lun from an external target array */
4421 tmpdevice->external =
4422 figure_external_status(h, raid_ctlr_position, i,
4423 nphysicals, nlocal_logicals);
4424
4425 /*
4426 * Skip over some devices such as a spare.
4427 */
4428 if (phys_dev_index >= 0 && !tmpdevice->external &&
4429 physical_device) {
4430 skip_device = hpsa_skip_device(h, lunaddrbytes,
4431 &physdev_list->LUN[phys_dev_index]);
4432 if (skip_device)
4433 continue;
4434 }
4435
4436 /* Get device type, vendor, model, device id, raid_map */
4437 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4438 &is_OBDR);
4439 if (rc == -ENOMEM) {
4440 dev_warn(&h->pdev->dev,
4441 "Out of memory, rescan deferred.\n");
4442 h->drv_req_rescan = 1;
4443 goto out;
4444 }
4445 if (rc) {
4446 h->drv_req_rescan = 1;
4447 continue;
4448 }
4449
4450 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4451 this_device = currentsd[ncurrent];
4452
4453 *this_device = *tmpdevice;
4454 this_device->physical_device = physical_device;
4455
4456 /*
4457 * Expose all devices except for physical devices that
4458 * are masked.
4459 */
4460 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4461 this_device->expose_device = 0;
4462 else
4463 this_device->expose_device = 1;
4464
4465
4466 /*
4467 * Get the SAS address for physical devices that are exposed.
4468 */
4469 if (this_device->physical_device && this_device->expose_device)
4470 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4471
4472 switch (this_device->devtype) {
4473 case TYPE_ROM:
4474 /* We don't *really* support actual CD-ROM devices,
4475 * just "One Button Disaster Recovery" tape drive
4476 * which temporarily pretends to be a CD-ROM drive.
4477 * So we check that the device is really an OBDR tape
4478 * device by checking for "$DR-10" in bytes 43-48 of
4479 * the inquiry data.
4480 */
4481 if (is_OBDR)
4482 ncurrent++;
4483 break;
4484 case TYPE_DISK:
4485 case TYPE_ZBC:
4486 if (this_device->physical_device) {
4487 /* The disk is in HBA mode. */
4488 /* Never use RAID mapper in HBA mode. */
4489 this_device->offload_enabled = 0;
4490 hpsa_get_ioaccel_drive_info(h, this_device,
4491 physdev_list, phys_dev_index, id_phys);
4492 hpsa_get_path_info(this_device,
4493 physdev_list, phys_dev_index, id_phys);
4494 }
4495 ncurrent++;
4496 break;
4497 case TYPE_TAPE:
4498 case TYPE_MEDIUM_CHANGER:
4499 ncurrent++;
4500 break;
4501 case TYPE_ENCLOSURE:
4502 if (!this_device->external)
4503 hpsa_get_enclosure_info(h, lunaddrbytes,
4504 physdev_list, phys_dev_index,
4505 this_device);
4506 ncurrent++;
4507 break;
4508 case TYPE_RAID:
4509 /* Only present the Smartarray HBA as a RAID controller.
4510 * If it's a RAID controller other than the HBA itself
4511 * (an external RAID controller, MSA500 or similar)
4512 * don't present it.
4513 */
4514 if (!is_hba_lunid(lunaddrbytes))
4515 break;
4516 ncurrent++;
4517 break;
4518 default:
4519 break;
4520 }
4521 if (ncurrent >= HPSA_MAX_DEVICES)
4522 break;
4523 }
4524
4525 if (h->sas_host == NULL) {
4526 int rc = 0;
4527
4528 rc = hpsa_add_sas_host(h);
4529 if (rc) {
4530 dev_warn(&h->pdev->dev,
4531 "Could not add sas host %d\n", rc);
4532 goto out;
4533 }
4534 }
4535
4536 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4537out:
4538 kfree(tmpdevice);
4539 for (i = 0; i < ndev_allocated; i++)
4540 kfree(currentsd[i]);
4541 kfree(currentsd);
4542 kfree(physdev_list);
4543 kfree(logdev_list);
4544 kfree(id_ctlr);
4545 kfree(id_phys);
4546}
4547
4548static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4549 struct scatterlist *sg)
4550{
4551 u64 addr64 = (u64) sg_dma_address(sg);
4552 unsigned int len = sg_dma_len(sg);
4553
4554 desc->Addr = cpu_to_le64(addr64);
4555 desc->Len = cpu_to_le32(len);
4556 desc->Ext = 0;
4557}
4558
4559/*
4560 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4561 * dma mapping and fills in the scatter gather entries of the
4562 * hpsa command, cp.
4563 */
4564static int hpsa_scatter_gather(struct ctlr_info *h,
4565 struct CommandList *cp,
4566 struct scsi_cmnd *cmd)
4567{
4568 struct scatterlist *sg;
4569 int use_sg, i, sg_limit, chained;
4570 struct SGDescriptor *curr_sg;
4571
4572 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4573
4574 use_sg = scsi_dma_map(cmd);
4575 if (use_sg < 0)
4576 return use_sg;
4577
4578 if (!use_sg)
4579 goto sglist_finished;
4580
4581 /*
4582 * If the number of entries is greater than the max for a single list,
4583 * then we have a chained list; we will set up all but one entry in the
4584 * first list (the last entry is saved for link information);
4585 * otherwise, we don't have a chained list and we'll set up at each of
4586 * the entries in the one list.
4587 */
4588 curr_sg = cp->SG;
4589 chained = use_sg > h->max_cmd_sg_entries;
4590 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4591 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4592 hpsa_set_sg_descriptor(curr_sg, sg);
4593 curr_sg++;
4594 }
4595
4596 if (chained) {
4597 /*
4598 * Continue with the chained list. Set curr_sg to the chained
4599 * list. Modify the limit to the total count less the entries
4600 * we've already set up. Resume the scan at the list entry
4601 * where the previous loop left off.
4602 */
4603 curr_sg = h->cmd_sg_list[cp->cmdindex];
4604 sg_limit = use_sg - sg_limit;
4605 for_each_sg(sg, sg, sg_limit, i) {
4606 hpsa_set_sg_descriptor(curr_sg, sg);
4607 curr_sg++;
4608 }
4609 }
4610
4611 /* Back the pointer up to the last entry and mark it as "last". */
4612 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4613
4614 if (use_sg + chained > h->maxSG)
4615 h->maxSG = use_sg + chained;
4616
4617 if (chained) {
4618 cp->Header.SGList = h->max_cmd_sg_entries;
4619 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4620 if (hpsa_map_sg_chain_block(h, cp)) {
4621 scsi_dma_unmap(cmd);
4622 return -1;
4623 }
4624 return 0;
4625 }
4626
4627sglist_finished:
4628
4629 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4630 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4631 return 0;
4632}
4633
4634static inline void warn_zero_length_transfer(struct ctlr_info *h,
4635 u8 *cdb, int cdb_len,
4636 const char *func)
4637{
4638 dev_warn(&h->pdev->dev,
4639 "%s: Blocking zero-length request: CDB:%*phN\n",
4640 func, cdb_len, cdb);
4641}
4642
4643#define IO_ACCEL_INELIGIBLE 1
4644/* zero-length transfers trigger hardware errors. */
4645static bool is_zero_length_transfer(u8 *cdb)
4646{
4647 u32 block_cnt;
4648
4649 /* Block zero-length transfer sizes on certain commands. */
4650 switch (cdb[0]) {
4651 case READ_10:
4652 case WRITE_10:
4653 case VERIFY: /* 0x2F */
4654 case WRITE_VERIFY: /* 0x2E */
4655 block_cnt = get_unaligned_be16(&cdb[7]);
4656 break;
4657 case READ_12:
4658 case WRITE_12:
4659 case VERIFY_12: /* 0xAF */
4660 case WRITE_VERIFY_12: /* 0xAE */
4661 block_cnt = get_unaligned_be32(&cdb[6]);
4662 break;
4663 case READ_16:
4664 case WRITE_16:
4665 case VERIFY_16: /* 0x8F */
4666 block_cnt = get_unaligned_be32(&cdb[10]);
4667 break;
4668 default:
4669 return false;
4670 }
4671
4672 return block_cnt == 0;
4673}
4674
4675static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4676{
4677 int is_write = 0;
4678 u32 block;
4679 u32 block_cnt;
4680
4681 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4682 switch (cdb[0]) {
4683 case WRITE_6:
4684 case WRITE_12:
4685 is_write = 1;
4686 fallthrough;
4687 case READ_6:
4688 case READ_12:
4689 if (*cdb_len == 6) {
4690 block = (((cdb[1] & 0x1F) << 16) |
4691 (cdb[2] << 8) |
4692 cdb[3]);
4693 block_cnt = cdb[4];
4694 if (block_cnt == 0)
4695 block_cnt = 256;
4696 } else {
4697 BUG_ON(*cdb_len != 12);
4698 block = get_unaligned_be32(&cdb[2]);
4699 block_cnt = get_unaligned_be32(&cdb[6]);
4700 }
4701 if (block_cnt > 0xffff)
4702 return IO_ACCEL_INELIGIBLE;
4703
4704 cdb[0] = is_write ? WRITE_10 : READ_10;
4705 cdb[1] = 0;
4706 cdb[2] = (u8) (block >> 24);
4707 cdb[3] = (u8) (block >> 16);
4708 cdb[4] = (u8) (block >> 8);
4709 cdb[5] = (u8) (block);
4710 cdb[6] = 0;
4711 cdb[7] = (u8) (block_cnt >> 8);
4712 cdb[8] = (u8) (block_cnt);
4713 cdb[9] = 0;
4714 *cdb_len = 10;
4715 break;
4716 }
4717 return 0;
4718}
4719
4720static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4721 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4722 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4723{
4724 struct scsi_cmnd *cmd = c->scsi_cmd;
4725 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4726 unsigned int len;
4727 unsigned int total_len = 0;
4728 struct scatterlist *sg;
4729 u64 addr64;
4730 int use_sg, i;
4731 struct SGDescriptor *curr_sg;
4732 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4733
4734 /* TODO: implement chaining support */
4735 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4736 atomic_dec(&phys_disk->ioaccel_cmds_out);
4737 return IO_ACCEL_INELIGIBLE;
4738 }
4739
4740 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4741
4742 if (is_zero_length_transfer(cdb)) {
4743 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4744 atomic_dec(&phys_disk->ioaccel_cmds_out);
4745 return IO_ACCEL_INELIGIBLE;
4746 }
4747
4748 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4749 atomic_dec(&phys_disk->ioaccel_cmds_out);
4750 return IO_ACCEL_INELIGIBLE;
4751 }
4752
4753 c->cmd_type = CMD_IOACCEL1;
4754
4755 /* Adjust the DMA address to point to the accelerated command buffer */
4756 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4757 (c->cmdindex * sizeof(*cp));
4758 BUG_ON(c->busaddr & 0x0000007F);
4759
4760 use_sg = scsi_dma_map(cmd);
4761 if (use_sg < 0) {
4762 atomic_dec(&phys_disk->ioaccel_cmds_out);
4763 return use_sg;
4764 }
4765
4766 if (use_sg) {
4767 curr_sg = cp->SG;
4768 scsi_for_each_sg(cmd, sg, use_sg, i) {
4769 addr64 = (u64) sg_dma_address(sg);
4770 len = sg_dma_len(sg);
4771 total_len += len;
4772 curr_sg->Addr = cpu_to_le64(addr64);
4773 curr_sg->Len = cpu_to_le32(len);
4774 curr_sg->Ext = cpu_to_le32(0);
4775 curr_sg++;
4776 }
4777 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4778
4779 switch (cmd->sc_data_direction) {
4780 case DMA_TO_DEVICE:
4781 control |= IOACCEL1_CONTROL_DATA_OUT;
4782 break;
4783 case DMA_FROM_DEVICE:
4784 control |= IOACCEL1_CONTROL_DATA_IN;
4785 break;
4786 case DMA_NONE:
4787 control |= IOACCEL1_CONTROL_NODATAXFER;
4788 break;
4789 default:
4790 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4791 cmd->sc_data_direction);
4792 BUG();
4793 break;
4794 }
4795 } else {
4796 control |= IOACCEL1_CONTROL_NODATAXFER;
4797 }
4798
4799 c->Header.SGList = use_sg;
4800 /* Fill out the command structure to submit */
4801 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4802 cp->transfer_len = cpu_to_le32(total_len);
4803 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4804 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4805 cp->control = cpu_to_le32(control);
4806 memcpy(cp->CDB, cdb, cdb_len);
4807 memcpy(cp->CISS_LUN, scsi3addr, 8);
4808 /* Tag was already set at init time. */
4809 enqueue_cmd_and_start_io(h, c);
4810 return 0;
4811}
4812
4813/*
4814 * Queue a command directly to a device behind the controller using the
4815 * I/O accelerator path.
4816 */
4817static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4818 struct CommandList *c)
4819{
4820 struct scsi_cmnd *cmd = c->scsi_cmd;
4821 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4822
4823 if (!dev)
4824 return -1;
4825
4826 c->phys_disk = dev;
4827
4828 if (dev->in_reset)
4829 return -1;
4830
4831 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4832 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4833}
4834
4835/*
4836 * Set encryption parameters for the ioaccel2 request
4837 */
4838static void set_encrypt_ioaccel2(struct ctlr_info *h,
4839 struct CommandList *c, struct io_accel2_cmd *cp)
4840{
4841 struct scsi_cmnd *cmd = c->scsi_cmd;
4842 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4843 struct raid_map_data *map = &dev->raid_map;
4844 u64 first_block;
4845
4846 /* Are we doing encryption on this device */
4847 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4848 return;
4849 /* Set the data encryption key index. */
4850 cp->dekindex = map->dekindex;
4851
4852 /* Set the encryption enable flag, encoded into direction field. */
4853 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4854
4855 /* Set encryption tweak values based on logical block address
4856 * If block size is 512, tweak value is LBA.
4857 * For other block sizes, tweak is (LBA * block size)/ 512)
4858 */
4859 switch (cmd->cmnd[0]) {
4860 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4861 case READ_6:
4862 case WRITE_6:
4863 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4864 (cmd->cmnd[2] << 8) |
4865 cmd->cmnd[3]);
4866 break;
4867 case WRITE_10:
4868 case READ_10:
4869 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4870 case WRITE_12:
4871 case READ_12:
4872 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4873 break;
4874 case WRITE_16:
4875 case READ_16:
4876 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4877 break;
4878 default:
4879 dev_err(&h->pdev->dev,
4880 "ERROR: %s: size (0x%x) not supported for encryption\n",
4881 __func__, cmd->cmnd[0]);
4882 BUG();
4883 break;
4884 }
4885
4886 if (le32_to_cpu(map->volume_blk_size) != 512)
4887 first_block = first_block *
4888 le32_to_cpu(map->volume_blk_size)/512;
4889
4890 cp->tweak_lower = cpu_to_le32(first_block);
4891 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4892}
4893
4894static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4895 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4896 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4897{
4898 struct scsi_cmnd *cmd = c->scsi_cmd;
4899 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4900 struct ioaccel2_sg_element *curr_sg;
4901 int use_sg, i;
4902 struct scatterlist *sg;
4903 u64 addr64;
4904 u32 len;
4905 u32 total_len = 0;
4906
4907 if (!cmd->device)
4908 return -1;
4909
4910 if (!cmd->device->hostdata)
4911 return -1;
4912
4913 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4914
4915 if (is_zero_length_transfer(cdb)) {
4916 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4917 atomic_dec(&phys_disk->ioaccel_cmds_out);
4918 return IO_ACCEL_INELIGIBLE;
4919 }
4920
4921 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4922 atomic_dec(&phys_disk->ioaccel_cmds_out);
4923 return IO_ACCEL_INELIGIBLE;
4924 }
4925
4926 c->cmd_type = CMD_IOACCEL2;
4927 /* Adjust the DMA address to point to the accelerated command buffer */
4928 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4929 (c->cmdindex * sizeof(*cp));
4930 BUG_ON(c->busaddr & 0x0000007F);
4931
4932 memset(cp, 0, sizeof(*cp));
4933 cp->IU_type = IOACCEL2_IU_TYPE;
4934
4935 use_sg = scsi_dma_map(cmd);
4936 if (use_sg < 0) {
4937 atomic_dec(&phys_disk->ioaccel_cmds_out);
4938 return use_sg;
4939 }
4940
4941 if (use_sg) {
4942 curr_sg = cp->sg;
4943 if (use_sg > h->ioaccel_maxsg) {
4944 addr64 = le64_to_cpu(
4945 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4946 curr_sg->address = cpu_to_le64(addr64);
4947 curr_sg->length = 0;
4948 curr_sg->reserved[0] = 0;
4949 curr_sg->reserved[1] = 0;
4950 curr_sg->reserved[2] = 0;
4951 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4952
4953 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4954 }
4955 scsi_for_each_sg(cmd, sg, use_sg, i) {
4956 addr64 = (u64) sg_dma_address(sg);
4957 len = sg_dma_len(sg);
4958 total_len += len;
4959 curr_sg->address = cpu_to_le64(addr64);
4960 curr_sg->length = cpu_to_le32(len);
4961 curr_sg->reserved[0] = 0;
4962 curr_sg->reserved[1] = 0;
4963 curr_sg->reserved[2] = 0;
4964 curr_sg->chain_indicator = 0;
4965 curr_sg++;
4966 }
4967
4968 /*
4969 * Set the last s/g element bit
4970 */
4971 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4972
4973 switch (cmd->sc_data_direction) {
4974 case DMA_TO_DEVICE:
4975 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4976 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4977 break;
4978 case DMA_FROM_DEVICE:
4979 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4980 cp->direction |= IOACCEL2_DIR_DATA_IN;
4981 break;
4982 case DMA_NONE:
4983 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4984 cp->direction |= IOACCEL2_DIR_NO_DATA;
4985 break;
4986 default:
4987 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4988 cmd->sc_data_direction);
4989 BUG();
4990 break;
4991 }
4992 } else {
4993 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4994 cp->direction |= IOACCEL2_DIR_NO_DATA;
4995 }
4996
4997 /* Set encryption parameters, if necessary */
4998 set_encrypt_ioaccel2(h, c, cp);
4999
5000 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5001 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5002 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5003
5004 cp->data_len = cpu_to_le32(total_len);
5005 cp->err_ptr = cpu_to_le64(c->busaddr +
5006 offsetof(struct io_accel2_cmd, error_data));
5007 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5008
5009 /* fill in sg elements */
5010 if (use_sg > h->ioaccel_maxsg) {
5011 cp->sg_count = 1;
5012 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5013 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5014 atomic_dec(&phys_disk->ioaccel_cmds_out);
5015 scsi_dma_unmap(cmd);
5016 return -1;
5017 }
5018 } else
5019 cp->sg_count = (u8) use_sg;
5020
5021 if (phys_disk->in_reset) {
5022 cmd->result = DID_RESET << 16;
5023 return -1;
5024 }
5025
5026 enqueue_cmd_and_start_io(h, c);
5027 return 0;
5028}
5029
5030/*
5031 * Queue a command to the correct I/O accelerator path.
5032 */
5033static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5034 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5035 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5036{
5037 if (!c->scsi_cmd->device)
5038 return -1;
5039
5040 if (!c->scsi_cmd->device->hostdata)
5041 return -1;
5042
5043 if (phys_disk->in_reset)
5044 return -1;
5045
5046 /* Try to honor the device's queue depth */
5047 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5048 phys_disk->queue_depth) {
5049 atomic_dec(&phys_disk->ioaccel_cmds_out);
5050 return IO_ACCEL_INELIGIBLE;
5051 }
5052 if (h->transMethod & CFGTBL_Trans_io_accel1)
5053 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5054 cdb, cdb_len, scsi3addr,
5055 phys_disk);
5056 else
5057 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5058 cdb, cdb_len, scsi3addr,
5059 phys_disk);
5060}
5061
5062static void raid_map_helper(struct raid_map_data *map,
5063 int offload_to_mirror, u32 *map_index, u32 *current_group)
5064{
5065 if (offload_to_mirror == 0) {
5066 /* use physical disk in the first mirrored group. */
5067 *map_index %= le16_to_cpu(map->data_disks_per_row);
5068 return;
5069 }
5070 do {
5071 /* determine mirror group that *map_index indicates */
5072 *current_group = *map_index /
5073 le16_to_cpu(map->data_disks_per_row);
5074 if (offload_to_mirror == *current_group)
5075 continue;
5076 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5077 /* select map index from next group */
5078 *map_index += le16_to_cpu(map->data_disks_per_row);
5079 (*current_group)++;
5080 } else {
5081 /* select map index from first group */
5082 *map_index %= le16_to_cpu(map->data_disks_per_row);
5083 *current_group = 0;
5084 }
5085 } while (offload_to_mirror != *current_group);
5086}
5087
5088/*
5089 * Attempt to perform offload RAID mapping for a logical volume I/O.
5090 */
5091static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5092 struct CommandList *c)
5093{
5094 struct scsi_cmnd *cmd = c->scsi_cmd;
5095 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5096 struct raid_map_data *map = &dev->raid_map;
5097 struct raid_map_disk_data *dd = &map->data[0];
5098 int is_write = 0;
5099 u32 map_index;
5100 u64 first_block, last_block;
5101 u32 block_cnt;
5102 u32 blocks_per_row;
5103 u64 first_row, last_row;
5104 u32 first_row_offset, last_row_offset;
5105 u32 first_column, last_column;
5106 u64 r0_first_row, r0_last_row;
5107 u32 r5or6_blocks_per_row;
5108 u64 r5or6_first_row, r5or6_last_row;
5109 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5110 u32 r5or6_first_column, r5or6_last_column;
5111 u32 total_disks_per_row;
5112 u32 stripesize;
5113 u32 first_group, last_group, current_group;
5114 u32 map_row;
5115 u32 disk_handle;
5116 u64 disk_block;
5117 u32 disk_block_cnt;
5118 u8 cdb[16];
5119 u8 cdb_len;
5120 u16 strip_size;
5121#if BITS_PER_LONG == 32
5122 u64 tmpdiv;
5123#endif
5124 int offload_to_mirror;
5125
5126 if (!dev)
5127 return -1;
5128
5129 if (dev->in_reset)
5130 return -1;
5131
5132 /* check for valid opcode, get LBA and block count */
5133 switch (cmd->cmnd[0]) {
5134 case WRITE_6:
5135 is_write = 1;
5136 fallthrough;
5137 case READ_6:
5138 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5139 (cmd->cmnd[2] << 8) |
5140 cmd->cmnd[3]);
5141 block_cnt = cmd->cmnd[4];
5142 if (block_cnt == 0)
5143 block_cnt = 256;
5144 break;
5145 case WRITE_10:
5146 is_write = 1;
5147 fallthrough;
5148 case READ_10:
5149 first_block =
5150 (((u64) cmd->cmnd[2]) << 24) |
5151 (((u64) cmd->cmnd[3]) << 16) |
5152 (((u64) cmd->cmnd[4]) << 8) |
5153 cmd->cmnd[5];
5154 block_cnt =
5155 (((u32) cmd->cmnd[7]) << 8) |
5156 cmd->cmnd[8];
5157 break;
5158 case WRITE_12:
5159 is_write = 1;
5160 fallthrough;
5161 case READ_12:
5162 first_block =
5163 (((u64) cmd->cmnd[2]) << 24) |
5164 (((u64) cmd->cmnd[3]) << 16) |
5165 (((u64) cmd->cmnd[4]) << 8) |
5166 cmd->cmnd[5];
5167 block_cnt =
5168 (((u32) cmd->cmnd[6]) << 24) |
5169 (((u32) cmd->cmnd[7]) << 16) |
5170 (((u32) cmd->cmnd[8]) << 8) |
5171 cmd->cmnd[9];
5172 break;
5173 case WRITE_16:
5174 is_write = 1;
5175 fallthrough;
5176 case READ_16:
5177 first_block =
5178 (((u64) cmd->cmnd[2]) << 56) |
5179 (((u64) cmd->cmnd[3]) << 48) |
5180 (((u64) cmd->cmnd[4]) << 40) |
5181 (((u64) cmd->cmnd[5]) << 32) |
5182 (((u64) cmd->cmnd[6]) << 24) |
5183 (((u64) cmd->cmnd[7]) << 16) |
5184 (((u64) cmd->cmnd[8]) << 8) |
5185 cmd->cmnd[9];
5186 block_cnt =
5187 (((u32) cmd->cmnd[10]) << 24) |
5188 (((u32) cmd->cmnd[11]) << 16) |
5189 (((u32) cmd->cmnd[12]) << 8) |
5190 cmd->cmnd[13];
5191 break;
5192 default:
5193 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5194 }
5195 last_block = first_block + block_cnt - 1;
5196
5197 /* check for write to non-RAID-0 */
5198 if (is_write && dev->raid_level != 0)
5199 return IO_ACCEL_INELIGIBLE;
5200
5201 /* check for invalid block or wraparound */
5202 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5203 last_block < first_block)
5204 return IO_ACCEL_INELIGIBLE;
5205
5206 /* calculate stripe information for the request */
5207 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5208 le16_to_cpu(map->strip_size);
5209 strip_size = le16_to_cpu(map->strip_size);
5210#if BITS_PER_LONG == 32
5211 tmpdiv = first_block;
5212 (void) do_div(tmpdiv, blocks_per_row);
5213 first_row = tmpdiv;
5214 tmpdiv = last_block;
5215 (void) do_div(tmpdiv, blocks_per_row);
5216 last_row = tmpdiv;
5217 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5218 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5219 tmpdiv = first_row_offset;
5220 (void) do_div(tmpdiv, strip_size);
5221 first_column = tmpdiv;
5222 tmpdiv = last_row_offset;
5223 (void) do_div(tmpdiv, strip_size);
5224 last_column = tmpdiv;
5225#else
5226 first_row = first_block / blocks_per_row;
5227 last_row = last_block / blocks_per_row;
5228 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5229 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5230 first_column = first_row_offset / strip_size;
5231 last_column = last_row_offset / strip_size;
5232#endif
5233
5234 /* if this isn't a single row/column then give to the controller */
5235 if ((first_row != last_row) || (first_column != last_column))
5236 return IO_ACCEL_INELIGIBLE;
5237
5238 /* proceeding with driver mapping */
5239 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5240 le16_to_cpu(map->metadata_disks_per_row);
5241 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5242 le16_to_cpu(map->row_cnt);
5243 map_index = (map_row * total_disks_per_row) + first_column;
5244
5245 switch (dev->raid_level) {
5246 case HPSA_RAID_0:
5247 break; /* nothing special to do */
5248 case HPSA_RAID_1:
5249 /* Handles load balance across RAID 1 members.
5250 * (2-drive R1 and R10 with even # of drives.)
5251 * Appropriate for SSDs, not optimal for HDDs
5252 * Ensure we have the correct raid_map.
5253 */
5254 if (le16_to_cpu(map->layout_map_count) != 2) {
5255 hpsa_turn_off_ioaccel_for_device(dev);
5256 return IO_ACCEL_INELIGIBLE;
5257 }
5258 if (dev->offload_to_mirror)
5259 map_index += le16_to_cpu(map->data_disks_per_row);
5260 dev->offload_to_mirror = !dev->offload_to_mirror;
5261 break;
5262 case HPSA_RAID_ADM:
5263 /* Handles N-way mirrors (R1-ADM)
5264 * and R10 with # of drives divisible by 3.)
5265 * Ensure we have the correct raid_map.
5266 */
5267 if (le16_to_cpu(map->layout_map_count) != 3) {
5268 hpsa_turn_off_ioaccel_for_device(dev);
5269 return IO_ACCEL_INELIGIBLE;
5270 }
5271
5272 offload_to_mirror = dev->offload_to_mirror;
5273 raid_map_helper(map, offload_to_mirror,
5274 &map_index, ¤t_group);
5275 /* set mirror group to use next time */
5276 offload_to_mirror =
5277 (offload_to_mirror >=
5278 le16_to_cpu(map->layout_map_count) - 1)
5279 ? 0 : offload_to_mirror + 1;
5280 dev->offload_to_mirror = offload_to_mirror;
5281 /* Avoid direct use of dev->offload_to_mirror within this
5282 * function since multiple threads might simultaneously
5283 * increment it beyond the range of dev->layout_map_count -1.
5284 */
5285 break;
5286 case HPSA_RAID_5:
5287 case HPSA_RAID_6:
5288 if (le16_to_cpu(map->layout_map_count) <= 1)
5289 break;
5290
5291 /* Verify first and last block are in same RAID group */
5292 r5or6_blocks_per_row =
5293 le16_to_cpu(map->strip_size) *
5294 le16_to_cpu(map->data_disks_per_row);
5295 if (r5or6_blocks_per_row == 0) {
5296 hpsa_turn_off_ioaccel_for_device(dev);
5297 return IO_ACCEL_INELIGIBLE;
5298 }
5299 stripesize = r5or6_blocks_per_row *
5300 le16_to_cpu(map->layout_map_count);
5301#if BITS_PER_LONG == 32
5302 tmpdiv = first_block;
5303 first_group = do_div(tmpdiv, stripesize);
5304 tmpdiv = first_group;
5305 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5306 first_group = tmpdiv;
5307 tmpdiv = last_block;
5308 last_group = do_div(tmpdiv, stripesize);
5309 tmpdiv = last_group;
5310 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5311 last_group = tmpdiv;
5312#else
5313 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5314 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5315#endif
5316 if (first_group != last_group)
5317 return IO_ACCEL_INELIGIBLE;
5318
5319 /* Verify request is in a single row of RAID 5/6 */
5320#if BITS_PER_LONG == 32
5321 tmpdiv = first_block;
5322 (void) do_div(tmpdiv, stripesize);
5323 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5324 tmpdiv = last_block;
5325 (void) do_div(tmpdiv, stripesize);
5326 r5or6_last_row = r0_last_row = tmpdiv;
5327#else
5328 first_row = r5or6_first_row = r0_first_row =
5329 first_block / stripesize;
5330 r5or6_last_row = r0_last_row = last_block / stripesize;
5331#endif
5332 if (r5or6_first_row != r5or6_last_row)
5333 return IO_ACCEL_INELIGIBLE;
5334
5335
5336 /* Verify request is in a single column */
5337#if BITS_PER_LONG == 32
5338 tmpdiv = first_block;
5339 first_row_offset = do_div(tmpdiv, stripesize);
5340 tmpdiv = first_row_offset;
5341 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5342 r5or6_first_row_offset = first_row_offset;
5343 tmpdiv = last_block;
5344 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5345 tmpdiv = r5or6_last_row_offset;
5346 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5347 tmpdiv = r5or6_first_row_offset;
5348 (void) do_div(tmpdiv, map->strip_size);
5349 first_column = r5or6_first_column = tmpdiv;
5350 tmpdiv = r5or6_last_row_offset;
5351 (void) do_div(tmpdiv, map->strip_size);
5352 r5or6_last_column = tmpdiv;
5353#else
5354 first_row_offset = r5or6_first_row_offset =
5355 (u32)((first_block % stripesize) %
5356 r5or6_blocks_per_row);
5357
5358 r5or6_last_row_offset =
5359 (u32)((last_block % stripesize) %
5360 r5or6_blocks_per_row);
5361
5362 first_column = r5or6_first_column =
5363 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5364 r5or6_last_column =
5365 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5366#endif
5367 if (r5or6_first_column != r5or6_last_column)
5368 return IO_ACCEL_INELIGIBLE;
5369
5370 /* Request is eligible */
5371 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5372 le16_to_cpu(map->row_cnt);
5373
5374 map_index = (first_group *
5375 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5376 (map_row * total_disks_per_row) + first_column;
5377 break;
5378 default:
5379 return IO_ACCEL_INELIGIBLE;
5380 }
5381
5382 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5383 return IO_ACCEL_INELIGIBLE;
5384
5385 c->phys_disk = dev->phys_disk[map_index];
5386 if (!c->phys_disk)
5387 return IO_ACCEL_INELIGIBLE;
5388
5389 disk_handle = dd[map_index].ioaccel_handle;
5390 disk_block = le64_to_cpu(map->disk_starting_blk) +
5391 first_row * le16_to_cpu(map->strip_size) +
5392 (first_row_offset - first_column *
5393 le16_to_cpu(map->strip_size));
5394 disk_block_cnt = block_cnt;
5395
5396 /* handle differing logical/physical block sizes */
5397 if (map->phys_blk_shift) {
5398 disk_block <<= map->phys_blk_shift;
5399 disk_block_cnt <<= map->phys_blk_shift;
5400 }
5401 BUG_ON(disk_block_cnt > 0xffff);
5402
5403 /* build the new CDB for the physical disk I/O */
5404 if (disk_block > 0xffffffff) {
5405 cdb[0] = is_write ? WRITE_16 : READ_16;
5406 cdb[1] = 0;
5407 cdb[2] = (u8) (disk_block >> 56);
5408 cdb[3] = (u8) (disk_block >> 48);
5409 cdb[4] = (u8) (disk_block >> 40);
5410 cdb[5] = (u8) (disk_block >> 32);
5411 cdb[6] = (u8) (disk_block >> 24);
5412 cdb[7] = (u8) (disk_block >> 16);
5413 cdb[8] = (u8) (disk_block >> 8);
5414 cdb[9] = (u8) (disk_block);
5415 cdb[10] = (u8) (disk_block_cnt >> 24);
5416 cdb[11] = (u8) (disk_block_cnt >> 16);
5417 cdb[12] = (u8) (disk_block_cnt >> 8);
5418 cdb[13] = (u8) (disk_block_cnt);
5419 cdb[14] = 0;
5420 cdb[15] = 0;
5421 cdb_len = 16;
5422 } else {
5423 cdb[0] = is_write ? WRITE_10 : READ_10;
5424 cdb[1] = 0;
5425 cdb[2] = (u8) (disk_block >> 24);
5426 cdb[3] = (u8) (disk_block >> 16);
5427 cdb[4] = (u8) (disk_block >> 8);
5428 cdb[5] = (u8) (disk_block);
5429 cdb[6] = 0;
5430 cdb[7] = (u8) (disk_block_cnt >> 8);
5431 cdb[8] = (u8) (disk_block_cnt);
5432 cdb[9] = 0;
5433 cdb_len = 10;
5434 }
5435 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5436 dev->scsi3addr,
5437 dev->phys_disk[map_index]);
5438}
5439
5440/*
5441 * Submit commands down the "normal" RAID stack path
5442 * All callers to hpsa_ciss_submit must check lockup_detected
5443 * beforehand, before (opt.) and after calling cmd_alloc
5444 */
5445static int hpsa_ciss_submit(struct ctlr_info *h,
5446 struct CommandList *c, struct scsi_cmnd *cmd,
5447 struct hpsa_scsi_dev_t *dev)
5448{
5449 cmd->host_scribble = (unsigned char *) c;
5450 c->cmd_type = CMD_SCSI;
5451 c->scsi_cmd = cmd;
5452 c->Header.ReplyQueue = 0; /* unused in simple mode */
5453 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5454 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5455
5456 /* Fill in the request block... */
5457
5458 c->Request.Timeout = 0;
5459 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5460 c->Request.CDBLen = cmd->cmd_len;
5461 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5462 switch (cmd->sc_data_direction) {
5463 case DMA_TO_DEVICE:
5464 c->Request.type_attr_dir =
5465 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5466 break;
5467 case DMA_FROM_DEVICE:
5468 c->Request.type_attr_dir =
5469 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5470 break;
5471 case DMA_NONE:
5472 c->Request.type_attr_dir =
5473 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5474 break;
5475 case DMA_BIDIRECTIONAL:
5476 /* This can happen if a buggy application does a scsi passthru
5477 * and sets both inlen and outlen to non-zero. ( see
5478 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5479 */
5480
5481 c->Request.type_attr_dir =
5482 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5483 /* This is technically wrong, and hpsa controllers should
5484 * reject it with CMD_INVALID, which is the most correct
5485 * response, but non-fibre backends appear to let it
5486 * slide by, and give the same results as if this field
5487 * were set correctly. Either way is acceptable for
5488 * our purposes here.
5489 */
5490
5491 break;
5492
5493 default:
5494 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5495 cmd->sc_data_direction);
5496 BUG();
5497 break;
5498 }
5499
5500 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5501 hpsa_cmd_resolve_and_free(h, c);
5502 return SCSI_MLQUEUE_HOST_BUSY;
5503 }
5504
5505 if (dev->in_reset) {
5506 hpsa_cmd_resolve_and_free(h, c);
5507 return SCSI_MLQUEUE_HOST_BUSY;
5508 }
5509
5510 c->device = dev;
5511
5512 enqueue_cmd_and_start_io(h, c);
5513 /* the cmd'll come back via intr handler in complete_scsi_command() */
5514 return 0;
5515}
5516
5517static void hpsa_cmd_init(struct ctlr_info *h, int index,
5518 struct CommandList *c)
5519{
5520 dma_addr_t cmd_dma_handle, err_dma_handle;
5521
5522 /* Zero out all of commandlist except the last field, refcount */
5523 memset(c, 0, offsetof(struct CommandList, refcount));
5524 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5525 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5526 c->err_info = h->errinfo_pool + index;
5527 memset(c->err_info, 0, sizeof(*c->err_info));
5528 err_dma_handle = h->errinfo_pool_dhandle
5529 + index * sizeof(*c->err_info);
5530 c->cmdindex = index;
5531 c->busaddr = (u32) cmd_dma_handle;
5532 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5533 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5534 c->h = h;
5535 c->scsi_cmd = SCSI_CMD_IDLE;
5536}
5537
5538static void hpsa_preinitialize_commands(struct ctlr_info *h)
5539{
5540 int i;
5541
5542 for (i = 0; i < h->nr_cmds; i++) {
5543 struct CommandList *c = h->cmd_pool + i;
5544
5545 hpsa_cmd_init(h, i, c);
5546 atomic_set(&c->refcount, 0);
5547 }
5548}
5549
5550static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5551 struct CommandList *c)
5552{
5553 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5554
5555 BUG_ON(c->cmdindex != index);
5556
5557 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5558 memset(c->err_info, 0, sizeof(*c->err_info));
5559 c->busaddr = (u32) cmd_dma_handle;
5560}
5561
5562static int hpsa_ioaccel_submit(struct ctlr_info *h,
5563 struct CommandList *c, struct scsi_cmnd *cmd,
5564 bool retry)
5565{
5566 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5567 int rc = IO_ACCEL_INELIGIBLE;
5568
5569 if (!dev)
5570 return SCSI_MLQUEUE_HOST_BUSY;
5571
5572 if (dev->in_reset)
5573 return SCSI_MLQUEUE_HOST_BUSY;
5574
5575 if (hpsa_simple_mode)
5576 return IO_ACCEL_INELIGIBLE;
5577
5578 cmd->host_scribble = (unsigned char *) c;
5579
5580 if (dev->offload_enabled) {
5581 hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5582 c->cmd_type = CMD_SCSI;
5583 c->scsi_cmd = cmd;
5584 c->device = dev;
5585 if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5586 c->retry_pending = true;
5587 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5588 if (rc < 0) /* scsi_dma_map failed. */
5589 rc = SCSI_MLQUEUE_HOST_BUSY;
5590 } else if (dev->hba_ioaccel_enabled) {
5591 hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5592 c->cmd_type = CMD_SCSI;
5593 c->scsi_cmd = cmd;
5594 c->device = dev;
5595 if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5596 c->retry_pending = true;
5597 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5598 if (rc < 0) /* scsi_dma_map failed. */
5599 rc = SCSI_MLQUEUE_HOST_BUSY;
5600 }
5601 return rc;
5602}
5603
5604static void hpsa_command_resubmit_worker(struct work_struct *work)
5605{
5606 struct scsi_cmnd *cmd;
5607 struct hpsa_scsi_dev_t *dev;
5608 struct CommandList *c = container_of(work, struct CommandList, work);
5609
5610 cmd = c->scsi_cmd;
5611 dev = cmd->device->hostdata;
5612 if (!dev) {
5613 cmd->result = DID_NO_CONNECT << 16;
5614 return hpsa_cmd_free_and_done(c->h, c, cmd);
5615 }
5616
5617 if (dev->in_reset) {
5618 cmd->result = DID_RESET << 16;
5619 return hpsa_cmd_free_and_done(c->h, c, cmd);
5620 }
5621
5622 if (c->cmd_type == CMD_IOACCEL2) {
5623 struct ctlr_info *h = c->h;
5624 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5625 int rc;
5626
5627 if (c2->error_data.serv_response ==
5628 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5629 /* Resubmit with the retry_pending flag set. */
5630 rc = hpsa_ioaccel_submit(h, c, cmd, true);
5631 if (rc == 0)
5632 return;
5633 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5634 /*
5635 * If we get here, it means dma mapping failed.
5636 * Try again via scsi mid layer, which will
5637 * then get SCSI_MLQUEUE_HOST_BUSY.
5638 */
5639 cmd->result = DID_IMM_RETRY << 16;
5640 return hpsa_cmd_free_and_done(h, c, cmd);
5641 }
5642 /* else, fall thru and resubmit down CISS path */
5643 }
5644 }
5645 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5646 /*
5647 * Here we have not come in though queue_command, so we
5648 * can set the retry_pending flag to true for a driver initiated
5649 * retry attempt (I.E. not a SML retry).
5650 * I.E. We are submitting a driver initiated retry.
5651 * Note: hpsa_ciss_submit does not zero out the command fields like
5652 * ioaccel submit does.
5653 */
5654 c->retry_pending = true;
5655 if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5656 /*
5657 * If we get here, it means dma mapping failed. Try
5658 * again via scsi mid layer, which will then get
5659 * SCSI_MLQUEUE_HOST_BUSY.
5660 *
5661 * hpsa_ciss_submit will have already freed c
5662 * if it encountered a dma mapping failure.
5663 */
5664 cmd->result = DID_IMM_RETRY << 16;
5665 scsi_done(cmd);
5666 }
5667}
5668
5669/* Running in struct Scsi_Host->host_lock less mode */
5670static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5671{
5672 struct ctlr_info *h;
5673 struct hpsa_scsi_dev_t *dev;
5674 struct CommandList *c;
5675 int rc = 0;
5676
5677 /* Get the ptr to our adapter structure out of cmd->host. */
5678 h = sdev_to_hba(cmd->device);
5679
5680 BUG_ON(scsi_cmd_to_rq(cmd)->tag < 0);
5681
5682 dev = cmd->device->hostdata;
5683 if (!dev) {
5684 cmd->result = DID_NO_CONNECT << 16;
5685 scsi_done(cmd);
5686 return 0;
5687 }
5688
5689 if (dev->removed) {
5690 cmd->result = DID_NO_CONNECT << 16;
5691 scsi_done(cmd);
5692 return 0;
5693 }
5694
5695 if (unlikely(lockup_detected(h))) {
5696 cmd->result = DID_NO_CONNECT << 16;
5697 scsi_done(cmd);
5698 return 0;
5699 }
5700
5701 if (dev->in_reset)
5702 return SCSI_MLQUEUE_DEVICE_BUSY;
5703
5704 c = cmd_tagged_alloc(h, cmd);
5705 if (c == NULL)
5706 return SCSI_MLQUEUE_DEVICE_BUSY;
5707
5708 /*
5709 * This is necessary because the SML doesn't zero out this field during
5710 * error recovery.
5711 */
5712 cmd->result = 0;
5713
5714 /*
5715 * Call alternate submit routine for I/O accelerated commands.
5716 * Retries always go down the normal I/O path.
5717 * Note: If cmd->retries is non-zero, then this is a SML
5718 * initiated retry and not a driver initiated retry.
5719 * This command has been obtained from cmd_tagged_alloc
5720 * and is therefore a brand-new command.
5721 */
5722 if (likely(cmd->retries == 0 &&
5723 !blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)) &&
5724 h->acciopath_status)) {
5725 /* Submit with the retry_pending flag unset. */
5726 rc = hpsa_ioaccel_submit(h, c, cmd, false);
5727 if (rc == 0)
5728 return 0;
5729 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5730 hpsa_cmd_resolve_and_free(h, c);
5731 return SCSI_MLQUEUE_HOST_BUSY;
5732 }
5733 }
5734 return hpsa_ciss_submit(h, c, cmd, dev);
5735}
5736
5737static void hpsa_scan_complete(struct ctlr_info *h)
5738{
5739 unsigned long flags;
5740
5741 spin_lock_irqsave(&h->scan_lock, flags);
5742 h->scan_finished = 1;
5743 wake_up(&h->scan_wait_queue);
5744 spin_unlock_irqrestore(&h->scan_lock, flags);
5745}
5746
5747static void hpsa_scan_start(struct Scsi_Host *sh)
5748{
5749 struct ctlr_info *h = shost_to_hba(sh);
5750 unsigned long flags;
5751
5752 /*
5753 * Don't let rescans be initiated on a controller known to be locked
5754 * up. If the controller locks up *during* a rescan, that thread is
5755 * probably hosed, but at least we can prevent new rescan threads from
5756 * piling up on a locked up controller.
5757 */
5758 if (unlikely(lockup_detected(h)))
5759 return hpsa_scan_complete(h);
5760
5761 /*
5762 * If a scan is already waiting to run, no need to add another
5763 */
5764 spin_lock_irqsave(&h->scan_lock, flags);
5765 if (h->scan_waiting) {
5766 spin_unlock_irqrestore(&h->scan_lock, flags);
5767 return;
5768 }
5769
5770 spin_unlock_irqrestore(&h->scan_lock, flags);
5771
5772 /* wait until any scan already in progress is finished. */
5773 while (1) {
5774 spin_lock_irqsave(&h->scan_lock, flags);
5775 if (h->scan_finished)
5776 break;
5777 h->scan_waiting = 1;
5778 spin_unlock_irqrestore(&h->scan_lock, flags);
5779 wait_event(h->scan_wait_queue, h->scan_finished);
5780 /* Note: We don't need to worry about a race between this
5781 * thread and driver unload because the midlayer will
5782 * have incremented the reference count, so unload won't
5783 * happen if we're in here.
5784 */
5785 }
5786 h->scan_finished = 0; /* mark scan as in progress */
5787 h->scan_waiting = 0;
5788 spin_unlock_irqrestore(&h->scan_lock, flags);
5789
5790 if (unlikely(lockup_detected(h)))
5791 return hpsa_scan_complete(h);
5792
5793 /*
5794 * Do the scan after a reset completion
5795 */
5796 spin_lock_irqsave(&h->reset_lock, flags);
5797 if (h->reset_in_progress) {
5798 h->drv_req_rescan = 1;
5799 spin_unlock_irqrestore(&h->reset_lock, flags);
5800 hpsa_scan_complete(h);
5801 return;
5802 }
5803 spin_unlock_irqrestore(&h->reset_lock, flags);
5804
5805 hpsa_update_scsi_devices(h);
5806
5807 hpsa_scan_complete(h);
5808}
5809
5810static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5811{
5812 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5813
5814 if (!logical_drive)
5815 return -ENODEV;
5816
5817 if (qdepth < 1)
5818 qdepth = 1;
5819 else if (qdepth > logical_drive->queue_depth)
5820 qdepth = logical_drive->queue_depth;
5821
5822 return scsi_change_queue_depth(sdev, qdepth);
5823}
5824
5825static int hpsa_scan_finished(struct Scsi_Host *sh,
5826 unsigned long elapsed_time)
5827{
5828 struct ctlr_info *h = shost_to_hba(sh);
5829 unsigned long flags;
5830 int finished;
5831
5832 spin_lock_irqsave(&h->scan_lock, flags);
5833 finished = h->scan_finished;
5834 spin_unlock_irqrestore(&h->scan_lock, flags);
5835 return finished;
5836}
5837
5838static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5839{
5840 struct Scsi_Host *sh;
5841
5842 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(struct ctlr_info *));
5843 if (sh == NULL) {
5844 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5845 return -ENOMEM;
5846 }
5847
5848 sh->io_port = 0;
5849 sh->n_io_port = 0;
5850 sh->this_id = -1;
5851 sh->max_channel = 3;
5852 sh->max_cmd_len = MAX_COMMAND_SIZE;
5853 sh->max_lun = HPSA_MAX_LUN;
5854 sh->max_id = HPSA_MAX_LUN;
5855 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5856 sh->cmd_per_lun = sh->can_queue;
5857 sh->sg_tablesize = h->maxsgentries;
5858 sh->transportt = hpsa_sas_transport_template;
5859 sh->hostdata[0] = (unsigned long) h;
5860 sh->irq = pci_irq_vector(h->pdev, 0);
5861 sh->unique_id = sh->irq;
5862
5863 h->scsi_host = sh;
5864 return 0;
5865}
5866
5867static int hpsa_scsi_add_host(struct ctlr_info *h)
5868{
5869 int rv;
5870
5871 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5872 if (rv) {
5873 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5874 return rv;
5875 }
5876 scsi_scan_host(h->scsi_host);
5877 return 0;
5878}
5879
5880/*
5881 * The block layer has already gone to the trouble of picking out a unique,
5882 * small-integer tag for this request. We use an offset from that value as
5883 * an index to select our command block. (The offset allows us to reserve the
5884 * low-numbered entries for our own uses.)
5885 */
5886static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5887{
5888 int idx = scsi_cmd_to_rq(scmd)->tag;
5889
5890 if (idx < 0)
5891 return idx;
5892
5893 /* Offset to leave space for internal cmds. */
5894 return idx += HPSA_NRESERVED_CMDS;
5895}
5896
5897/*
5898 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5899 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5900 */
5901static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5902 struct CommandList *c, unsigned char lunaddr[],
5903 int reply_queue)
5904{
5905 int rc;
5906
5907 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5908 (void) fill_cmd(c, TEST_UNIT_READY, h,
5909 NULL, 0, 0, lunaddr, TYPE_CMD);
5910 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5911 if (rc)
5912 return rc;
5913 /* no unmap needed here because no data xfer. */
5914
5915 /* Check if the unit is already ready. */
5916 if (c->err_info->CommandStatus == CMD_SUCCESS)
5917 return 0;
5918
5919 /*
5920 * The first command sent after reset will receive "unit attention" to
5921 * indicate that the LUN has been reset...this is actually what we're
5922 * looking for (but, success is good too).
5923 */
5924 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5925 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5926 (c->err_info->SenseInfo[2] == NO_SENSE ||
5927 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5928 return 0;
5929
5930 return 1;
5931}
5932
5933/*
5934 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5935 * returns zero when the unit is ready, and non-zero when giving up.
5936 */
5937static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5938 struct CommandList *c,
5939 unsigned char lunaddr[], int reply_queue)
5940{
5941 int rc;
5942 int count = 0;
5943 int waittime = 1; /* seconds */
5944
5945 /* Send test unit ready until device ready, or give up. */
5946 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5947
5948 /*
5949 * Wait for a bit. do this first, because if we send
5950 * the TUR right away, the reset will just abort it.
5951 */
5952 msleep(1000 * waittime);
5953
5954 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5955 if (!rc)
5956 break;
5957
5958 /* Increase wait time with each try, up to a point. */
5959 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5960 waittime *= 2;
5961
5962 dev_warn(&h->pdev->dev,
5963 "waiting %d secs for device to become ready.\n",
5964 waittime);
5965 }
5966
5967 return rc;
5968}
5969
5970static int wait_for_device_to_become_ready(struct ctlr_info *h,
5971 unsigned char lunaddr[],
5972 int reply_queue)
5973{
5974 int first_queue;
5975 int last_queue;
5976 int rq;
5977 int rc = 0;
5978 struct CommandList *c;
5979
5980 c = cmd_alloc(h);
5981
5982 /*
5983 * If no specific reply queue was requested, then send the TUR
5984 * repeatedly, requesting a reply on each reply queue; otherwise execute
5985 * the loop exactly once using only the specified queue.
5986 */
5987 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5988 first_queue = 0;
5989 last_queue = h->nreply_queues - 1;
5990 } else {
5991 first_queue = reply_queue;
5992 last_queue = reply_queue;
5993 }
5994
5995 for (rq = first_queue; rq <= last_queue; rq++) {
5996 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5997 if (rc)
5998 break;
5999 }
6000
6001 if (rc)
6002 dev_warn(&h->pdev->dev, "giving up on device.\n");
6003 else
6004 dev_warn(&h->pdev->dev, "device is ready.\n");
6005
6006 cmd_free(h, c);
6007 return rc;
6008}
6009
6010/* Need at least one of these error handlers to keep ../scsi/hosts.c from
6011 * complaining. Doing a host- or bus-reset can't do anything good here.
6012 */
6013static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6014{
6015 int rc = SUCCESS;
6016 int i;
6017 struct ctlr_info *h;
6018 struct hpsa_scsi_dev_t *dev = NULL;
6019 u8 reset_type;
6020 char msg[48];
6021 unsigned long flags;
6022
6023 /* find the controller to which the command to be aborted was sent */
6024 h = sdev_to_hba(scsicmd->device);
6025 if (h == NULL) /* paranoia */
6026 return FAILED;
6027
6028 spin_lock_irqsave(&h->reset_lock, flags);
6029 h->reset_in_progress = 1;
6030 spin_unlock_irqrestore(&h->reset_lock, flags);
6031
6032 if (lockup_detected(h)) {
6033 rc = FAILED;
6034 goto return_reset_status;
6035 }
6036
6037 dev = scsicmd->device->hostdata;
6038 if (!dev) {
6039 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6040 rc = FAILED;
6041 goto return_reset_status;
6042 }
6043
6044 if (dev->devtype == TYPE_ENCLOSURE) {
6045 rc = SUCCESS;
6046 goto return_reset_status;
6047 }
6048
6049 /* if controller locked up, we can guarantee command won't complete */
6050 if (lockup_detected(h)) {
6051 snprintf(msg, sizeof(msg),
6052 "cmd %d RESET FAILED, lockup detected",
6053 hpsa_get_cmd_index(scsicmd));
6054 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6055 rc = FAILED;
6056 goto return_reset_status;
6057 }
6058
6059 /* this reset request might be the result of a lockup; check */
6060 if (detect_controller_lockup(h)) {
6061 snprintf(msg, sizeof(msg),
6062 "cmd %d RESET FAILED, new lockup detected",
6063 hpsa_get_cmd_index(scsicmd));
6064 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6065 rc = FAILED;
6066 goto return_reset_status;
6067 }
6068
6069 /* Do not attempt on controller */
6070 if (is_hba_lunid(dev->scsi3addr)) {
6071 rc = SUCCESS;
6072 goto return_reset_status;
6073 }
6074
6075 if (is_logical_dev_addr_mode(dev->scsi3addr))
6076 reset_type = HPSA_DEVICE_RESET_MSG;
6077 else
6078 reset_type = HPSA_PHYS_TARGET_RESET;
6079
6080 sprintf(msg, "resetting %s",
6081 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
6082 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6083
6084 /*
6085 * wait to see if any commands will complete before sending reset
6086 */
6087 dev->in_reset = true; /* block any new cmds from OS for this device */
6088 for (i = 0; i < 10; i++) {
6089 if (atomic_read(&dev->commands_outstanding) > 0)
6090 msleep(1000);
6091 else
6092 break;
6093 }
6094
6095 /* send a reset to the SCSI LUN which the command was sent to */
6096 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6097 if (rc == 0)
6098 rc = SUCCESS;
6099 else
6100 rc = FAILED;
6101
6102 sprintf(msg, "reset %s %s",
6103 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6104 rc == SUCCESS ? "completed successfully" : "failed");
6105 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6106
6107return_reset_status:
6108 spin_lock_irqsave(&h->reset_lock, flags);
6109 h->reset_in_progress = 0;
6110 if (dev)
6111 dev->in_reset = false;
6112 spin_unlock_irqrestore(&h->reset_lock, flags);
6113 return rc;
6114}
6115
6116/*
6117 * For operations with an associated SCSI command, a command block is allocated
6118 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6119 * block request tag as an index into a table of entries. cmd_tagged_free() is
6120 * the complement, although cmd_free() may be called instead.
6121 * This function is only called for new requests from queue_command.
6122 */
6123static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6124 struct scsi_cmnd *scmd)
6125{
6126 int idx = hpsa_get_cmd_index(scmd);
6127 struct CommandList *c = h->cmd_pool + idx;
6128
6129 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6130 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6131 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6132 /* The index value comes from the block layer, so if it's out of
6133 * bounds, it's probably not our bug.
6134 */
6135 BUG();
6136 }
6137
6138 if (unlikely(!hpsa_is_cmd_idle(c))) {
6139 /*
6140 * We expect that the SCSI layer will hand us a unique tag
6141 * value. Thus, there should never be a collision here between
6142 * two requests...because if the selected command isn't idle
6143 * then someone is going to be very disappointed.
6144 */
6145 if (idx != h->last_collision_tag) { /* Print once per tag */
6146 dev_warn(&h->pdev->dev,
6147 "%s: tag collision (tag=%d)\n", __func__, idx);
6148 if (scmd)
6149 scsi_print_command(scmd);
6150 h->last_collision_tag = idx;
6151 }
6152 return NULL;
6153 }
6154
6155 atomic_inc(&c->refcount);
6156 hpsa_cmd_partial_init(h, idx, c);
6157
6158 /*
6159 * This is a new command obtained from queue_command so
6160 * there have not been any driver initiated retry attempts.
6161 */
6162 c->retry_pending = false;
6163
6164 return c;
6165}
6166
6167static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6168{
6169 /*
6170 * Release our reference to the block. We don't need to do anything
6171 * else to free it, because it is accessed by index.
6172 */
6173 (void)atomic_dec(&c->refcount);
6174}
6175
6176/*
6177 * For operations that cannot sleep, a command block is allocated at init,
6178 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6179 * which ones are free or in use. Lock must be held when calling this.
6180 * cmd_free() is the complement.
6181 * This function never gives up and returns NULL. If it hangs,
6182 * another thread must call cmd_free() to free some tags.
6183 */
6184
6185static struct CommandList *cmd_alloc(struct ctlr_info *h)
6186{
6187 struct CommandList *c;
6188 int refcount, i;
6189 int offset = 0;
6190
6191 /*
6192 * There is some *extremely* small but non-zero chance that that
6193 * multiple threads could get in here, and one thread could
6194 * be scanning through the list of bits looking for a free
6195 * one, but the free ones are always behind him, and other
6196 * threads sneak in behind him and eat them before he can
6197 * get to them, so that while there is always a free one, a
6198 * very unlucky thread might be starved anyway, never able to
6199 * beat the other threads. In reality, this happens so
6200 * infrequently as to be indistinguishable from never.
6201 *
6202 * Note that we start allocating commands before the SCSI host structure
6203 * is initialized. Since the search starts at bit zero, this
6204 * all works, since we have at least one command structure available;
6205 * however, it means that the structures with the low indexes have to be
6206 * reserved for driver-initiated requests, while requests from the block
6207 * layer will use the higher indexes.
6208 */
6209
6210 for (;;) {
6211 i = find_next_zero_bit(h->cmd_pool_bits,
6212 HPSA_NRESERVED_CMDS,
6213 offset);
6214 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6215 offset = 0;
6216 continue;
6217 }
6218 c = h->cmd_pool + i;
6219 refcount = atomic_inc_return(&c->refcount);
6220 if (unlikely(refcount > 1)) {
6221 cmd_free(h, c); /* already in use */
6222 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6223 continue;
6224 }
6225 set_bit(i, h->cmd_pool_bits);
6226 break; /* it's ours now. */
6227 }
6228 hpsa_cmd_partial_init(h, i, c);
6229 c->device = NULL;
6230
6231 /*
6232 * cmd_alloc is for "internal" commands and they are never
6233 * retried.
6234 */
6235 c->retry_pending = false;
6236
6237 return c;
6238}
6239
6240/*
6241 * This is the complementary operation to cmd_alloc(). Note, however, in some
6242 * corner cases it may also be used to free blocks allocated by
6243 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6244 * the clear-bit is harmless.
6245 */
6246static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6247{
6248 if (atomic_dec_and_test(&c->refcount)) {
6249 int i;
6250
6251 i = c - h->cmd_pool;
6252 clear_bit(i, h->cmd_pool_bits);
6253 }
6254}
6255
6256#ifdef CONFIG_COMPAT
6257
6258static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
6259 void __user *arg)
6260{
6261 struct ctlr_info *h = sdev_to_hba(dev);
6262 IOCTL32_Command_struct __user *arg32 = arg;
6263 IOCTL_Command_struct arg64;
6264 int err;
6265 u32 cp;
6266
6267 if (!arg)
6268 return -EINVAL;
6269
6270 memset(&arg64, 0, sizeof(arg64));
6271 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
6272 return -EFAULT;
6273 if (get_user(cp, &arg32->buf))
6274 return -EFAULT;
6275 arg64.buf = compat_ptr(cp);
6276
6277 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6278 return -EAGAIN;
6279 err = hpsa_passthru_ioctl(h, &arg64);
6280 atomic_inc(&h->passthru_cmds_avail);
6281 if (err)
6282 return err;
6283 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6284 sizeof(arg32->error_info)))
6285 return -EFAULT;
6286 return 0;
6287}
6288
6289static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6290 unsigned int cmd, void __user *arg)
6291{
6292 struct ctlr_info *h = sdev_to_hba(dev);
6293 BIG_IOCTL32_Command_struct __user *arg32 = arg;
6294 BIG_IOCTL_Command_struct arg64;
6295 int err;
6296 u32 cp;
6297
6298 if (!arg)
6299 return -EINVAL;
6300 memset(&arg64, 0, sizeof(arg64));
6301 if (copy_from_user(&arg64, arg32,
6302 offsetof(BIG_IOCTL32_Command_struct, buf)))
6303 return -EFAULT;
6304 if (get_user(cp, &arg32->buf))
6305 return -EFAULT;
6306 arg64.buf = compat_ptr(cp);
6307
6308 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6309 return -EAGAIN;
6310 err = hpsa_big_passthru_ioctl(h, &arg64);
6311 atomic_inc(&h->passthru_cmds_avail);
6312 if (err)
6313 return err;
6314 if (copy_to_user(&arg32->error_info, &arg64.error_info,
6315 sizeof(arg32->error_info)))
6316 return -EFAULT;
6317 return 0;
6318}
6319
6320static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
6321 void __user *arg)
6322{
6323 switch (cmd) {
6324 case CCISS_GETPCIINFO:
6325 case CCISS_GETINTINFO:
6326 case CCISS_SETINTINFO:
6327 case CCISS_GETNODENAME:
6328 case CCISS_SETNODENAME:
6329 case CCISS_GETHEARTBEAT:
6330 case CCISS_GETBUSTYPES:
6331 case CCISS_GETFIRMVER:
6332 case CCISS_GETDRIVVER:
6333 case CCISS_REVALIDVOLS:
6334 case CCISS_DEREGDISK:
6335 case CCISS_REGNEWDISK:
6336 case CCISS_REGNEWD:
6337 case CCISS_RESCANDISK:
6338 case CCISS_GETLUNINFO:
6339 return hpsa_ioctl(dev, cmd, arg);
6340
6341 case CCISS_PASSTHRU32:
6342 return hpsa_ioctl32_passthru(dev, cmd, arg);
6343 case CCISS_BIG_PASSTHRU32:
6344 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6345
6346 default:
6347 return -ENOIOCTLCMD;
6348 }
6349}
6350#endif
6351
6352static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6353{
6354 struct hpsa_pci_info pciinfo;
6355
6356 if (!argp)
6357 return -EINVAL;
6358 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6359 pciinfo.bus = h->pdev->bus->number;
6360 pciinfo.dev_fn = h->pdev->devfn;
6361 pciinfo.board_id = h->board_id;
6362 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6363 return -EFAULT;
6364 return 0;
6365}
6366
6367static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6368{
6369 DriverVer_type DriverVer;
6370 unsigned char vmaj, vmin, vsubmin;
6371 int rc;
6372
6373 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6374 &vmaj, &vmin, &vsubmin);
6375 if (rc != 3) {
6376 dev_info(&h->pdev->dev, "driver version string '%s' "
6377 "unrecognized.", HPSA_DRIVER_VERSION);
6378 vmaj = 0;
6379 vmin = 0;
6380 vsubmin = 0;
6381 }
6382 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6383 if (!argp)
6384 return -EINVAL;
6385 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6386 return -EFAULT;
6387 return 0;
6388}
6389
6390static int hpsa_passthru_ioctl(struct ctlr_info *h,
6391 IOCTL_Command_struct *iocommand)
6392{
6393 struct CommandList *c;
6394 char *buff = NULL;
6395 u64 temp64;
6396 int rc = 0;
6397
6398 if (!capable(CAP_SYS_RAWIO))
6399 return -EPERM;
6400 if ((iocommand->buf_size < 1) &&
6401 (iocommand->Request.Type.Direction != XFER_NONE)) {
6402 return -EINVAL;
6403 }
6404 if (iocommand->buf_size > 0) {
6405 if (iocommand->Request.Type.Direction & XFER_WRITE) {
6406 buff = memdup_user(iocommand->buf, iocommand->buf_size);
6407 if (IS_ERR(buff))
6408 return PTR_ERR(buff);
6409 } else {
6410 buff = kzalloc(iocommand->buf_size, GFP_KERNEL);
6411 if (!buff)
6412 return -ENOMEM;
6413 }
6414 }
6415 c = cmd_alloc(h);
6416
6417 /* Fill in the command type */
6418 c->cmd_type = CMD_IOCTL_PEND;
6419 c->scsi_cmd = SCSI_CMD_BUSY;
6420 /* Fill in Command Header */
6421 c->Header.ReplyQueue = 0; /* unused in simple mode */
6422 if (iocommand->buf_size > 0) { /* buffer to fill */
6423 c->Header.SGList = 1;
6424 c->Header.SGTotal = cpu_to_le16(1);
6425 } else { /* no buffers to fill */
6426 c->Header.SGList = 0;
6427 c->Header.SGTotal = cpu_to_le16(0);
6428 }
6429 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6430
6431 /* Fill in Request block */
6432 memcpy(&c->Request, &iocommand->Request,
6433 sizeof(c->Request));
6434
6435 /* Fill in the scatter gather information */
6436 if (iocommand->buf_size > 0) {
6437 temp64 = dma_map_single(&h->pdev->dev, buff,
6438 iocommand->buf_size, DMA_BIDIRECTIONAL);
6439 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6440 c->SG[0].Addr = cpu_to_le64(0);
6441 c->SG[0].Len = cpu_to_le32(0);
6442 rc = -ENOMEM;
6443 goto out;
6444 }
6445 c->SG[0].Addr = cpu_to_le64(temp64);
6446 c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
6447 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6448 }
6449 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6450 NO_TIMEOUT);
6451 if (iocommand->buf_size > 0)
6452 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6453 check_ioctl_unit_attention(h, c);
6454 if (rc) {
6455 rc = -EIO;
6456 goto out;
6457 }
6458
6459 /* Copy the error information out */
6460 memcpy(&iocommand->error_info, c->err_info,
6461 sizeof(iocommand->error_info));
6462 if ((iocommand->Request.Type.Direction & XFER_READ) &&
6463 iocommand->buf_size > 0) {
6464 /* Copy the data out of the buffer we created */
6465 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6466 rc = -EFAULT;
6467 goto out;
6468 }
6469 }
6470out:
6471 cmd_free(h, c);
6472 kfree(buff);
6473 return rc;
6474}
6475
6476static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6477 BIG_IOCTL_Command_struct *ioc)
6478{
6479 struct CommandList *c;
6480 unsigned char **buff = NULL;
6481 int *buff_size = NULL;
6482 u64 temp64;
6483 BYTE sg_used = 0;
6484 int status = 0;
6485 u32 left;
6486 u32 sz;
6487 BYTE __user *data_ptr;
6488
6489 if (!capable(CAP_SYS_RAWIO))
6490 return -EPERM;
6491
6492 if ((ioc->buf_size < 1) &&
6493 (ioc->Request.Type.Direction != XFER_NONE))
6494 return -EINVAL;
6495 /* Check kmalloc limits using all SGs */
6496 if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6497 return -EINVAL;
6498 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6499 return -EINVAL;
6500 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6501 if (!buff) {
6502 status = -ENOMEM;
6503 goto cleanup1;
6504 }
6505 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6506 if (!buff_size) {
6507 status = -ENOMEM;
6508 goto cleanup1;
6509 }
6510 left = ioc->buf_size;
6511 data_ptr = ioc->buf;
6512 while (left) {
6513 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6514 buff_size[sg_used] = sz;
6515
6516 if (ioc->Request.Type.Direction & XFER_WRITE) {
6517 buff[sg_used] = memdup_user(data_ptr, sz);
6518 if (IS_ERR(buff[sg_used])) {
6519 status = PTR_ERR(buff[sg_used]);
6520 goto cleanup1;
6521 }
6522 } else {
6523 buff[sg_used] = kzalloc(sz, GFP_KERNEL);
6524 if (!buff[sg_used]) {
6525 status = -ENOMEM;
6526 goto cleanup1;
6527 }
6528 }
6529
6530 left -= sz;
6531 data_ptr += sz;
6532 sg_used++;
6533 }
6534 c = cmd_alloc(h);
6535
6536 c->cmd_type = CMD_IOCTL_PEND;
6537 c->scsi_cmd = SCSI_CMD_BUSY;
6538 c->Header.ReplyQueue = 0;
6539 c->Header.SGList = (u8) sg_used;
6540 c->Header.SGTotal = cpu_to_le16(sg_used);
6541 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6542 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6543 if (ioc->buf_size > 0) {
6544 int i;
6545 for (i = 0; i < sg_used; i++) {
6546 temp64 = dma_map_single(&h->pdev->dev, buff[i],
6547 buff_size[i], DMA_BIDIRECTIONAL);
6548 if (dma_mapping_error(&h->pdev->dev,
6549 (dma_addr_t) temp64)) {
6550 c->SG[i].Addr = cpu_to_le64(0);
6551 c->SG[i].Len = cpu_to_le32(0);
6552 hpsa_pci_unmap(h->pdev, c, i,
6553 DMA_BIDIRECTIONAL);
6554 status = -ENOMEM;
6555 goto cleanup0;
6556 }
6557 c->SG[i].Addr = cpu_to_le64(temp64);
6558 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6559 c->SG[i].Ext = cpu_to_le32(0);
6560 }
6561 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6562 }
6563 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6564 NO_TIMEOUT);
6565 if (sg_used)
6566 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6567 check_ioctl_unit_attention(h, c);
6568 if (status) {
6569 status = -EIO;
6570 goto cleanup0;
6571 }
6572
6573 /* Copy the error information out */
6574 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6575 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6576 int i;
6577
6578 /* Copy the data out of the buffer we created */
6579 BYTE __user *ptr = ioc->buf;
6580 for (i = 0; i < sg_used; i++) {
6581 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6582 status = -EFAULT;
6583 goto cleanup0;
6584 }
6585 ptr += buff_size[i];
6586 }
6587 }
6588 status = 0;
6589cleanup0:
6590 cmd_free(h, c);
6591cleanup1:
6592 if (buff) {
6593 int i;
6594
6595 for (i = 0; i < sg_used; i++)
6596 kfree(buff[i]);
6597 kfree(buff);
6598 }
6599 kfree(buff_size);
6600 return status;
6601}
6602
6603static void check_ioctl_unit_attention(struct ctlr_info *h,
6604 struct CommandList *c)
6605{
6606 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6607 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6608 (void) check_for_unit_attention(h, c);
6609}
6610
6611/*
6612 * ioctl
6613 */
6614static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
6615 void __user *argp)
6616{
6617 struct ctlr_info *h = sdev_to_hba(dev);
6618 int rc;
6619
6620 switch (cmd) {
6621 case CCISS_DEREGDISK:
6622 case CCISS_REGNEWDISK:
6623 case CCISS_REGNEWD:
6624 hpsa_scan_start(h->scsi_host);
6625 return 0;
6626 case CCISS_GETPCIINFO:
6627 return hpsa_getpciinfo_ioctl(h, argp);
6628 case CCISS_GETDRIVVER:
6629 return hpsa_getdrivver_ioctl(h, argp);
6630 case CCISS_PASSTHRU: {
6631 IOCTL_Command_struct iocommand;
6632
6633 if (!argp)
6634 return -EINVAL;
6635 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6636 return -EFAULT;
6637 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6638 return -EAGAIN;
6639 rc = hpsa_passthru_ioctl(h, &iocommand);
6640 atomic_inc(&h->passthru_cmds_avail);
6641 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6642 rc = -EFAULT;
6643 return rc;
6644 }
6645 case CCISS_BIG_PASSTHRU: {
6646 BIG_IOCTL_Command_struct ioc;
6647 if (!argp)
6648 return -EINVAL;
6649 if (copy_from_user(&ioc, argp, sizeof(ioc)))
6650 return -EFAULT;
6651 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6652 return -EAGAIN;
6653 rc = hpsa_big_passthru_ioctl(h, &ioc);
6654 atomic_inc(&h->passthru_cmds_avail);
6655 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6656 rc = -EFAULT;
6657 return rc;
6658 }
6659 default:
6660 return -ENOTTY;
6661 }
6662}
6663
6664static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
6665{
6666 struct CommandList *c;
6667
6668 c = cmd_alloc(h);
6669
6670 /* fill_cmd can't fail here, no data buffer to map */
6671 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6672 RAID_CTLR_LUNID, TYPE_MSG);
6673 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6674 c->waiting = NULL;
6675 enqueue_cmd_and_start_io(h, c);
6676 /* Don't wait for completion, the reset won't complete. Don't free
6677 * the command either. This is the last command we will send before
6678 * re-initializing everything, so it doesn't matter and won't leak.
6679 */
6680 return;
6681}
6682
6683static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6684 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6685 int cmd_type)
6686{
6687 enum dma_data_direction dir = DMA_NONE;
6688
6689 c->cmd_type = CMD_IOCTL_PEND;
6690 c->scsi_cmd = SCSI_CMD_BUSY;
6691 c->Header.ReplyQueue = 0;
6692 if (buff != NULL && size > 0) {
6693 c->Header.SGList = 1;
6694 c->Header.SGTotal = cpu_to_le16(1);
6695 } else {
6696 c->Header.SGList = 0;
6697 c->Header.SGTotal = cpu_to_le16(0);
6698 }
6699 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6700
6701 if (cmd_type == TYPE_CMD) {
6702 switch (cmd) {
6703 case HPSA_INQUIRY:
6704 /* are we trying to read a vital product page */
6705 if (page_code & VPD_PAGE) {
6706 c->Request.CDB[1] = 0x01;
6707 c->Request.CDB[2] = (page_code & 0xff);
6708 }
6709 c->Request.CDBLen = 6;
6710 c->Request.type_attr_dir =
6711 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6712 c->Request.Timeout = 0;
6713 c->Request.CDB[0] = HPSA_INQUIRY;
6714 c->Request.CDB[4] = size & 0xFF;
6715 break;
6716 case RECEIVE_DIAGNOSTIC:
6717 c->Request.CDBLen = 6;
6718 c->Request.type_attr_dir =
6719 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6720 c->Request.Timeout = 0;
6721 c->Request.CDB[0] = cmd;
6722 c->Request.CDB[1] = 1;
6723 c->Request.CDB[2] = 1;
6724 c->Request.CDB[3] = (size >> 8) & 0xFF;
6725 c->Request.CDB[4] = size & 0xFF;
6726 break;
6727 case HPSA_REPORT_LOG:
6728 case HPSA_REPORT_PHYS:
6729 /* Talking to controller so It's a physical command
6730 mode = 00 target = 0. Nothing to write.
6731 */
6732 c->Request.CDBLen = 12;
6733 c->Request.type_attr_dir =
6734 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6735 c->Request.Timeout = 0;
6736 c->Request.CDB[0] = cmd;
6737 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6738 c->Request.CDB[7] = (size >> 16) & 0xFF;
6739 c->Request.CDB[8] = (size >> 8) & 0xFF;
6740 c->Request.CDB[9] = size & 0xFF;
6741 break;
6742 case BMIC_SENSE_DIAG_OPTIONS:
6743 c->Request.CDBLen = 16;
6744 c->Request.type_attr_dir =
6745 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6746 c->Request.Timeout = 0;
6747 /* Spec says this should be BMIC_WRITE */
6748 c->Request.CDB[0] = BMIC_READ;
6749 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6750 break;
6751 case BMIC_SET_DIAG_OPTIONS:
6752 c->Request.CDBLen = 16;
6753 c->Request.type_attr_dir =
6754 TYPE_ATTR_DIR(cmd_type,
6755 ATTR_SIMPLE, XFER_WRITE);
6756 c->Request.Timeout = 0;
6757 c->Request.CDB[0] = BMIC_WRITE;
6758 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6759 break;
6760 case HPSA_CACHE_FLUSH:
6761 c->Request.CDBLen = 12;
6762 c->Request.type_attr_dir =
6763 TYPE_ATTR_DIR(cmd_type,
6764 ATTR_SIMPLE, XFER_WRITE);
6765 c->Request.Timeout = 0;
6766 c->Request.CDB[0] = BMIC_WRITE;
6767 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6768 c->Request.CDB[7] = (size >> 8) & 0xFF;
6769 c->Request.CDB[8] = size & 0xFF;
6770 break;
6771 case TEST_UNIT_READY:
6772 c->Request.CDBLen = 6;
6773 c->Request.type_attr_dir =
6774 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6775 c->Request.Timeout = 0;
6776 break;
6777 case HPSA_GET_RAID_MAP:
6778 c->Request.CDBLen = 12;
6779 c->Request.type_attr_dir =
6780 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6781 c->Request.Timeout = 0;
6782 c->Request.CDB[0] = HPSA_CISS_READ;
6783 c->Request.CDB[1] = cmd;
6784 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6785 c->Request.CDB[7] = (size >> 16) & 0xFF;
6786 c->Request.CDB[8] = (size >> 8) & 0xFF;
6787 c->Request.CDB[9] = size & 0xFF;
6788 break;
6789 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6790 c->Request.CDBLen = 10;
6791 c->Request.type_attr_dir =
6792 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6793 c->Request.Timeout = 0;
6794 c->Request.CDB[0] = BMIC_READ;
6795 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6796 c->Request.CDB[7] = (size >> 16) & 0xFF;
6797 c->Request.CDB[8] = (size >> 8) & 0xFF;
6798 break;
6799 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6800 c->Request.CDBLen = 10;
6801 c->Request.type_attr_dir =
6802 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6803 c->Request.Timeout = 0;
6804 c->Request.CDB[0] = BMIC_READ;
6805 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6806 c->Request.CDB[7] = (size >> 16) & 0xFF;
6807 c->Request.CDB[8] = (size >> 8) & 0XFF;
6808 break;
6809 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6810 c->Request.CDBLen = 10;
6811 c->Request.type_attr_dir =
6812 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6813 c->Request.Timeout = 0;
6814 c->Request.CDB[0] = BMIC_READ;
6815 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6816 c->Request.CDB[7] = (size >> 16) & 0xFF;
6817 c->Request.CDB[8] = (size >> 8) & 0XFF;
6818 break;
6819 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6820 c->Request.CDBLen = 10;
6821 c->Request.type_attr_dir =
6822 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6823 c->Request.Timeout = 0;
6824 c->Request.CDB[0] = BMIC_READ;
6825 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6826 c->Request.CDB[7] = (size >> 16) & 0xFF;
6827 c->Request.CDB[8] = (size >> 8) & 0XFF;
6828 break;
6829 case BMIC_IDENTIFY_CONTROLLER:
6830 c->Request.CDBLen = 10;
6831 c->Request.type_attr_dir =
6832 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6833 c->Request.Timeout = 0;
6834 c->Request.CDB[0] = BMIC_READ;
6835 c->Request.CDB[1] = 0;
6836 c->Request.CDB[2] = 0;
6837 c->Request.CDB[3] = 0;
6838 c->Request.CDB[4] = 0;
6839 c->Request.CDB[5] = 0;
6840 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6841 c->Request.CDB[7] = (size >> 16) & 0xFF;
6842 c->Request.CDB[8] = (size >> 8) & 0XFF;
6843 c->Request.CDB[9] = 0;
6844 break;
6845 default:
6846 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6847 BUG();
6848 }
6849 } else if (cmd_type == TYPE_MSG) {
6850 switch (cmd) {
6851
6852 case HPSA_PHYS_TARGET_RESET:
6853 c->Request.CDBLen = 16;
6854 c->Request.type_attr_dir =
6855 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6856 c->Request.Timeout = 0; /* Don't time out */
6857 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6858 c->Request.CDB[0] = HPSA_RESET;
6859 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6860 /* Physical target reset needs no control bytes 4-7*/
6861 c->Request.CDB[4] = 0x00;
6862 c->Request.CDB[5] = 0x00;
6863 c->Request.CDB[6] = 0x00;
6864 c->Request.CDB[7] = 0x00;
6865 break;
6866 case HPSA_DEVICE_RESET_MSG:
6867 c->Request.CDBLen = 16;
6868 c->Request.type_attr_dir =
6869 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6870 c->Request.Timeout = 0; /* Don't time out */
6871 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6872 c->Request.CDB[0] = cmd;
6873 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6874 /* If bytes 4-7 are zero, it means reset the */
6875 /* LunID device */
6876 c->Request.CDB[4] = 0x00;
6877 c->Request.CDB[5] = 0x00;
6878 c->Request.CDB[6] = 0x00;
6879 c->Request.CDB[7] = 0x00;
6880 break;
6881 default:
6882 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6883 cmd);
6884 BUG();
6885 }
6886 } else {
6887 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6888 BUG();
6889 }
6890
6891 switch (GET_DIR(c->Request.type_attr_dir)) {
6892 case XFER_READ:
6893 dir = DMA_FROM_DEVICE;
6894 break;
6895 case XFER_WRITE:
6896 dir = DMA_TO_DEVICE;
6897 break;
6898 case XFER_NONE:
6899 dir = DMA_NONE;
6900 break;
6901 default:
6902 dir = DMA_BIDIRECTIONAL;
6903 }
6904 if (hpsa_map_one(h->pdev, c, buff, size, dir))
6905 return -1;
6906 return 0;
6907}
6908
6909/*
6910 * Map (physical) PCI mem into (virtual) kernel space
6911 */
6912static void __iomem *remap_pci_mem(ulong base, ulong size)
6913{
6914 ulong page_base = ((ulong) base) & PAGE_MASK;
6915 ulong page_offs = ((ulong) base) - page_base;
6916 void __iomem *page_remapped = ioremap(page_base,
6917 page_offs + size);
6918
6919 return page_remapped ? (page_remapped + page_offs) : NULL;
6920}
6921
6922static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6923{
6924 return h->access.command_completed(h, q);
6925}
6926
6927static inline bool interrupt_pending(struct ctlr_info *h)
6928{
6929 return h->access.intr_pending(h);
6930}
6931
6932static inline long interrupt_not_for_us(struct ctlr_info *h)
6933{
6934 return (h->access.intr_pending(h) == 0) ||
6935 (h->interrupts_enabled == 0);
6936}
6937
6938static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6939 u32 raw_tag)
6940{
6941 if (unlikely(tag_index >= h->nr_cmds)) {
6942 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6943 return 1;
6944 }
6945 return 0;
6946}
6947
6948static inline void finish_cmd(struct CommandList *c)
6949{
6950 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6951 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6952 || c->cmd_type == CMD_IOACCEL2))
6953 complete_scsi_command(c);
6954 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6955 complete(c->waiting);
6956}
6957
6958/* process completion of an indexed ("direct lookup") command */
6959static inline void process_indexed_cmd(struct ctlr_info *h,
6960 u32 raw_tag)
6961{
6962 u32 tag_index;
6963 struct CommandList *c;
6964
6965 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6966 if (!bad_tag(h, tag_index, raw_tag)) {
6967 c = h->cmd_pool + tag_index;
6968 finish_cmd(c);
6969 }
6970}
6971
6972/* Some controllers, like p400, will give us one interrupt
6973 * after a soft reset, even if we turned interrupts off.
6974 * Only need to check for this in the hpsa_xxx_discard_completions
6975 * functions.
6976 */
6977static int ignore_bogus_interrupt(struct ctlr_info *h)
6978{
6979 if (likely(!reset_devices))
6980 return 0;
6981
6982 if (likely(h->interrupts_enabled))
6983 return 0;
6984
6985 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6986 "(known firmware bug.) Ignoring.\n");
6987
6988 return 1;
6989}
6990
6991/*
6992 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6993 * Relies on (h-q[x] == x) being true for x such that
6994 * 0 <= x < MAX_REPLY_QUEUES.
6995 */
6996static struct ctlr_info *queue_to_hba(u8 *queue)
6997{
6998 return container_of((queue - *queue), struct ctlr_info, q[0]);
6999}
7000
7001static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7002{
7003 struct ctlr_info *h = queue_to_hba(queue);
7004 u8 q = *(u8 *) queue;
7005 u32 raw_tag;
7006
7007 if (ignore_bogus_interrupt(h))
7008 return IRQ_NONE;
7009
7010 if (interrupt_not_for_us(h))
7011 return IRQ_NONE;
7012 h->last_intr_timestamp = get_jiffies_64();
7013 while (interrupt_pending(h)) {
7014 raw_tag = get_next_completion(h, q);
7015 while (raw_tag != FIFO_EMPTY)
7016 raw_tag = next_command(h, q);
7017 }
7018 return IRQ_HANDLED;
7019}
7020
7021static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7022{
7023 struct ctlr_info *h = queue_to_hba(queue);
7024 u32 raw_tag;
7025 u8 q = *(u8 *) queue;
7026
7027 if (ignore_bogus_interrupt(h))
7028 return IRQ_NONE;
7029
7030 h->last_intr_timestamp = get_jiffies_64();
7031 raw_tag = get_next_completion(h, q);
7032 while (raw_tag != FIFO_EMPTY)
7033 raw_tag = next_command(h, q);
7034 return IRQ_HANDLED;
7035}
7036
7037static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7038{
7039 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7040 u32 raw_tag;
7041 u8 q = *(u8 *) queue;
7042
7043 if (interrupt_not_for_us(h))
7044 return IRQ_NONE;
7045 h->last_intr_timestamp = get_jiffies_64();
7046 while (interrupt_pending(h)) {
7047 raw_tag = get_next_completion(h, q);
7048 while (raw_tag != FIFO_EMPTY) {
7049 process_indexed_cmd(h, raw_tag);
7050 raw_tag = next_command(h, q);
7051 }
7052 }
7053 return IRQ_HANDLED;
7054}
7055
7056static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7057{
7058 struct ctlr_info *h = queue_to_hba(queue);
7059 u32 raw_tag;
7060 u8 q = *(u8 *) queue;
7061
7062 h->last_intr_timestamp = get_jiffies_64();
7063 raw_tag = get_next_completion(h, q);
7064 while (raw_tag != FIFO_EMPTY) {
7065 process_indexed_cmd(h, raw_tag);
7066 raw_tag = next_command(h, q);
7067 }
7068 return IRQ_HANDLED;
7069}
7070
7071/* Send a message CDB to the firmware. Careful, this only works
7072 * in simple mode, not performant mode due to the tag lookup.
7073 * We only ever use this immediately after a controller reset.
7074 */
7075static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7076 unsigned char type)
7077{
7078 struct Command {
7079 struct CommandListHeader CommandHeader;
7080 struct RequestBlock Request;
7081 struct ErrDescriptor ErrorDescriptor;
7082 };
7083 struct Command *cmd;
7084 static const size_t cmd_sz = sizeof(*cmd) +
7085 sizeof(cmd->ErrorDescriptor);
7086 dma_addr_t paddr64;
7087 __le32 paddr32;
7088 u32 tag;
7089 void __iomem *vaddr;
7090 int i, err;
7091
7092 vaddr = pci_ioremap_bar(pdev, 0);
7093 if (vaddr == NULL)
7094 return -ENOMEM;
7095
7096 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7097 * CCISS commands, so they must be allocated from the lower 4GiB of
7098 * memory.
7099 */
7100 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7101 if (err) {
7102 iounmap(vaddr);
7103 return err;
7104 }
7105
7106 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7107 if (cmd == NULL) {
7108 iounmap(vaddr);
7109 return -ENOMEM;
7110 }
7111
7112 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7113 * although there's no guarantee, we assume that the address is at
7114 * least 4-byte aligned (most likely, it's page-aligned).
7115 */
7116 paddr32 = cpu_to_le32(paddr64);
7117
7118 cmd->CommandHeader.ReplyQueue = 0;
7119 cmd->CommandHeader.SGList = 0;
7120 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7121 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7122 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7123
7124 cmd->Request.CDBLen = 16;
7125 cmd->Request.type_attr_dir =
7126 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7127 cmd->Request.Timeout = 0; /* Don't time out */
7128 cmd->Request.CDB[0] = opcode;
7129 cmd->Request.CDB[1] = type;
7130 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7131 cmd->ErrorDescriptor.Addr =
7132 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7133 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7134
7135 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7136
7137 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7138 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7139 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7140 break;
7141 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7142 }
7143
7144 iounmap(vaddr);
7145
7146 /* we leak the DMA buffer here ... no choice since the controller could
7147 * still complete the command.
7148 */
7149 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7150 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7151 opcode, type);
7152 return -ETIMEDOUT;
7153 }
7154
7155 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7156
7157 if (tag & HPSA_ERROR_BIT) {
7158 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7159 opcode, type);
7160 return -EIO;
7161 }
7162
7163 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7164 opcode, type);
7165 return 0;
7166}
7167
7168#define hpsa_noop(p) hpsa_message(p, 3, 0)
7169
7170static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7171 void __iomem *vaddr, u32 use_doorbell)
7172{
7173
7174 if (use_doorbell) {
7175 /* For everything after the P600, the PCI power state method
7176 * of resetting the controller doesn't work, so we have this
7177 * other way using the doorbell register.
7178 */
7179 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7180 writel(use_doorbell, vaddr + SA5_DOORBELL);
7181
7182 /* PMC hardware guys tell us we need a 10 second delay after
7183 * doorbell reset and before any attempt to talk to the board
7184 * at all to ensure that this actually works and doesn't fall
7185 * over in some weird corner cases.
7186 */
7187 msleep(10000);
7188 } else { /* Try to do it the PCI power state way */
7189
7190 /* Quoting from the Open CISS Specification: "The Power
7191 * Management Control/Status Register (CSR) controls the power
7192 * state of the device. The normal operating state is D0,
7193 * CSR=00h. The software off state is D3, CSR=03h. To reset
7194 * the controller, place the interface device in D3 then to D0,
7195 * this causes a secondary PCI reset which will reset the
7196 * controller." */
7197
7198 int rc = 0;
7199
7200 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7201
7202 /* enter the D3hot power management state */
7203 rc = pci_set_power_state(pdev, PCI_D3hot);
7204 if (rc)
7205 return rc;
7206
7207 msleep(500);
7208
7209 /* enter the D0 power management state */
7210 rc = pci_set_power_state(pdev, PCI_D0);
7211 if (rc)
7212 return rc;
7213
7214 /*
7215 * The P600 requires a small delay when changing states.
7216 * Otherwise we may think the board did not reset and we bail.
7217 * This for kdump only and is particular to the P600.
7218 */
7219 msleep(500);
7220 }
7221 return 0;
7222}
7223
7224static void init_driver_version(char *driver_version, int len)
7225{
7226 strscpy_pad(driver_version, HPSA " " HPSA_DRIVER_VERSION, len);
7227}
7228
7229static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7230{
7231 char *driver_version;
7232 int i, size = sizeof(cfgtable->driver_version);
7233
7234 driver_version = kmalloc(size, GFP_KERNEL);
7235 if (!driver_version)
7236 return -ENOMEM;
7237
7238 init_driver_version(driver_version, size);
7239 for (i = 0; i < size; i++)
7240 writeb(driver_version[i], &cfgtable->driver_version[i]);
7241 kfree(driver_version);
7242 return 0;
7243}
7244
7245static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7246 unsigned char *driver_ver)
7247{
7248 int i;
7249
7250 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7251 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7252}
7253
7254static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7255{
7256
7257 char *driver_ver, *old_driver_ver;
7258 int rc, size = sizeof(cfgtable->driver_version);
7259
7260 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7261 if (!old_driver_ver)
7262 return -ENOMEM;
7263 driver_ver = old_driver_ver + size;
7264
7265 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7266 * should have been changed, otherwise we know the reset failed.
7267 */
7268 init_driver_version(old_driver_ver, size);
7269 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7270 rc = !memcmp(driver_ver, old_driver_ver, size);
7271 kfree(old_driver_ver);
7272 return rc;
7273}
7274/* This does a hard reset of the controller using PCI power management
7275 * states or the using the doorbell register.
7276 */
7277static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7278{
7279 u64 cfg_offset;
7280 u32 cfg_base_addr;
7281 u64 cfg_base_addr_index;
7282 void __iomem *vaddr;
7283 unsigned long paddr;
7284 u32 misc_fw_support;
7285 int rc;
7286 struct CfgTable __iomem *cfgtable;
7287 u32 use_doorbell;
7288 u16 command_register;
7289
7290 /* For controllers as old as the P600, this is very nearly
7291 * the same thing as
7292 *
7293 * pci_save_state(pci_dev);
7294 * pci_set_power_state(pci_dev, PCI_D3hot);
7295 * pci_set_power_state(pci_dev, PCI_D0);
7296 * pci_restore_state(pci_dev);
7297 *
7298 * For controllers newer than the P600, the pci power state
7299 * method of resetting doesn't work so we have another way
7300 * using the doorbell register.
7301 */
7302
7303 if (!ctlr_is_resettable(board_id)) {
7304 dev_warn(&pdev->dev, "Controller not resettable\n");
7305 return -ENODEV;
7306 }
7307
7308 /* if controller is soft- but not hard resettable... */
7309 if (!ctlr_is_hard_resettable(board_id))
7310 return -ENOTSUPP; /* try soft reset later. */
7311
7312 /* Save the PCI command register */
7313 pci_read_config_word(pdev, 4, &command_register);
7314 pci_save_state(pdev);
7315
7316 /* find the first memory BAR, so we can find the cfg table */
7317 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7318 if (rc)
7319 return rc;
7320 vaddr = remap_pci_mem(paddr, 0x250);
7321 if (!vaddr)
7322 return -ENOMEM;
7323
7324 /* find cfgtable in order to check if reset via doorbell is supported */
7325 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7326 &cfg_base_addr_index, &cfg_offset);
7327 if (rc)
7328 goto unmap_vaddr;
7329 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7330 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7331 if (!cfgtable) {
7332 rc = -ENOMEM;
7333 goto unmap_vaddr;
7334 }
7335 rc = write_driver_ver_to_cfgtable(cfgtable);
7336 if (rc)
7337 goto unmap_cfgtable;
7338
7339 /* If reset via doorbell register is supported, use that.
7340 * There are two such methods. Favor the newest method.
7341 */
7342 misc_fw_support = readl(&cfgtable->misc_fw_support);
7343 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7344 if (use_doorbell) {
7345 use_doorbell = DOORBELL_CTLR_RESET2;
7346 } else {
7347 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7348 if (use_doorbell) {
7349 dev_warn(&pdev->dev,
7350 "Soft reset not supported. Firmware update is required.\n");
7351 rc = -ENOTSUPP; /* try soft reset */
7352 goto unmap_cfgtable;
7353 }
7354 }
7355
7356 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7357 if (rc)
7358 goto unmap_cfgtable;
7359
7360 pci_restore_state(pdev);
7361 pci_write_config_word(pdev, 4, command_register);
7362
7363 /* Some devices (notably the HP Smart Array 5i Controller)
7364 need a little pause here */
7365 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7366
7367 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7368 if (rc) {
7369 dev_warn(&pdev->dev,
7370 "Failed waiting for board to become ready after hard reset\n");
7371 goto unmap_cfgtable;
7372 }
7373
7374 rc = controller_reset_failed(vaddr);
7375 if (rc < 0)
7376 goto unmap_cfgtable;
7377 if (rc) {
7378 dev_warn(&pdev->dev, "Unable to successfully reset "
7379 "controller. Will try soft reset.\n");
7380 rc = -ENOTSUPP;
7381 } else {
7382 dev_info(&pdev->dev, "board ready after hard reset.\n");
7383 }
7384
7385unmap_cfgtable:
7386 iounmap(cfgtable);
7387
7388unmap_vaddr:
7389 iounmap(vaddr);
7390 return rc;
7391}
7392
7393/*
7394 * We cannot read the structure directly, for portability we must use
7395 * the io functions.
7396 * This is for debug only.
7397 */
7398static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7399{
7400#ifdef HPSA_DEBUG
7401 int i;
7402 char temp_name[17];
7403
7404 dev_info(dev, "Controller Configuration information\n");
7405 dev_info(dev, "------------------------------------\n");
7406 for (i = 0; i < 4; i++)
7407 temp_name[i] = readb(&(tb->Signature[i]));
7408 temp_name[4] = '\0';
7409 dev_info(dev, " Signature = %s\n", temp_name);
7410 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7411 dev_info(dev, " Transport methods supported = 0x%x\n",
7412 readl(&(tb->TransportSupport)));
7413 dev_info(dev, " Transport methods active = 0x%x\n",
7414 readl(&(tb->TransportActive)));
7415 dev_info(dev, " Requested transport Method = 0x%x\n",
7416 readl(&(tb->HostWrite.TransportRequest)));
7417 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7418 readl(&(tb->HostWrite.CoalIntDelay)));
7419 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7420 readl(&(tb->HostWrite.CoalIntCount)));
7421 dev_info(dev, " Max outstanding commands = %d\n",
7422 readl(&(tb->CmdsOutMax)));
7423 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7424 for (i = 0; i < 16; i++)
7425 temp_name[i] = readb(&(tb->ServerName[i]));
7426 temp_name[16] = '\0';
7427 dev_info(dev, " Server Name = %s\n", temp_name);
7428 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7429 readl(&(tb->HeartBeat)));
7430#endif /* HPSA_DEBUG */
7431}
7432
7433static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7434{
7435 int i, offset, mem_type, bar_type;
7436
7437 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7438 return 0;
7439 offset = 0;
7440 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7441 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7442 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7443 offset += 4;
7444 else {
7445 mem_type = pci_resource_flags(pdev, i) &
7446 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7447 switch (mem_type) {
7448 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7449 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7450 offset += 4; /* 32 bit */
7451 break;
7452 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7453 offset += 8;
7454 break;
7455 default: /* reserved in PCI 2.2 */
7456 dev_warn(&pdev->dev,
7457 "base address is invalid\n");
7458 return -1;
7459 }
7460 }
7461 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7462 return i + 1;
7463 }
7464 return -1;
7465}
7466
7467static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7468{
7469 pci_free_irq_vectors(h->pdev);
7470 h->msix_vectors = 0;
7471}
7472
7473static void hpsa_setup_reply_map(struct ctlr_info *h)
7474{
7475 const struct cpumask *mask;
7476 unsigned int queue, cpu;
7477
7478 for (queue = 0; queue < h->msix_vectors; queue++) {
7479 mask = pci_irq_get_affinity(h->pdev, queue);
7480 if (!mask)
7481 goto fallback;
7482
7483 for_each_cpu(cpu, mask)
7484 h->reply_map[cpu] = queue;
7485 }
7486 return;
7487
7488fallback:
7489 for_each_possible_cpu(cpu)
7490 h->reply_map[cpu] = 0;
7491}
7492
7493/* If MSI/MSI-X is supported by the kernel we will try to enable it on
7494 * controllers that are capable. If not, we use legacy INTx mode.
7495 */
7496static int hpsa_interrupt_mode(struct ctlr_info *h)
7497{
7498 unsigned int flags = PCI_IRQ_INTX;
7499 int ret;
7500
7501 /* Some boards advertise MSI but don't really support it */
7502 switch (h->board_id) {
7503 case 0x40700E11:
7504 case 0x40800E11:
7505 case 0x40820E11:
7506 case 0x40830E11:
7507 break;
7508 default:
7509 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7510 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7511 if (ret > 0) {
7512 h->msix_vectors = ret;
7513 return 0;
7514 }
7515
7516 flags |= PCI_IRQ_MSI;
7517 break;
7518 }
7519
7520 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7521 if (ret < 0)
7522 return ret;
7523 return 0;
7524}
7525
7526static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7527 bool *legacy_board)
7528{
7529 int i;
7530 u32 subsystem_vendor_id, subsystem_device_id;
7531
7532 subsystem_vendor_id = pdev->subsystem_vendor;
7533 subsystem_device_id = pdev->subsystem_device;
7534 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7535 subsystem_vendor_id;
7536
7537 if (legacy_board)
7538 *legacy_board = false;
7539 for (i = 0; i < ARRAY_SIZE(products); i++)
7540 if (*board_id == products[i].board_id) {
7541 if (products[i].access != &SA5A_access &&
7542 products[i].access != &SA5B_access)
7543 return i;
7544 dev_warn(&pdev->dev,
7545 "legacy board ID: 0x%08x\n",
7546 *board_id);
7547 if (legacy_board)
7548 *legacy_board = true;
7549 return i;
7550 }
7551
7552 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7553 if (legacy_board)
7554 *legacy_board = true;
7555 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7556}
7557
7558static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7559 unsigned long *memory_bar)
7560{
7561 int i;
7562
7563 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7564 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7565 /* addressing mode bits already removed */
7566 *memory_bar = pci_resource_start(pdev, i);
7567 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7568 *memory_bar);
7569 return 0;
7570 }
7571 dev_warn(&pdev->dev, "no memory BAR found\n");
7572 return -ENODEV;
7573}
7574
7575static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7576 int wait_for_ready)
7577{
7578 int i, iterations;
7579 u32 scratchpad;
7580 if (wait_for_ready)
7581 iterations = HPSA_BOARD_READY_ITERATIONS;
7582 else
7583 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7584
7585 for (i = 0; i < iterations; i++) {
7586 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7587 if (wait_for_ready) {
7588 if (scratchpad == HPSA_FIRMWARE_READY)
7589 return 0;
7590 } else {
7591 if (scratchpad != HPSA_FIRMWARE_READY)
7592 return 0;
7593 }
7594 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7595 }
7596 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7597 return -ENODEV;
7598}
7599
7600static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7601 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7602 u64 *cfg_offset)
7603{
7604 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7605 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7606 *cfg_base_addr &= (u32) 0x0000ffff;
7607 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7608 if (*cfg_base_addr_index == -1) {
7609 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7610 return -ENODEV;
7611 }
7612 return 0;
7613}
7614
7615static void hpsa_free_cfgtables(struct ctlr_info *h)
7616{
7617 if (h->transtable) {
7618 iounmap(h->transtable);
7619 h->transtable = NULL;
7620 }
7621 if (h->cfgtable) {
7622 iounmap(h->cfgtable);
7623 h->cfgtable = NULL;
7624 }
7625}
7626
7627/* Find and map CISS config table and transfer table
7628 * several items must be unmapped (freed) later
7629 */
7630static int hpsa_find_cfgtables(struct ctlr_info *h)
7631{
7632 u64 cfg_offset;
7633 u32 cfg_base_addr;
7634 u64 cfg_base_addr_index;
7635 u32 trans_offset;
7636 int rc;
7637
7638 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7639 &cfg_base_addr_index, &cfg_offset);
7640 if (rc)
7641 return rc;
7642 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7643 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7644 if (!h->cfgtable) {
7645 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7646 return -ENOMEM;
7647 }
7648 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7649 if (rc)
7650 return rc;
7651 /* Find performant mode table. */
7652 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7653 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7654 cfg_base_addr_index)+cfg_offset+trans_offset,
7655 sizeof(*h->transtable));
7656 if (!h->transtable) {
7657 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7658 hpsa_free_cfgtables(h);
7659 return -ENOMEM;
7660 }
7661 return 0;
7662}
7663
7664static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7665{
7666#define MIN_MAX_COMMANDS 16
7667 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7668
7669 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7670
7671 /* Limit commands in memory limited kdump scenario. */
7672 if (reset_devices && h->max_commands > 32)
7673 h->max_commands = 32;
7674
7675 if (h->max_commands < MIN_MAX_COMMANDS) {
7676 dev_warn(&h->pdev->dev,
7677 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7678 h->max_commands,
7679 MIN_MAX_COMMANDS);
7680 h->max_commands = MIN_MAX_COMMANDS;
7681 }
7682}
7683
7684/* If the controller reports that the total max sg entries is greater than 512,
7685 * then we know that chained SG blocks work. (Original smart arrays did not
7686 * support chained SG blocks and would return zero for max sg entries.)
7687 */
7688static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7689{
7690 return h->maxsgentries > 512;
7691}
7692
7693/* Interrogate the hardware for some limits:
7694 * max commands, max SG elements without chaining, and with chaining,
7695 * SG chain block size, etc.
7696 */
7697static void hpsa_find_board_params(struct ctlr_info *h)
7698{
7699 hpsa_get_max_perf_mode_cmds(h);
7700 h->nr_cmds = h->max_commands;
7701 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7702 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7703 if (hpsa_supports_chained_sg_blocks(h)) {
7704 /* Limit in-command s/g elements to 32 save dma'able memory. */
7705 h->max_cmd_sg_entries = 32;
7706 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7707 h->maxsgentries--; /* save one for chain pointer */
7708 } else {
7709 /*
7710 * Original smart arrays supported at most 31 s/g entries
7711 * embedded inline in the command (trying to use more
7712 * would lock up the controller)
7713 */
7714 h->max_cmd_sg_entries = 31;
7715 h->maxsgentries = 31; /* default to traditional values */
7716 h->chainsize = 0;
7717 }
7718
7719 /* Find out what task management functions are supported and cache */
7720 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7721 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7722 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7723 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7724 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7725 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7726 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7727}
7728
7729static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7730{
7731 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7732 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7733 return false;
7734 }
7735 return true;
7736}
7737
7738static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7739{
7740 u32 driver_support;
7741
7742 driver_support = readl(&(h->cfgtable->driver_support));
7743 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7744#ifdef CONFIG_X86
7745 driver_support |= ENABLE_SCSI_PREFETCH;
7746#endif
7747 driver_support |= ENABLE_UNIT_ATTN;
7748 writel(driver_support, &(h->cfgtable->driver_support));
7749}
7750
7751/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7752 * in a prefetch beyond physical memory.
7753 */
7754static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7755{
7756 u32 dma_prefetch;
7757
7758 if (h->board_id != 0x3225103C)
7759 return;
7760 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7761 dma_prefetch |= 0x8000;
7762 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7763}
7764
7765static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7766{
7767 int i;
7768 u32 doorbell_value;
7769 unsigned long flags;
7770 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7771 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7772 spin_lock_irqsave(&h->lock, flags);
7773 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7774 spin_unlock_irqrestore(&h->lock, flags);
7775 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7776 goto done;
7777 /* delay and try again */
7778 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7779 }
7780 return -ENODEV;
7781done:
7782 return 0;
7783}
7784
7785static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7786{
7787 int i;
7788 u32 doorbell_value;
7789 unsigned long flags;
7790
7791 /* under certain very rare conditions, this can take awhile.
7792 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7793 * as we enter this code.)
7794 */
7795 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7796 if (h->remove_in_progress)
7797 goto done;
7798 spin_lock_irqsave(&h->lock, flags);
7799 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7800 spin_unlock_irqrestore(&h->lock, flags);
7801 if (!(doorbell_value & CFGTBL_ChangeReq))
7802 goto done;
7803 /* delay and try again */
7804 msleep(MODE_CHANGE_WAIT_INTERVAL);
7805 }
7806 return -ENODEV;
7807done:
7808 return 0;
7809}
7810
7811/* return -ENODEV or other reason on error, 0 on success */
7812static int hpsa_enter_simple_mode(struct ctlr_info *h)
7813{
7814 u32 trans_support;
7815
7816 trans_support = readl(&(h->cfgtable->TransportSupport));
7817 if (!(trans_support & SIMPLE_MODE))
7818 return -ENOTSUPP;
7819
7820 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7821
7822 /* Update the field, and then ring the doorbell */
7823 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7824 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7825 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7826 if (hpsa_wait_for_mode_change_ack(h))
7827 goto error;
7828 print_cfg_table(&h->pdev->dev, h->cfgtable);
7829 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7830 goto error;
7831 h->transMethod = CFGTBL_Trans_Simple;
7832 return 0;
7833error:
7834 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7835 return -ENODEV;
7836}
7837
7838/* free items allocated or mapped by hpsa_pci_init */
7839static void hpsa_free_pci_init(struct ctlr_info *h)
7840{
7841 hpsa_free_cfgtables(h); /* pci_init 4 */
7842 iounmap(h->vaddr); /* pci_init 3 */
7843 h->vaddr = NULL;
7844 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7845 /*
7846 * call pci_disable_device before pci_release_regions per
7847 * Documentation/driver-api/pci/pci.rst
7848 */
7849 pci_disable_device(h->pdev); /* pci_init 1 */
7850 pci_release_regions(h->pdev); /* pci_init 2 */
7851}
7852
7853/* several items must be freed later */
7854static int hpsa_pci_init(struct ctlr_info *h)
7855{
7856 int prod_index, err;
7857 bool legacy_board;
7858
7859 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7860 if (prod_index < 0)
7861 return prod_index;
7862 h->product_name = products[prod_index].product_name;
7863 h->access = *(products[prod_index].access);
7864 h->legacy_board = legacy_board;
7865 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7866 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7867
7868 err = pci_enable_device(h->pdev);
7869 if (err) {
7870 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7871 pci_disable_device(h->pdev);
7872 return err;
7873 }
7874
7875 err = pci_request_regions(h->pdev, HPSA);
7876 if (err) {
7877 dev_err(&h->pdev->dev,
7878 "failed to obtain PCI resources\n");
7879 pci_disable_device(h->pdev);
7880 return err;
7881 }
7882
7883 pci_set_master(h->pdev);
7884
7885 err = hpsa_interrupt_mode(h);
7886 if (err)
7887 goto clean1;
7888
7889 /* setup mapping between CPU and reply queue */
7890 hpsa_setup_reply_map(h);
7891
7892 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7893 if (err)
7894 goto clean2; /* intmode+region, pci */
7895 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7896 if (!h->vaddr) {
7897 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7898 err = -ENOMEM;
7899 goto clean2; /* intmode+region, pci */
7900 }
7901 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7902 if (err)
7903 goto clean3; /* vaddr, intmode+region, pci */
7904 err = hpsa_find_cfgtables(h);
7905 if (err)
7906 goto clean3; /* vaddr, intmode+region, pci */
7907 hpsa_find_board_params(h);
7908
7909 if (!hpsa_CISS_signature_present(h)) {
7910 err = -ENODEV;
7911 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7912 }
7913 hpsa_set_driver_support_bits(h);
7914 hpsa_p600_dma_prefetch_quirk(h);
7915 err = hpsa_enter_simple_mode(h);
7916 if (err)
7917 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7918 return 0;
7919
7920clean4: /* cfgtables, vaddr, intmode+region, pci */
7921 hpsa_free_cfgtables(h);
7922clean3: /* vaddr, intmode+region, pci */
7923 iounmap(h->vaddr);
7924 h->vaddr = NULL;
7925clean2: /* intmode+region, pci */
7926 hpsa_disable_interrupt_mode(h);
7927clean1:
7928 /*
7929 * call pci_disable_device before pci_release_regions per
7930 * Documentation/driver-api/pci/pci.rst
7931 */
7932 pci_disable_device(h->pdev);
7933 pci_release_regions(h->pdev);
7934 return err;
7935}
7936
7937static void hpsa_hba_inquiry(struct ctlr_info *h)
7938{
7939 int rc;
7940
7941#define HBA_INQUIRY_BYTE_COUNT 64
7942 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7943 if (!h->hba_inquiry_data)
7944 return;
7945 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7946 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7947 if (rc != 0) {
7948 kfree(h->hba_inquiry_data);
7949 h->hba_inquiry_data = NULL;
7950 }
7951}
7952
7953static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7954{
7955 int rc, i;
7956 void __iomem *vaddr;
7957
7958 if (!reset_devices)
7959 return 0;
7960
7961 /* kdump kernel is loading, we don't know in which state is
7962 * the pci interface. The dev->enable_cnt is equal zero
7963 * so we call enable+disable, wait a while and switch it on.
7964 */
7965 rc = pci_enable_device(pdev);
7966 if (rc) {
7967 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7968 return -ENODEV;
7969 }
7970 pci_disable_device(pdev);
7971 msleep(260); /* a randomly chosen number */
7972 rc = pci_enable_device(pdev);
7973 if (rc) {
7974 dev_warn(&pdev->dev, "failed to enable device.\n");
7975 return -ENODEV;
7976 }
7977
7978 pci_set_master(pdev);
7979
7980 vaddr = pci_ioremap_bar(pdev, 0);
7981 if (vaddr == NULL) {
7982 rc = -ENOMEM;
7983 goto out_disable;
7984 }
7985 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7986 iounmap(vaddr);
7987
7988 /* Reset the controller with a PCI power-cycle or via doorbell */
7989 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7990
7991 /* -ENOTSUPP here means we cannot reset the controller
7992 * but it's already (and still) up and running in
7993 * "performant mode". Or, it might be 640x, which can't reset
7994 * due to concerns about shared bbwc between 6402/6404 pair.
7995 */
7996 if (rc)
7997 goto out_disable;
7998
7999 /* Now try to get the controller to respond to a no-op */
8000 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8001 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8002 if (hpsa_noop(pdev) == 0)
8003 break;
8004 else
8005 dev_warn(&pdev->dev, "no-op failed%s\n",
8006 (i < 11 ? "; re-trying" : ""));
8007 }
8008
8009out_disable:
8010
8011 pci_disable_device(pdev);
8012 return rc;
8013}
8014
8015static void hpsa_free_cmd_pool(struct ctlr_info *h)
8016{
8017 bitmap_free(h->cmd_pool_bits);
8018 h->cmd_pool_bits = NULL;
8019 if (h->cmd_pool) {
8020 dma_free_coherent(&h->pdev->dev,
8021 h->nr_cmds * sizeof(struct CommandList),
8022 h->cmd_pool,
8023 h->cmd_pool_dhandle);
8024 h->cmd_pool = NULL;
8025 h->cmd_pool_dhandle = 0;
8026 }
8027 if (h->errinfo_pool) {
8028 dma_free_coherent(&h->pdev->dev,
8029 h->nr_cmds * sizeof(struct ErrorInfo),
8030 h->errinfo_pool,
8031 h->errinfo_pool_dhandle);
8032 h->errinfo_pool = NULL;
8033 h->errinfo_pool_dhandle = 0;
8034 }
8035}
8036
8037static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
8038{
8039 h->cmd_pool_bits = bitmap_zalloc(h->nr_cmds, GFP_KERNEL);
8040 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
8041 h->nr_cmds * sizeof(*h->cmd_pool),
8042 &h->cmd_pool_dhandle, GFP_KERNEL);
8043 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
8044 h->nr_cmds * sizeof(*h->errinfo_pool),
8045 &h->errinfo_pool_dhandle, GFP_KERNEL);
8046 if ((h->cmd_pool_bits == NULL)
8047 || (h->cmd_pool == NULL)
8048 || (h->errinfo_pool == NULL)) {
8049 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
8050 goto clean_up;
8051 }
8052 hpsa_preinitialize_commands(h);
8053 return 0;
8054clean_up:
8055 hpsa_free_cmd_pool(h);
8056 return -ENOMEM;
8057}
8058
8059/* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8060static void hpsa_free_irqs(struct ctlr_info *h)
8061{
8062 int i;
8063 int irq_vector = 0;
8064
8065 if (hpsa_simple_mode)
8066 irq_vector = h->intr_mode;
8067
8068 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8069 /* Single reply queue, only one irq to free */
8070 free_irq(pci_irq_vector(h->pdev, irq_vector),
8071 &h->q[h->intr_mode]);
8072 h->q[h->intr_mode] = 0;
8073 return;
8074 }
8075
8076 for (i = 0; i < h->msix_vectors; i++) {
8077 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8078 h->q[i] = 0;
8079 }
8080 for (; i < MAX_REPLY_QUEUES; i++)
8081 h->q[i] = 0;
8082}
8083
8084/* returns 0 on success; cleans up and returns -Enn on error */
8085static int hpsa_request_irqs(struct ctlr_info *h,
8086 irqreturn_t (*msixhandler)(int, void *),
8087 irqreturn_t (*intxhandler)(int, void *))
8088{
8089 int rc, i;
8090 int irq_vector = 0;
8091
8092 if (hpsa_simple_mode)
8093 irq_vector = h->intr_mode;
8094
8095 /*
8096 * initialize h->q[x] = x so that interrupt handlers know which
8097 * queue to process.
8098 */
8099 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8100 h->q[i] = (u8) i;
8101
8102 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8103 /* If performant mode and MSI-X, use multiple reply queues */
8104 for (i = 0; i < h->msix_vectors; i++) {
8105 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8106 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8107 0, h->intrname[i],
8108 &h->q[i]);
8109 if (rc) {
8110 int j;
8111
8112 dev_err(&h->pdev->dev,
8113 "failed to get irq %d for %s\n",
8114 pci_irq_vector(h->pdev, i), h->devname);
8115 for (j = 0; j < i; j++) {
8116 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8117 h->q[j] = 0;
8118 }
8119 for (; j < MAX_REPLY_QUEUES; j++)
8120 h->q[j] = 0;
8121 return rc;
8122 }
8123 }
8124 } else {
8125 /* Use single reply pool */
8126 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8127 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8128 h->msix_vectors ? "x" : "");
8129 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8130 msixhandler, 0,
8131 h->intrname[0],
8132 &h->q[h->intr_mode]);
8133 } else {
8134 sprintf(h->intrname[h->intr_mode],
8135 "%s-intx", h->devname);
8136 rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
8137 intxhandler, IRQF_SHARED,
8138 h->intrname[0],
8139 &h->q[h->intr_mode]);
8140 }
8141 }
8142 if (rc) {
8143 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8144 pci_irq_vector(h->pdev, irq_vector), h->devname);
8145 hpsa_free_irqs(h);
8146 return -ENODEV;
8147 }
8148 return 0;
8149}
8150
8151static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8152{
8153 int rc;
8154 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
8155
8156 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8157 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8158 if (rc) {
8159 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8160 return rc;
8161 }
8162
8163 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8164 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8165 if (rc) {
8166 dev_warn(&h->pdev->dev, "Board failed to become ready "
8167 "after soft reset.\n");
8168 return rc;
8169 }
8170
8171 return 0;
8172}
8173
8174static void hpsa_free_reply_queues(struct ctlr_info *h)
8175{
8176 int i;
8177
8178 for (i = 0; i < h->nreply_queues; i++) {
8179 if (!h->reply_queue[i].head)
8180 continue;
8181 dma_free_coherent(&h->pdev->dev,
8182 h->reply_queue_size,
8183 h->reply_queue[i].head,
8184 h->reply_queue[i].busaddr);
8185 h->reply_queue[i].head = NULL;
8186 h->reply_queue[i].busaddr = 0;
8187 }
8188 h->reply_queue_size = 0;
8189}
8190
8191static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8192{
8193 hpsa_free_performant_mode(h); /* init_one 7 */
8194 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8195 hpsa_free_cmd_pool(h); /* init_one 5 */
8196 hpsa_free_irqs(h); /* init_one 4 */
8197 scsi_host_put(h->scsi_host); /* init_one 3 */
8198 h->scsi_host = NULL; /* init_one 3 */
8199 hpsa_free_pci_init(h); /* init_one 2_5 */
8200 free_percpu(h->lockup_detected); /* init_one 2 */
8201 h->lockup_detected = NULL; /* init_one 2 */
8202 if (h->resubmit_wq) {
8203 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8204 h->resubmit_wq = NULL;
8205 }
8206 if (h->rescan_ctlr_wq) {
8207 destroy_workqueue(h->rescan_ctlr_wq);
8208 h->rescan_ctlr_wq = NULL;
8209 }
8210 if (h->monitor_ctlr_wq) {
8211 destroy_workqueue(h->monitor_ctlr_wq);
8212 h->monitor_ctlr_wq = NULL;
8213 }
8214
8215 kfree(h); /* init_one 1 */
8216}
8217
8218/* Called when controller lockup detected. */
8219static void fail_all_outstanding_cmds(struct ctlr_info *h)
8220{
8221 int i, refcount;
8222 struct CommandList *c;
8223 int failcount = 0;
8224
8225 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8226 for (i = 0; i < h->nr_cmds; i++) {
8227 c = h->cmd_pool + i;
8228 refcount = atomic_inc_return(&c->refcount);
8229 if (refcount > 1) {
8230 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8231 finish_cmd(c);
8232 atomic_dec(&h->commands_outstanding);
8233 failcount++;
8234 }
8235 cmd_free(h, c);
8236 }
8237 dev_warn(&h->pdev->dev,
8238 "failed %d commands in fail_all\n", failcount);
8239}
8240
8241static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8242{
8243 int cpu;
8244
8245 for_each_online_cpu(cpu) {
8246 u32 *lockup_detected;
8247 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8248 *lockup_detected = value;
8249 }
8250 wmb(); /* be sure the per-cpu variables are out to memory */
8251}
8252
8253static void controller_lockup_detected(struct ctlr_info *h)
8254{
8255 unsigned long flags;
8256 u32 lockup_detected;
8257
8258 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8259 spin_lock_irqsave(&h->lock, flags);
8260 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8261 if (!lockup_detected) {
8262 /* no heartbeat, but controller gave us a zero. */
8263 dev_warn(&h->pdev->dev,
8264 "lockup detected after %d but scratchpad register is zero\n",
8265 h->heartbeat_sample_interval / HZ);
8266 lockup_detected = 0xffffffff;
8267 }
8268 set_lockup_detected_for_all_cpus(h, lockup_detected);
8269 spin_unlock_irqrestore(&h->lock, flags);
8270 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8271 lockup_detected, h->heartbeat_sample_interval / HZ);
8272 if (lockup_detected == 0xffff0000) {
8273 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8274 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8275 }
8276 pci_disable_device(h->pdev);
8277 fail_all_outstanding_cmds(h);
8278}
8279
8280static int detect_controller_lockup(struct ctlr_info *h)
8281{
8282 u64 now;
8283 u32 heartbeat;
8284 unsigned long flags;
8285
8286 now = get_jiffies_64();
8287 /* If we've received an interrupt recently, we're ok. */
8288 if (time_after64(h->last_intr_timestamp +
8289 (h->heartbeat_sample_interval), now))
8290 return false;
8291
8292 /*
8293 * If we've already checked the heartbeat recently, we're ok.
8294 * This could happen if someone sends us a signal. We
8295 * otherwise don't care about signals in this thread.
8296 */
8297 if (time_after64(h->last_heartbeat_timestamp +
8298 (h->heartbeat_sample_interval), now))
8299 return false;
8300
8301 /* If heartbeat has not changed since we last looked, we're not ok. */
8302 spin_lock_irqsave(&h->lock, flags);
8303 heartbeat = readl(&h->cfgtable->HeartBeat);
8304 spin_unlock_irqrestore(&h->lock, flags);
8305 if (h->last_heartbeat == heartbeat) {
8306 controller_lockup_detected(h);
8307 return true;
8308 }
8309
8310 /* We're ok. */
8311 h->last_heartbeat = heartbeat;
8312 h->last_heartbeat_timestamp = now;
8313 return false;
8314}
8315
8316/*
8317 * Set ioaccel status for all ioaccel volumes.
8318 *
8319 * Called from monitor controller worker (hpsa_event_monitor_worker)
8320 *
8321 * A Volume (or Volumes that comprise an Array set) may be undergoing a
8322 * transformation, so we will be turning off ioaccel for all volumes that
8323 * make up the Array.
8324 */
8325static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8326{
8327 int rc;
8328 int i;
8329 u8 ioaccel_status;
8330 unsigned char *buf;
8331 struct hpsa_scsi_dev_t *device;
8332
8333 if (!h)
8334 return;
8335
8336 buf = kmalloc(64, GFP_KERNEL);
8337 if (!buf)
8338 return;
8339
8340 /*
8341 * Run through current device list used during I/O requests.
8342 */
8343 for (i = 0; i < h->ndevices; i++) {
8344 int offload_to_be_enabled = 0;
8345 int offload_config = 0;
8346
8347 device = h->dev[i];
8348
8349 if (!device)
8350 continue;
8351 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8352 HPSA_VPD_LV_IOACCEL_STATUS))
8353 continue;
8354
8355 memset(buf, 0, 64);
8356
8357 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8358 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8359 buf, 64);
8360 if (rc != 0)
8361 continue;
8362
8363 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8364
8365 /*
8366 * Check if offload is still configured on
8367 */
8368 offload_config =
8369 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8370 /*
8371 * If offload is configured on, check to see if ioaccel
8372 * needs to be enabled.
8373 */
8374 if (offload_config)
8375 offload_to_be_enabled =
8376 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8377
8378 /*
8379 * If ioaccel is to be re-enabled, re-enable later during the
8380 * scan operation so the driver can get a fresh raidmap
8381 * before turning ioaccel back on.
8382 */
8383 if (offload_to_be_enabled)
8384 continue;
8385
8386 /*
8387 * Immediately turn off ioaccel for any volume the
8388 * controller tells us to. Some of the reasons could be:
8389 * transformation - change to the LVs of an Array.
8390 * degraded volume - component failure
8391 */
8392 hpsa_turn_off_ioaccel_for_device(device);
8393 }
8394
8395 kfree(buf);
8396}
8397
8398static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8399{
8400 char *event_type;
8401
8402 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8403 return;
8404
8405 /* Ask the controller to clear the events we're handling. */
8406 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8407 | CFGTBL_Trans_io_accel2)) &&
8408 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8409 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8410
8411 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8412 event_type = "state change";
8413 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8414 event_type = "configuration change";
8415 /* Stop sending new RAID offload reqs via the IO accelerator */
8416 scsi_block_requests(h->scsi_host);
8417 hpsa_set_ioaccel_status(h);
8418 hpsa_drain_accel_commands(h);
8419 /* Set 'accelerator path config change' bit */
8420 dev_warn(&h->pdev->dev,
8421 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8422 h->events, event_type);
8423 writel(h->events, &(h->cfgtable->clear_event_notify));
8424 /* Set the "clear event notify field update" bit 6 */
8425 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8426 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8427 hpsa_wait_for_clear_event_notify_ack(h);
8428 scsi_unblock_requests(h->scsi_host);
8429 } else {
8430 /* Acknowledge controller notification events. */
8431 writel(h->events, &(h->cfgtable->clear_event_notify));
8432 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8433 hpsa_wait_for_clear_event_notify_ack(h);
8434 }
8435 return;
8436}
8437
8438/* Check a register on the controller to see if there are configuration
8439 * changes (added/changed/removed logical drives, etc.) which mean that
8440 * we should rescan the controller for devices.
8441 * Also check flag for driver-initiated rescan.
8442 */
8443static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8444{
8445 if (h->drv_req_rescan) {
8446 h->drv_req_rescan = 0;
8447 return 1;
8448 }
8449
8450 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8451 return 0;
8452
8453 h->events = readl(&(h->cfgtable->event_notify));
8454 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8455}
8456
8457/*
8458 * Check if any of the offline devices have become ready
8459 */
8460static int hpsa_offline_devices_ready(struct ctlr_info *h)
8461{
8462 unsigned long flags;
8463 struct offline_device_entry *d;
8464 struct list_head *this, *tmp;
8465
8466 spin_lock_irqsave(&h->offline_device_lock, flags);
8467 list_for_each_safe(this, tmp, &h->offline_device_list) {
8468 d = list_entry(this, struct offline_device_entry,
8469 offline_list);
8470 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8471 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8472 spin_lock_irqsave(&h->offline_device_lock, flags);
8473 list_del(&d->offline_list);
8474 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8475 return 1;
8476 }
8477 spin_lock_irqsave(&h->offline_device_lock, flags);
8478 }
8479 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8480 return 0;
8481}
8482
8483static int hpsa_luns_changed(struct ctlr_info *h)
8484{
8485 int rc = 1; /* assume there are changes */
8486 struct ReportLUNdata *logdev = NULL;
8487
8488 /* if we can't find out if lun data has changed,
8489 * assume that it has.
8490 */
8491
8492 if (!h->lastlogicals)
8493 return rc;
8494
8495 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8496 if (!logdev)
8497 return rc;
8498
8499 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8500 dev_warn(&h->pdev->dev,
8501 "report luns failed, can't track lun changes.\n");
8502 goto out;
8503 }
8504 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8505 dev_info(&h->pdev->dev,
8506 "Lun changes detected.\n");
8507 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8508 goto out;
8509 } else
8510 rc = 0; /* no changes detected. */
8511out:
8512 kfree(logdev);
8513 return rc;
8514}
8515
8516static void hpsa_perform_rescan(struct ctlr_info *h)
8517{
8518 struct Scsi_Host *sh = NULL;
8519 unsigned long flags;
8520
8521 /*
8522 * Do the scan after the reset
8523 */
8524 spin_lock_irqsave(&h->reset_lock, flags);
8525 if (h->reset_in_progress) {
8526 h->drv_req_rescan = 1;
8527 spin_unlock_irqrestore(&h->reset_lock, flags);
8528 return;
8529 }
8530 spin_unlock_irqrestore(&h->reset_lock, flags);
8531
8532 sh = scsi_host_get(h->scsi_host);
8533 if (sh != NULL) {
8534 hpsa_scan_start(sh);
8535 scsi_host_put(sh);
8536 h->drv_req_rescan = 0;
8537 }
8538}
8539
8540/*
8541 * watch for controller events
8542 */
8543static void hpsa_event_monitor_worker(struct work_struct *work)
8544{
8545 struct ctlr_info *h = container_of(to_delayed_work(work),
8546 struct ctlr_info, event_monitor_work);
8547 unsigned long flags;
8548
8549 spin_lock_irqsave(&h->lock, flags);
8550 if (h->remove_in_progress) {
8551 spin_unlock_irqrestore(&h->lock, flags);
8552 return;
8553 }
8554 spin_unlock_irqrestore(&h->lock, flags);
8555
8556 if (hpsa_ctlr_needs_rescan(h)) {
8557 hpsa_ack_ctlr_events(h);
8558 hpsa_perform_rescan(h);
8559 }
8560
8561 spin_lock_irqsave(&h->lock, flags);
8562 if (!h->remove_in_progress)
8563 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
8564 HPSA_EVENT_MONITOR_INTERVAL);
8565 spin_unlock_irqrestore(&h->lock, flags);
8566}
8567
8568static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8569{
8570 unsigned long flags;
8571 struct ctlr_info *h = container_of(to_delayed_work(work),
8572 struct ctlr_info, rescan_ctlr_work);
8573
8574 spin_lock_irqsave(&h->lock, flags);
8575 if (h->remove_in_progress) {
8576 spin_unlock_irqrestore(&h->lock, flags);
8577 return;
8578 }
8579 spin_unlock_irqrestore(&h->lock, flags);
8580
8581 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8582 hpsa_perform_rescan(h);
8583 } else if (h->discovery_polling) {
8584 if (hpsa_luns_changed(h)) {
8585 dev_info(&h->pdev->dev,
8586 "driver discovery polling rescan.\n");
8587 hpsa_perform_rescan(h);
8588 }
8589 }
8590 spin_lock_irqsave(&h->lock, flags);
8591 if (!h->remove_in_progress)
8592 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8593 h->heartbeat_sample_interval);
8594 spin_unlock_irqrestore(&h->lock, flags);
8595}
8596
8597static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8598{
8599 unsigned long flags;
8600 struct ctlr_info *h = container_of(to_delayed_work(work),
8601 struct ctlr_info, monitor_ctlr_work);
8602
8603 detect_controller_lockup(h);
8604 if (lockup_detected(h))
8605 return;
8606
8607 spin_lock_irqsave(&h->lock, flags);
8608 if (!h->remove_in_progress)
8609 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
8610 h->heartbeat_sample_interval);
8611 spin_unlock_irqrestore(&h->lock, flags);
8612}
8613
8614static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8615 char *name)
8616{
8617 struct workqueue_struct *wq = NULL;
8618
8619 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8620 if (!wq)
8621 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8622
8623 return wq;
8624}
8625
8626static void hpda_free_ctlr_info(struct ctlr_info *h)
8627{
8628 kfree(h->reply_map);
8629 kfree(h);
8630}
8631
8632static struct ctlr_info *hpda_alloc_ctlr_info(void)
8633{
8634 struct ctlr_info *h;
8635
8636 h = kzalloc(sizeof(*h), GFP_KERNEL);
8637 if (!h)
8638 return NULL;
8639
8640 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8641 if (!h->reply_map) {
8642 kfree(h);
8643 return NULL;
8644 }
8645 return h;
8646}
8647
8648static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8649{
8650 int rc;
8651 struct ctlr_info *h;
8652 int try_soft_reset = 0;
8653 unsigned long flags;
8654 u32 board_id;
8655
8656 if (number_of_controllers == 0)
8657 printk(KERN_INFO DRIVER_NAME "\n");
8658
8659 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8660 if (rc < 0) {
8661 dev_warn(&pdev->dev, "Board ID not found\n");
8662 return rc;
8663 }
8664
8665 rc = hpsa_init_reset_devices(pdev, board_id);
8666 if (rc) {
8667 if (rc != -ENOTSUPP)
8668 return rc;
8669 /* If the reset fails in a particular way (it has no way to do
8670 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8671 * a soft reset once we get the controller configured up to the
8672 * point that it can accept a command.
8673 */
8674 try_soft_reset = 1;
8675 rc = 0;
8676 }
8677
8678reinit_after_soft_reset:
8679
8680 /* Command structures must be aligned on a 32-byte boundary because
8681 * the 5 lower bits of the address are used by the hardware. and by
8682 * the driver. See comments in hpsa.h for more info.
8683 */
8684 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8685 h = hpda_alloc_ctlr_info();
8686 if (!h) {
8687 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8688 return -ENOMEM;
8689 }
8690
8691 h->pdev = pdev;
8692
8693 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8694 INIT_LIST_HEAD(&h->offline_device_list);
8695 spin_lock_init(&h->lock);
8696 spin_lock_init(&h->offline_device_lock);
8697 spin_lock_init(&h->scan_lock);
8698 spin_lock_init(&h->reset_lock);
8699 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8700
8701 /* Allocate and clear per-cpu variable lockup_detected */
8702 h->lockup_detected = alloc_percpu(u32);
8703 if (!h->lockup_detected) {
8704 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8705 rc = -ENOMEM;
8706 goto clean1; /* aer/h */
8707 }
8708 set_lockup_detected_for_all_cpus(h, 0);
8709
8710 rc = hpsa_pci_init(h);
8711 if (rc)
8712 goto clean2; /* lu, aer/h */
8713
8714 /* relies on h-> settings made by hpsa_pci_init, including
8715 * interrupt_mode h->intr */
8716 rc = hpsa_scsi_host_alloc(h);
8717 if (rc)
8718 goto clean2_5; /* pci, lu, aer/h */
8719
8720 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8721 h->ctlr = number_of_controllers;
8722 number_of_controllers++;
8723
8724 /* configure PCI DMA stuff */
8725 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
8726 if (rc != 0) {
8727 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
8728 if (rc != 0) {
8729 dev_err(&pdev->dev, "no suitable DMA available\n");
8730 goto clean3; /* shost, pci, lu, aer/h */
8731 }
8732 }
8733
8734 /* make sure the board interrupts are off */
8735 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8736
8737 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8738 if (rc)
8739 goto clean3; /* shost, pci, lu, aer/h */
8740 rc = hpsa_alloc_cmd_pool(h);
8741 if (rc)
8742 goto clean4; /* irq, shost, pci, lu, aer/h */
8743 rc = hpsa_alloc_sg_chain_blocks(h);
8744 if (rc)
8745 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8746 init_waitqueue_head(&h->scan_wait_queue);
8747 init_waitqueue_head(&h->event_sync_wait_queue);
8748 mutex_init(&h->reset_mutex);
8749 h->scan_finished = 1; /* no scan currently in progress */
8750 h->scan_waiting = 0;
8751
8752 pci_set_drvdata(pdev, h);
8753 h->ndevices = 0;
8754
8755 spin_lock_init(&h->devlock);
8756 rc = hpsa_put_ctlr_into_performant_mode(h);
8757 if (rc)
8758 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8759
8760 /* create the resubmit workqueue */
8761 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8762 if (!h->rescan_ctlr_wq) {
8763 rc = -ENOMEM;
8764 goto clean7;
8765 }
8766
8767 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8768 if (!h->resubmit_wq) {
8769 rc = -ENOMEM;
8770 goto clean7; /* aer/h */
8771 }
8772
8773 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
8774 if (!h->monitor_ctlr_wq) {
8775 rc = -ENOMEM;
8776 goto clean7;
8777 }
8778
8779 /*
8780 * At this point, the controller is ready to take commands.
8781 * Now, if reset_devices and the hard reset didn't work, try
8782 * the soft reset and see if that works.
8783 */
8784 if (try_soft_reset) {
8785
8786 /* This is kind of gross. We may or may not get a completion
8787 * from the soft reset command, and if we do, then the value
8788 * from the fifo may or may not be valid. So, we wait 10 secs
8789 * after the reset throwing away any completions we get during
8790 * that time. Unregister the interrupt handler and register
8791 * fake ones to scoop up any residual completions.
8792 */
8793 spin_lock_irqsave(&h->lock, flags);
8794 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8795 spin_unlock_irqrestore(&h->lock, flags);
8796 hpsa_free_irqs(h);
8797 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8798 hpsa_intx_discard_completions);
8799 if (rc) {
8800 dev_warn(&h->pdev->dev,
8801 "Failed to request_irq after soft reset.\n");
8802 /*
8803 * cannot goto clean7 or free_irqs will be called
8804 * again. Instead, do its work
8805 */
8806 hpsa_free_performant_mode(h); /* clean7 */
8807 hpsa_free_sg_chain_blocks(h); /* clean6 */
8808 hpsa_free_cmd_pool(h); /* clean5 */
8809 /*
8810 * skip hpsa_free_irqs(h) clean4 since that
8811 * was just called before request_irqs failed
8812 */
8813 goto clean3;
8814 }
8815
8816 rc = hpsa_kdump_soft_reset(h);
8817 if (rc)
8818 /* Neither hard nor soft reset worked, we're hosed. */
8819 goto clean7;
8820
8821 dev_info(&h->pdev->dev, "Board READY.\n");
8822 dev_info(&h->pdev->dev,
8823 "Waiting for stale completions to drain.\n");
8824 h->access.set_intr_mask(h, HPSA_INTR_ON);
8825 msleep(10000);
8826 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8827
8828 rc = controller_reset_failed(h->cfgtable);
8829 if (rc)
8830 dev_info(&h->pdev->dev,
8831 "Soft reset appears to have failed.\n");
8832
8833 /* since the controller's reset, we have to go back and re-init
8834 * everything. Easiest to just forget what we've done and do it
8835 * all over again.
8836 */
8837 hpsa_undo_allocations_after_kdump_soft_reset(h);
8838 try_soft_reset = 0;
8839 if (rc)
8840 /* don't goto clean, we already unallocated */
8841 return -ENODEV;
8842
8843 goto reinit_after_soft_reset;
8844 }
8845
8846 /* Enable Accelerated IO path at driver layer */
8847 h->acciopath_status = 1;
8848 /* Disable discovery polling.*/
8849 h->discovery_polling = 0;
8850
8851
8852 /* Turn the interrupts on so we can service requests */
8853 h->access.set_intr_mask(h, HPSA_INTR_ON);
8854
8855 hpsa_hba_inquiry(h);
8856
8857 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8858 if (!h->lastlogicals)
8859 dev_info(&h->pdev->dev,
8860 "Can't track change to report lun data\n");
8861
8862 /* hook into SCSI subsystem */
8863 rc = hpsa_scsi_add_host(h);
8864 if (rc)
8865 goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8866
8867 /* Monitor the controller for firmware lockups */
8868 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8869 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8870 schedule_delayed_work(&h->monitor_ctlr_work,
8871 h->heartbeat_sample_interval);
8872 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8873 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8874 h->heartbeat_sample_interval);
8875 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8876 schedule_delayed_work(&h->event_monitor_work,
8877 HPSA_EVENT_MONITOR_INTERVAL);
8878 return 0;
8879
8880clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8881 kfree(h->lastlogicals);
8882clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8883 hpsa_free_performant_mode(h);
8884 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8885clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8886 hpsa_free_sg_chain_blocks(h);
8887clean5: /* cmd, irq, shost, pci, lu, aer/h */
8888 hpsa_free_cmd_pool(h);
8889clean4: /* irq, shost, pci, lu, aer/h */
8890 hpsa_free_irqs(h);
8891clean3: /* shost, pci, lu, aer/h */
8892 scsi_host_put(h->scsi_host);
8893 h->scsi_host = NULL;
8894clean2_5: /* pci, lu, aer/h */
8895 hpsa_free_pci_init(h);
8896clean2: /* lu, aer/h */
8897 if (h->lockup_detected) {
8898 free_percpu(h->lockup_detected);
8899 h->lockup_detected = NULL;
8900 }
8901clean1: /* wq/aer/h */
8902 if (h->resubmit_wq) {
8903 destroy_workqueue(h->resubmit_wq);
8904 h->resubmit_wq = NULL;
8905 }
8906 if (h->rescan_ctlr_wq) {
8907 destroy_workqueue(h->rescan_ctlr_wq);
8908 h->rescan_ctlr_wq = NULL;
8909 }
8910 if (h->monitor_ctlr_wq) {
8911 destroy_workqueue(h->monitor_ctlr_wq);
8912 h->monitor_ctlr_wq = NULL;
8913 }
8914 hpda_free_ctlr_info(h);
8915 return rc;
8916}
8917
8918static void hpsa_flush_cache(struct ctlr_info *h)
8919{
8920 char *flush_buf;
8921 struct CommandList *c;
8922 int rc;
8923
8924 if (unlikely(lockup_detected(h)))
8925 return;
8926 flush_buf = kzalloc(4, GFP_KERNEL);
8927 if (!flush_buf)
8928 return;
8929
8930 c = cmd_alloc(h);
8931
8932 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8933 RAID_CTLR_LUNID, TYPE_CMD)) {
8934 goto out;
8935 }
8936 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8937 DEFAULT_TIMEOUT);
8938 if (rc)
8939 goto out;
8940 if (c->err_info->CommandStatus != 0)
8941out:
8942 dev_warn(&h->pdev->dev,
8943 "error flushing cache on controller\n");
8944 cmd_free(h, c);
8945 kfree(flush_buf);
8946}
8947
8948/* Make controller gather fresh report lun data each time we
8949 * send down a report luns request
8950 */
8951static void hpsa_disable_rld_caching(struct ctlr_info *h)
8952{
8953 u32 *options;
8954 struct CommandList *c;
8955 int rc;
8956
8957 /* Don't bother trying to set diag options if locked up */
8958 if (unlikely(h->lockup_detected))
8959 return;
8960
8961 options = kzalloc(sizeof(*options), GFP_KERNEL);
8962 if (!options)
8963 return;
8964
8965 c = cmd_alloc(h);
8966
8967 /* first, get the current diag options settings */
8968 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8969 RAID_CTLR_LUNID, TYPE_CMD))
8970 goto errout;
8971
8972 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8973 NO_TIMEOUT);
8974 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8975 goto errout;
8976
8977 /* Now, set the bit for disabling the RLD caching */
8978 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8979
8980 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8981 RAID_CTLR_LUNID, TYPE_CMD))
8982 goto errout;
8983
8984 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
8985 NO_TIMEOUT);
8986 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8987 goto errout;
8988
8989 /* Now verify that it got set: */
8990 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8991 RAID_CTLR_LUNID, TYPE_CMD))
8992 goto errout;
8993
8994 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
8995 NO_TIMEOUT);
8996 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8997 goto errout;
8998
8999 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9000 goto out;
9001
9002errout:
9003 dev_err(&h->pdev->dev,
9004 "Error: failed to disable report lun data caching.\n");
9005out:
9006 cmd_free(h, c);
9007 kfree(options);
9008}
9009
9010static void __hpsa_shutdown(struct pci_dev *pdev)
9011{
9012 struct ctlr_info *h;
9013
9014 h = pci_get_drvdata(pdev);
9015 /* Turn board interrupts off and send the flush cache command
9016 * sendcmd will turn off interrupt, and send the flush...
9017 * To write all data in the battery backed cache to disks
9018 */
9019 hpsa_flush_cache(h);
9020 h->access.set_intr_mask(h, HPSA_INTR_OFF);
9021 hpsa_free_irqs(h); /* init_one 4 */
9022 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
9023}
9024
9025static void hpsa_shutdown(struct pci_dev *pdev)
9026{
9027 __hpsa_shutdown(pdev);
9028 pci_disable_device(pdev);
9029}
9030
9031static void hpsa_free_device_info(struct ctlr_info *h)
9032{
9033 int i;
9034
9035 for (i = 0; i < h->ndevices; i++) {
9036 kfree(h->dev[i]);
9037 h->dev[i] = NULL;
9038 }
9039}
9040
9041static void hpsa_remove_one(struct pci_dev *pdev)
9042{
9043 struct ctlr_info *h;
9044 unsigned long flags;
9045
9046 if (pci_get_drvdata(pdev) == NULL) {
9047 dev_err(&pdev->dev, "unable to remove device\n");
9048 return;
9049 }
9050 h = pci_get_drvdata(pdev);
9051
9052 /* Get rid of any controller monitoring work items */
9053 spin_lock_irqsave(&h->lock, flags);
9054 h->remove_in_progress = 1;
9055 spin_unlock_irqrestore(&h->lock, flags);
9056 cancel_delayed_work_sync(&h->monitor_ctlr_work);
9057 cancel_delayed_work_sync(&h->rescan_ctlr_work);
9058 cancel_delayed_work_sync(&h->event_monitor_work);
9059 destroy_workqueue(h->rescan_ctlr_wq);
9060 destroy_workqueue(h->resubmit_wq);
9061 destroy_workqueue(h->monitor_ctlr_wq);
9062
9063 hpsa_delete_sas_host(h);
9064
9065 /*
9066 * Call before disabling interrupts.
9067 * scsi_remove_host can trigger I/O operations especially
9068 * when multipath is enabled. There can be SYNCHRONIZE CACHE
9069 * operations which cannot complete and will hang the system.
9070 */
9071 if (h->scsi_host)
9072 scsi_remove_host(h->scsi_host); /* init_one 8 */
9073 /* includes hpsa_free_irqs - init_one 4 */
9074 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9075 __hpsa_shutdown(pdev);
9076
9077 hpsa_free_device_info(h); /* scan */
9078
9079 kfree(h->hba_inquiry_data); /* init_one 10 */
9080 h->hba_inquiry_data = NULL; /* init_one 10 */
9081 hpsa_free_ioaccel2_sg_chain_blocks(h);
9082 hpsa_free_performant_mode(h); /* init_one 7 */
9083 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
9084 hpsa_free_cmd_pool(h); /* init_one 5 */
9085 kfree(h->lastlogicals);
9086
9087 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9088
9089 scsi_host_put(h->scsi_host); /* init_one 3 */
9090 h->scsi_host = NULL; /* init_one 3 */
9091
9092 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
9093 hpsa_free_pci_init(h); /* init_one 2.5 */
9094
9095 free_percpu(h->lockup_detected); /* init_one 2 */
9096 h->lockup_detected = NULL; /* init_one 2 */
9097
9098 hpda_free_ctlr_info(h); /* init_one 1 */
9099}
9100
9101static int __maybe_unused hpsa_suspend(
9102 __attribute__((unused)) struct device *dev)
9103{
9104 return -ENOSYS;
9105}
9106
9107static int __maybe_unused hpsa_resume
9108 (__attribute__((unused)) struct device *dev)
9109{
9110 return -ENOSYS;
9111}
9112
9113static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume);
9114
9115static struct pci_driver hpsa_pci_driver = {
9116 .name = HPSA,
9117 .probe = hpsa_init_one,
9118 .remove = hpsa_remove_one,
9119 .id_table = hpsa_pci_device_id, /* id_table */
9120 .shutdown = hpsa_shutdown,
9121 .driver.pm = &hpsa_pm_ops,
9122};
9123
9124/* Fill in bucket_map[], given nsgs (the max number of
9125 * scatter gather elements supported) and bucket[],
9126 * which is an array of 8 integers. The bucket[] array
9127 * contains 8 different DMA transfer sizes (in 16
9128 * byte increments) which the controller uses to fetch
9129 * commands. This function fills in bucket_map[], which
9130 * maps a given number of scatter gather elements to one of
9131 * the 8 DMA transfer sizes. The point of it is to allow the
9132 * controller to only do as much DMA as needed to fetch the
9133 * command, with the DMA transfer size encoded in the lower
9134 * bits of the command address.
9135 */
9136static void calc_bucket_map(int bucket[], int num_buckets,
9137 int nsgs, int min_blocks, u32 *bucket_map)
9138{
9139 int i, j, b, size;
9140
9141 /* Note, bucket_map must have nsgs+1 entries. */
9142 for (i = 0; i <= nsgs; i++) {
9143 /* Compute size of a command with i SG entries */
9144 size = i + min_blocks;
9145 b = num_buckets; /* Assume the biggest bucket */
9146 /* Find the bucket that is just big enough */
9147 for (j = 0; j < num_buckets; j++) {
9148 if (bucket[j] >= size) {
9149 b = j;
9150 break;
9151 }
9152 }
9153 /* for a command with i SG entries, use bucket b. */
9154 bucket_map[i] = b;
9155 }
9156}
9157
9158/*
9159 * return -ENODEV on err, 0 on success (or no action)
9160 * allocates numerous items that must be freed later
9161 */
9162static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9163{
9164 int i;
9165 unsigned long register_value;
9166 unsigned long transMethod = CFGTBL_Trans_Performant |
9167 (trans_support & CFGTBL_Trans_use_short_tags) |
9168 CFGTBL_Trans_enable_directed_msix |
9169 (trans_support & (CFGTBL_Trans_io_accel1 |
9170 CFGTBL_Trans_io_accel2));
9171 struct access_method access = SA5_performant_access;
9172
9173 /* This is a bit complicated. There are 8 registers on
9174 * the controller which we write to to tell it 8 different
9175 * sizes of commands which there may be. It's a way of
9176 * reducing the DMA done to fetch each command. Encoded into
9177 * each command's tag are 3 bits which communicate to the controller
9178 * which of the eight sizes that command fits within. The size of
9179 * each command depends on how many scatter gather entries there are.
9180 * Each SG entry requires 16 bytes. The eight registers are programmed
9181 * with the number of 16-byte blocks a command of that size requires.
9182 * The smallest command possible requires 5 such 16 byte blocks.
9183 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9184 * blocks. Note, this only extends to the SG entries contained
9185 * within the command block, and does not extend to chained blocks
9186 * of SG elements. bft[] contains the eight values we write to
9187 * the registers. They are not evenly distributed, but have more
9188 * sizes for small commands, and fewer sizes for larger commands.
9189 */
9190 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9191#define MIN_IOACCEL2_BFT_ENTRY 5
9192#define HPSA_IOACCEL2_HEADER_SZ 4
9193 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9194 13, 14, 15, 16, 17, 18, 19,
9195 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9196 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9197 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9198 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9199 16 * MIN_IOACCEL2_BFT_ENTRY);
9200 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9201 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9202 /* 5 = 1 s/g entry or 4k
9203 * 6 = 2 s/g entry or 8k
9204 * 8 = 4 s/g entry or 16k
9205 * 10 = 6 s/g entry or 24k
9206 */
9207
9208 /* If the controller supports either ioaccel method then
9209 * we can also use the RAID stack submit path that does not
9210 * perform the superfluous readl() after each command submission.
9211 */
9212 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9213 access = SA5_performant_access_no_read;
9214
9215 /* Controller spec: zero out this buffer. */
9216 for (i = 0; i < h->nreply_queues; i++)
9217 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9218
9219 bft[7] = SG_ENTRIES_IN_CMD + 4;
9220 calc_bucket_map(bft, ARRAY_SIZE(bft),
9221 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9222 for (i = 0; i < 8; i++)
9223 writel(bft[i], &h->transtable->BlockFetch[i]);
9224
9225 /* size of controller ring buffer */
9226 writel(h->max_commands, &h->transtable->RepQSize);
9227 writel(h->nreply_queues, &h->transtable->RepQCount);
9228 writel(0, &h->transtable->RepQCtrAddrLow32);
9229 writel(0, &h->transtable->RepQCtrAddrHigh32);
9230
9231 for (i = 0; i < h->nreply_queues; i++) {
9232 writel(0, &h->transtable->RepQAddr[i].upper);
9233 writel(h->reply_queue[i].busaddr,
9234 &h->transtable->RepQAddr[i].lower);
9235 }
9236
9237 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9238 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9239 /*
9240 * enable outbound interrupt coalescing in accelerator mode;
9241 */
9242 if (trans_support & CFGTBL_Trans_io_accel1) {
9243 access = SA5_ioaccel_mode1_access;
9244 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9245 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9246 } else
9247 if (trans_support & CFGTBL_Trans_io_accel2)
9248 access = SA5_ioaccel_mode2_access;
9249 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9250 if (hpsa_wait_for_mode_change_ack(h)) {
9251 dev_err(&h->pdev->dev,
9252 "performant mode problem - doorbell timeout\n");
9253 return -ENODEV;
9254 }
9255 register_value = readl(&(h->cfgtable->TransportActive));
9256 if (!(register_value & CFGTBL_Trans_Performant)) {
9257 dev_err(&h->pdev->dev,
9258 "performant mode problem - transport not active\n");
9259 return -ENODEV;
9260 }
9261 /* Change the access methods to the performant access methods */
9262 h->access = access;
9263 h->transMethod = transMethod;
9264
9265 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9266 (trans_support & CFGTBL_Trans_io_accel2)))
9267 return 0;
9268
9269 if (trans_support & CFGTBL_Trans_io_accel1) {
9270 /* Set up I/O accelerator mode */
9271 for (i = 0; i < h->nreply_queues; i++) {
9272 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9273 h->reply_queue[i].current_entry =
9274 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9275 }
9276 bft[7] = h->ioaccel_maxsg + 8;
9277 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9278 h->ioaccel1_blockFetchTable);
9279
9280 /* initialize all reply queue entries to unused */
9281 for (i = 0; i < h->nreply_queues; i++)
9282 memset(h->reply_queue[i].head,
9283 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9284 h->reply_queue_size);
9285
9286 /* set all the constant fields in the accelerator command
9287 * frames once at init time to save CPU cycles later.
9288 */
9289 for (i = 0; i < h->nr_cmds; i++) {
9290 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9291
9292 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9293 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9294 (i * sizeof(struct ErrorInfo)));
9295 cp->err_info_len = sizeof(struct ErrorInfo);
9296 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9297 cp->host_context_flags =
9298 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9299 cp->timeout_sec = 0;
9300 cp->ReplyQueue = 0;
9301 cp->tag =
9302 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9303 cp->host_addr =
9304 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9305 (i * sizeof(struct io_accel1_cmd)));
9306 }
9307 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9308 u64 cfg_offset, cfg_base_addr_index;
9309 u32 bft2_offset, cfg_base_addr;
9310
9311 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9312 &cfg_base_addr_index, &cfg_offset);
9313 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9314 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9315 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9316 4, h->ioaccel2_blockFetchTable);
9317 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9318 BUILD_BUG_ON(offsetof(struct CfgTable,
9319 io_accel_request_size_offset) != 0xb8);
9320 h->ioaccel2_bft2_regs =
9321 remap_pci_mem(pci_resource_start(h->pdev,
9322 cfg_base_addr_index) +
9323 cfg_offset + bft2_offset,
9324 ARRAY_SIZE(bft2) *
9325 sizeof(*h->ioaccel2_bft2_regs));
9326 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9327 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9328 }
9329 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9330 if (hpsa_wait_for_mode_change_ack(h)) {
9331 dev_err(&h->pdev->dev,
9332 "performant mode problem - enabling ioaccel mode\n");
9333 return -ENODEV;
9334 }
9335 return 0;
9336}
9337
9338/* Free ioaccel1 mode command blocks and block fetch table */
9339static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9340{
9341 if (h->ioaccel_cmd_pool) {
9342 dma_free_coherent(&h->pdev->dev,
9343 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9344 h->ioaccel_cmd_pool,
9345 h->ioaccel_cmd_pool_dhandle);
9346 h->ioaccel_cmd_pool = NULL;
9347 h->ioaccel_cmd_pool_dhandle = 0;
9348 }
9349 kfree(h->ioaccel1_blockFetchTable);
9350 h->ioaccel1_blockFetchTable = NULL;
9351}
9352
9353/* Allocate ioaccel1 mode command blocks and block fetch table */
9354static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9355{
9356 h->ioaccel_maxsg =
9357 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9358 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9359 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9360
9361 /* Command structures must be aligned on a 128-byte boundary
9362 * because the 7 lower bits of the address are used by the
9363 * hardware.
9364 */
9365 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9366 IOACCEL1_COMMANDLIST_ALIGNMENT);
9367 h->ioaccel_cmd_pool =
9368 dma_alloc_coherent(&h->pdev->dev,
9369 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9370 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9371
9372 h->ioaccel1_blockFetchTable =
9373 kmalloc(((h->ioaccel_maxsg + 1) *
9374 sizeof(u32)), GFP_KERNEL);
9375
9376 if ((h->ioaccel_cmd_pool == NULL) ||
9377 (h->ioaccel1_blockFetchTable == NULL))
9378 goto clean_up;
9379
9380 memset(h->ioaccel_cmd_pool, 0,
9381 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9382 return 0;
9383
9384clean_up:
9385 hpsa_free_ioaccel1_cmd_and_bft(h);
9386 return -ENOMEM;
9387}
9388
9389/* Free ioaccel2 mode command blocks and block fetch table */
9390static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9391{
9392 hpsa_free_ioaccel2_sg_chain_blocks(h);
9393
9394 if (h->ioaccel2_cmd_pool) {
9395 dma_free_coherent(&h->pdev->dev,
9396 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9397 h->ioaccel2_cmd_pool,
9398 h->ioaccel2_cmd_pool_dhandle);
9399 h->ioaccel2_cmd_pool = NULL;
9400 h->ioaccel2_cmd_pool_dhandle = 0;
9401 }
9402 kfree(h->ioaccel2_blockFetchTable);
9403 h->ioaccel2_blockFetchTable = NULL;
9404}
9405
9406/* Allocate ioaccel2 mode command blocks and block fetch table */
9407static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9408{
9409 int rc;
9410
9411 /* Allocate ioaccel2 mode command blocks and block fetch table */
9412
9413 h->ioaccel_maxsg =
9414 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9415 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9416 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9417
9418 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9419 IOACCEL2_COMMANDLIST_ALIGNMENT);
9420 h->ioaccel2_cmd_pool =
9421 dma_alloc_coherent(&h->pdev->dev,
9422 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9423 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9424
9425 h->ioaccel2_blockFetchTable =
9426 kmalloc(((h->ioaccel_maxsg + 1) *
9427 sizeof(u32)), GFP_KERNEL);
9428
9429 if ((h->ioaccel2_cmd_pool == NULL) ||
9430 (h->ioaccel2_blockFetchTable == NULL)) {
9431 rc = -ENOMEM;
9432 goto clean_up;
9433 }
9434
9435 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9436 if (rc)
9437 goto clean_up;
9438
9439 memset(h->ioaccel2_cmd_pool, 0,
9440 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9441 return 0;
9442
9443clean_up:
9444 hpsa_free_ioaccel2_cmd_and_bft(h);
9445 return rc;
9446}
9447
9448/* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9449static void hpsa_free_performant_mode(struct ctlr_info *h)
9450{
9451 kfree(h->blockFetchTable);
9452 h->blockFetchTable = NULL;
9453 hpsa_free_reply_queues(h);
9454 hpsa_free_ioaccel1_cmd_and_bft(h);
9455 hpsa_free_ioaccel2_cmd_and_bft(h);
9456}
9457
9458/* return -ENODEV on error, 0 on success (or no action)
9459 * allocates numerous items that must be freed later
9460 */
9461static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9462{
9463 u32 trans_support;
9464 int i, rc;
9465
9466 if (hpsa_simple_mode)
9467 return 0;
9468
9469 trans_support = readl(&(h->cfgtable->TransportSupport));
9470 if (!(trans_support & PERFORMANT_MODE))
9471 return 0;
9472
9473 /* Check for I/O accelerator mode support */
9474 if (trans_support & CFGTBL_Trans_io_accel1) {
9475 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9476 if (rc)
9477 return rc;
9478 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9479 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9480 if (rc)
9481 return rc;
9482 }
9483
9484 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9485 hpsa_get_max_perf_mode_cmds(h);
9486 /* Performant mode ring buffer and supporting data structures */
9487 h->reply_queue_size = h->max_commands * sizeof(u64);
9488
9489 for (i = 0; i < h->nreply_queues; i++) {
9490 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9491 h->reply_queue_size,
9492 &h->reply_queue[i].busaddr,
9493 GFP_KERNEL);
9494 if (!h->reply_queue[i].head) {
9495 rc = -ENOMEM;
9496 goto clean1; /* rq, ioaccel */
9497 }
9498 h->reply_queue[i].size = h->max_commands;
9499 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9500 h->reply_queue[i].current_entry = 0;
9501 }
9502
9503 /* Need a block fetch table for performant mode */
9504 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9505 sizeof(u32)), GFP_KERNEL);
9506 if (!h->blockFetchTable) {
9507 rc = -ENOMEM;
9508 goto clean1; /* rq, ioaccel */
9509 }
9510
9511 rc = hpsa_enter_performant_mode(h, trans_support);
9512 if (rc)
9513 goto clean2; /* bft, rq, ioaccel */
9514 return 0;
9515
9516clean2: /* bft, rq, ioaccel */
9517 kfree(h->blockFetchTable);
9518 h->blockFetchTable = NULL;
9519clean1: /* rq, ioaccel */
9520 hpsa_free_reply_queues(h);
9521 hpsa_free_ioaccel1_cmd_and_bft(h);
9522 hpsa_free_ioaccel2_cmd_and_bft(h);
9523 return rc;
9524}
9525
9526static int is_accelerated_cmd(struct CommandList *c)
9527{
9528 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9529}
9530
9531static void hpsa_drain_accel_commands(struct ctlr_info *h)
9532{
9533 struct CommandList *c = NULL;
9534 int i, accel_cmds_out;
9535 int refcount;
9536
9537 do { /* wait for all outstanding ioaccel commands to drain out */
9538 accel_cmds_out = 0;
9539 for (i = 0; i < h->nr_cmds; i++) {
9540 c = h->cmd_pool + i;
9541 refcount = atomic_inc_return(&c->refcount);
9542 if (refcount > 1) /* Command is allocated */
9543 accel_cmds_out += is_accelerated_cmd(c);
9544 cmd_free(h, c);
9545 }
9546 if (accel_cmds_out <= 0)
9547 break;
9548 msleep(100);
9549 } while (1);
9550}
9551
9552static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9553 struct hpsa_sas_port *hpsa_sas_port)
9554{
9555 struct hpsa_sas_phy *hpsa_sas_phy;
9556 struct sas_phy *phy;
9557
9558 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9559 if (!hpsa_sas_phy)
9560 return NULL;
9561
9562 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9563 hpsa_sas_port->next_phy_index);
9564 if (!phy) {
9565 kfree(hpsa_sas_phy);
9566 return NULL;
9567 }
9568
9569 hpsa_sas_port->next_phy_index++;
9570 hpsa_sas_phy->phy = phy;
9571 hpsa_sas_phy->parent_port = hpsa_sas_port;
9572
9573 return hpsa_sas_phy;
9574}
9575
9576static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9577{
9578 struct sas_phy *phy = hpsa_sas_phy->phy;
9579
9580 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9581 if (hpsa_sas_phy->added_to_port)
9582 list_del(&hpsa_sas_phy->phy_list_entry);
9583 sas_phy_delete(phy);
9584 kfree(hpsa_sas_phy);
9585}
9586
9587static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9588{
9589 int rc;
9590 struct hpsa_sas_port *hpsa_sas_port;
9591 struct sas_phy *phy;
9592 struct sas_identify *identify;
9593
9594 hpsa_sas_port = hpsa_sas_phy->parent_port;
9595 phy = hpsa_sas_phy->phy;
9596
9597 identify = &phy->identify;
9598 memset(identify, 0, sizeof(*identify));
9599 identify->sas_address = hpsa_sas_port->sas_address;
9600 identify->device_type = SAS_END_DEVICE;
9601 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9602 identify->target_port_protocols = SAS_PROTOCOL_STP;
9603 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9604 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9605 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9606 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9607 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9608
9609 rc = sas_phy_add(hpsa_sas_phy->phy);
9610 if (rc)
9611 return rc;
9612
9613 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9614 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9615 &hpsa_sas_port->phy_list_head);
9616 hpsa_sas_phy->added_to_port = true;
9617
9618 return 0;
9619}
9620
9621static int
9622 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9623 struct sas_rphy *rphy)
9624{
9625 struct sas_identify *identify;
9626
9627 identify = &rphy->identify;
9628 identify->sas_address = hpsa_sas_port->sas_address;
9629 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9630 identify->target_port_protocols = SAS_PROTOCOL_STP;
9631
9632 return sas_rphy_add(rphy);
9633}
9634
9635static struct hpsa_sas_port
9636 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9637 u64 sas_address)
9638{
9639 int rc;
9640 struct hpsa_sas_port *hpsa_sas_port;
9641 struct sas_port *port;
9642
9643 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9644 if (!hpsa_sas_port)
9645 return NULL;
9646
9647 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9648 hpsa_sas_port->parent_node = hpsa_sas_node;
9649
9650 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9651 if (!port)
9652 goto free_hpsa_port;
9653
9654 rc = sas_port_add(port);
9655 if (rc)
9656 goto free_sas_port;
9657
9658 hpsa_sas_port->port = port;
9659 hpsa_sas_port->sas_address = sas_address;
9660 list_add_tail(&hpsa_sas_port->port_list_entry,
9661 &hpsa_sas_node->port_list_head);
9662
9663 return hpsa_sas_port;
9664
9665free_sas_port:
9666 sas_port_free(port);
9667free_hpsa_port:
9668 kfree(hpsa_sas_port);
9669
9670 return NULL;
9671}
9672
9673static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9674{
9675 struct hpsa_sas_phy *hpsa_sas_phy;
9676 struct hpsa_sas_phy *next;
9677
9678 list_for_each_entry_safe(hpsa_sas_phy, next,
9679 &hpsa_sas_port->phy_list_head, phy_list_entry)
9680 hpsa_free_sas_phy(hpsa_sas_phy);
9681
9682 sas_port_delete(hpsa_sas_port->port);
9683 list_del(&hpsa_sas_port->port_list_entry);
9684 kfree(hpsa_sas_port);
9685}
9686
9687static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9688{
9689 struct hpsa_sas_node *hpsa_sas_node;
9690
9691 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9692 if (hpsa_sas_node) {
9693 hpsa_sas_node->parent_dev = parent_dev;
9694 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9695 }
9696
9697 return hpsa_sas_node;
9698}
9699
9700static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9701{
9702 struct hpsa_sas_port *hpsa_sas_port;
9703 struct hpsa_sas_port *next;
9704
9705 if (!hpsa_sas_node)
9706 return;
9707
9708 list_for_each_entry_safe(hpsa_sas_port, next,
9709 &hpsa_sas_node->port_list_head, port_list_entry)
9710 hpsa_free_sas_port(hpsa_sas_port);
9711
9712 kfree(hpsa_sas_node);
9713}
9714
9715static struct hpsa_scsi_dev_t
9716 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9717 struct sas_rphy *rphy)
9718{
9719 int i;
9720 struct hpsa_scsi_dev_t *device;
9721
9722 for (i = 0; i < h->ndevices; i++) {
9723 device = h->dev[i];
9724 if (!device->sas_port)
9725 continue;
9726 if (device->sas_port->rphy == rphy)
9727 return device;
9728 }
9729
9730 return NULL;
9731}
9732
9733static int hpsa_add_sas_host(struct ctlr_info *h)
9734{
9735 int rc;
9736 struct device *parent_dev;
9737 struct hpsa_sas_node *hpsa_sas_node;
9738 struct hpsa_sas_port *hpsa_sas_port;
9739 struct hpsa_sas_phy *hpsa_sas_phy;
9740
9741 parent_dev = &h->scsi_host->shost_dev;
9742
9743 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9744 if (!hpsa_sas_node)
9745 return -ENOMEM;
9746
9747 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9748 if (!hpsa_sas_port) {
9749 rc = -ENODEV;
9750 goto free_sas_node;
9751 }
9752
9753 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9754 if (!hpsa_sas_phy) {
9755 rc = -ENODEV;
9756 goto free_sas_port;
9757 }
9758
9759 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9760 if (rc)
9761 goto free_sas_phy;
9762
9763 h->sas_host = hpsa_sas_node;
9764
9765 return 0;
9766
9767free_sas_phy:
9768 sas_phy_free(hpsa_sas_phy->phy);
9769 kfree(hpsa_sas_phy);
9770free_sas_port:
9771 hpsa_free_sas_port(hpsa_sas_port);
9772free_sas_node:
9773 hpsa_free_sas_node(hpsa_sas_node);
9774
9775 return rc;
9776}
9777
9778static void hpsa_delete_sas_host(struct ctlr_info *h)
9779{
9780 hpsa_free_sas_node(h->sas_host);
9781}
9782
9783static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9784 struct hpsa_scsi_dev_t *device)
9785{
9786 int rc;
9787 struct hpsa_sas_port *hpsa_sas_port;
9788 struct sas_rphy *rphy;
9789
9790 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9791 if (!hpsa_sas_port)
9792 return -ENOMEM;
9793
9794 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9795 if (!rphy) {
9796 rc = -ENODEV;
9797 goto free_sas_port;
9798 }
9799
9800 hpsa_sas_port->rphy = rphy;
9801 device->sas_port = hpsa_sas_port;
9802
9803 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9804 if (rc)
9805 goto free_sas_rphy;
9806
9807 return 0;
9808
9809free_sas_rphy:
9810 sas_rphy_free(rphy);
9811free_sas_port:
9812 hpsa_free_sas_port(hpsa_sas_port);
9813 device->sas_port = NULL;
9814
9815 return rc;
9816}
9817
9818static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9819{
9820 if (device->sas_port) {
9821 hpsa_free_sas_port(device->sas_port);
9822 device->sas_port = NULL;
9823 }
9824}
9825
9826static int
9827hpsa_sas_get_linkerrors(struct sas_phy *phy)
9828{
9829 return 0;
9830}
9831
9832static int
9833hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9834{
9835 struct Scsi_Host *shost = phy_to_shost(rphy);
9836 struct ctlr_info *h;
9837 struct hpsa_scsi_dev_t *sd;
9838
9839 if (!shost)
9840 return -ENXIO;
9841
9842 h = shost_to_hba(shost);
9843
9844 if (!h)
9845 return -ENXIO;
9846
9847 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9848 if (!sd)
9849 return -ENXIO;
9850
9851 *identifier = sd->eli;
9852
9853 return 0;
9854}
9855
9856static int
9857hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9858{
9859 return -ENXIO;
9860}
9861
9862static int
9863hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9864{
9865 return 0;
9866}
9867
9868static int
9869hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9870{
9871 return 0;
9872}
9873
9874static int
9875hpsa_sas_phy_setup(struct sas_phy *phy)
9876{
9877 return 0;
9878}
9879
9880static void
9881hpsa_sas_phy_release(struct sas_phy *phy)
9882{
9883}
9884
9885static int
9886hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9887{
9888 return -EINVAL;
9889}
9890
9891static struct sas_function_template hpsa_sas_transport_functions = {
9892 .get_linkerrors = hpsa_sas_get_linkerrors,
9893 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9894 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9895 .phy_reset = hpsa_sas_phy_reset,
9896 .phy_enable = hpsa_sas_phy_enable,
9897 .phy_setup = hpsa_sas_phy_setup,
9898 .phy_release = hpsa_sas_phy_release,
9899 .set_phy_speed = hpsa_sas_phy_speed,
9900};
9901
9902/*
9903 * This is it. Register the PCI driver information for the cards we control
9904 * the OS will call our registered routines when it finds one of our cards.
9905 */
9906static int __init hpsa_init(void)
9907{
9908 int rc;
9909
9910 hpsa_sas_transport_template =
9911 sas_attach_transport(&hpsa_sas_transport_functions);
9912 if (!hpsa_sas_transport_template)
9913 return -ENODEV;
9914
9915 rc = pci_register_driver(&hpsa_pci_driver);
9916
9917 if (rc)
9918 sas_release_transport(hpsa_sas_transport_template);
9919
9920 return rc;
9921}
9922
9923static void __exit hpsa_cleanup(void)
9924{
9925 pci_unregister_driver(&hpsa_pci_driver);
9926 sas_release_transport(hpsa_sas_transport_template);
9927}
9928
9929static void __attribute__((unused)) verify_offsets(void)
9930{
9931#define VERIFY_OFFSET(member, offset) \
9932 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9933
9934 VERIFY_OFFSET(structure_size, 0);
9935 VERIFY_OFFSET(volume_blk_size, 4);
9936 VERIFY_OFFSET(volume_blk_cnt, 8);
9937 VERIFY_OFFSET(phys_blk_shift, 16);
9938 VERIFY_OFFSET(parity_rotation_shift, 17);
9939 VERIFY_OFFSET(strip_size, 18);
9940 VERIFY_OFFSET(disk_starting_blk, 20);
9941 VERIFY_OFFSET(disk_blk_cnt, 28);
9942 VERIFY_OFFSET(data_disks_per_row, 36);
9943 VERIFY_OFFSET(metadata_disks_per_row, 38);
9944 VERIFY_OFFSET(row_cnt, 40);
9945 VERIFY_OFFSET(layout_map_count, 42);
9946 VERIFY_OFFSET(flags, 44);
9947 VERIFY_OFFSET(dekindex, 46);
9948 /* VERIFY_OFFSET(reserved, 48 */
9949 VERIFY_OFFSET(data, 64);
9950
9951#undef VERIFY_OFFSET
9952
9953#define VERIFY_OFFSET(member, offset) \
9954 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9955
9956 VERIFY_OFFSET(IU_type, 0);
9957 VERIFY_OFFSET(direction, 1);
9958 VERIFY_OFFSET(reply_queue, 2);
9959 /* VERIFY_OFFSET(reserved1, 3); */
9960 VERIFY_OFFSET(scsi_nexus, 4);
9961 VERIFY_OFFSET(Tag, 8);
9962 VERIFY_OFFSET(cdb, 16);
9963 VERIFY_OFFSET(cciss_lun, 32);
9964 VERIFY_OFFSET(data_len, 40);
9965 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9966 VERIFY_OFFSET(sg_count, 45);
9967 /* VERIFY_OFFSET(reserved3 */
9968 VERIFY_OFFSET(err_ptr, 48);
9969 VERIFY_OFFSET(err_len, 56);
9970 /* VERIFY_OFFSET(reserved4 */
9971 VERIFY_OFFSET(sg, 64);
9972
9973#undef VERIFY_OFFSET
9974
9975#define VERIFY_OFFSET(member, offset) \
9976 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9977
9978 VERIFY_OFFSET(dev_handle, 0x00);
9979 VERIFY_OFFSET(reserved1, 0x02);
9980 VERIFY_OFFSET(function, 0x03);
9981 VERIFY_OFFSET(reserved2, 0x04);
9982 VERIFY_OFFSET(err_info, 0x0C);
9983 VERIFY_OFFSET(reserved3, 0x10);
9984 VERIFY_OFFSET(err_info_len, 0x12);
9985 VERIFY_OFFSET(reserved4, 0x13);
9986 VERIFY_OFFSET(sgl_offset, 0x14);
9987 VERIFY_OFFSET(reserved5, 0x15);
9988 VERIFY_OFFSET(transfer_len, 0x1C);
9989 VERIFY_OFFSET(reserved6, 0x20);
9990 VERIFY_OFFSET(io_flags, 0x24);
9991 VERIFY_OFFSET(reserved7, 0x26);
9992 VERIFY_OFFSET(LUN, 0x34);
9993 VERIFY_OFFSET(control, 0x3C);
9994 VERIFY_OFFSET(CDB, 0x40);
9995 VERIFY_OFFSET(reserved8, 0x50);
9996 VERIFY_OFFSET(host_context_flags, 0x60);
9997 VERIFY_OFFSET(timeout_sec, 0x62);
9998 VERIFY_OFFSET(ReplyQueue, 0x64);
9999 VERIFY_OFFSET(reserved9, 0x65);
10000 VERIFY_OFFSET(tag, 0x68);
10001 VERIFY_OFFSET(host_addr, 0x70);
10002 VERIFY_OFFSET(CISS_LUN, 0x78);
10003 VERIFY_OFFSET(SG, 0x78 + 8);
10004#undef VERIFY_OFFSET
10005}
10006
10007module_init(hpsa_init);
10008module_exit(hpsa_cleanup);