Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6#include <linux/device.h>
7#include <linux/interconnect.h>
8#include <linux/interconnect-provider.h>
9#include <linux/mod_devicetable.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <dt-bindings/interconnect/qcom,sdx65.h>
13
14#include "bcm-voter.h"
15#include "icc-rpmh.h"
16
17static struct qcom_icc_node llcc_mc;
18static struct qcom_icc_node acm_tcu;
19static struct qcom_icc_node qnm_snoc_gc;
20static struct qcom_icc_node xm_apps_rdwr;
21static struct qcom_icc_node qhm_audio;
22static struct qcom_icc_node qhm_blsp1;
23static struct qcom_icc_node qhm_qdss_bam;
24static struct qcom_icc_node qhm_qpic;
25static struct qcom_icc_node qhm_snoc_cfg;
26static struct qcom_icc_node qhm_spmi_fetcher1;
27static struct qcom_icc_node qnm_aggre_noc;
28static struct qcom_icc_node qnm_ipa;
29static struct qcom_icc_node qnm_memnoc;
30static struct qcom_icc_node qnm_memnoc_pcie;
31static struct qcom_icc_node qxm_crypto;
32static struct qcom_icc_node xm_ipa2pcie_slv;
33static struct qcom_icc_node xm_pcie;
34static struct qcom_icc_node xm_qdss_etr;
35static struct qcom_icc_node xm_sdc1;
36static struct qcom_icc_node xm_usb3;
37static struct qcom_icc_node ebi;
38static struct qcom_icc_node qns_llcc;
39static struct qcom_icc_node qns_memnoc_snoc;
40static struct qcom_icc_node qns_sys_pcie;
41static struct qcom_icc_node qhs_aoss;
42static struct qcom_icc_node qhs_apss;
43static struct qcom_icc_node qhs_audio;
44static struct qcom_icc_node qhs_blsp1;
45static struct qcom_icc_node qhs_clk_ctl;
46static struct qcom_icc_node qhs_crypto0_cfg;
47static struct qcom_icc_node qhs_ddrss_cfg;
48static struct qcom_icc_node qhs_ecc_cfg;
49static struct qcom_icc_node qhs_imem_cfg;
50static struct qcom_icc_node qhs_ipa;
51static struct qcom_icc_node qhs_mss_cfg;
52static struct qcom_icc_node qhs_pcie_parf;
53static struct qcom_icc_node qhs_pdm;
54static struct qcom_icc_node qhs_prng;
55static struct qcom_icc_node qhs_qdss_cfg;
56static struct qcom_icc_node qhs_qpic;
57static struct qcom_icc_node qhs_sdc1;
58static struct qcom_icc_node qhs_snoc_cfg;
59static struct qcom_icc_node qhs_spmi_fetcher;
60static struct qcom_icc_node qhs_spmi_vgi_coex;
61static struct qcom_icc_node qhs_tcsr;
62static struct qcom_icc_node qhs_tlmm;
63static struct qcom_icc_node qhs_usb3;
64static struct qcom_icc_node qhs_usb3_phy;
65static struct qcom_icc_node qns_aggre_noc;
66static struct qcom_icc_node qns_snoc_memnoc;
67static struct qcom_icc_node qxs_imem;
68static struct qcom_icc_node srvc_snoc;
69static struct qcom_icc_node xs_pcie;
70static struct qcom_icc_node xs_qdss_stm;
71static struct qcom_icc_node xs_sys_tcu_cfg;
72
73static struct qcom_icc_node llcc_mc = {
74 .name = "llcc_mc",
75 .channels = 1,
76 .buswidth = 4,
77 .num_links = 1,
78 .link_nodes = { &ebi },
79};
80
81static struct qcom_icc_node acm_tcu = {
82 .name = "acm_tcu",
83 .channels = 1,
84 .buswidth = 8,
85 .num_links = 3,
86 .link_nodes = { &qns_llcc,
87 &qns_memnoc_snoc,
88 &qns_sys_pcie },
89};
90
91static struct qcom_icc_node qnm_snoc_gc = {
92 .name = "qnm_snoc_gc",
93 .channels = 1,
94 .buswidth = 16,
95 .num_links = 1,
96 .link_nodes = { &qns_llcc },
97};
98
99static struct qcom_icc_node xm_apps_rdwr = {
100 .name = "xm_apps_rdwr",
101 .channels = 1,
102 .buswidth = 16,
103 .num_links = 3,
104 .link_nodes = { &qns_llcc,
105 &qns_memnoc_snoc,
106 &qns_sys_pcie },
107};
108
109static struct qcom_icc_node qhm_audio = {
110 .name = "qhm_audio",
111 .channels = 1,
112 .buswidth = 4,
113 .num_links = 1,
114 .link_nodes = { &qns_aggre_noc },
115};
116
117static struct qcom_icc_node qhm_blsp1 = {
118 .name = "qhm_blsp1",
119 .channels = 1,
120 .buswidth = 4,
121 .num_links = 1,
122 .link_nodes = { &qns_aggre_noc },
123};
124
125static struct qcom_icc_node qhm_qdss_bam = {
126 .name = "qhm_qdss_bam",
127 .channels = 1,
128 .buswidth = 4,
129 .num_links = 26,
130 .link_nodes = { &qhs_aoss,
131 &qhs_audio,
132 &qhs_blsp1,
133 &qhs_clk_ctl,
134 &qhs_crypto0_cfg,
135 &qhs_ddrss_cfg,
136 &qhs_ecc_cfg,
137 &qhs_imem_cfg,
138 &qhs_ipa,
139 &qhs_mss_cfg,
140 &qhs_pcie_parf,
141 &qhs_pdm,
142 &qhs_prng,
143 &qhs_qdss_cfg,
144 &qhs_qpic,
145 &qhs_sdc1,
146 &qhs_snoc_cfg,
147 &qhs_spmi_fetcher,
148 &qhs_spmi_vgi_coex,
149 &qhs_tcsr,
150 &qhs_tlmm,
151 &qhs_usb3,
152 &qhs_usb3_phy,
153 &qns_snoc_memnoc,
154 &qxs_imem,
155 &xs_sys_tcu_cfg },
156};
157
158static struct qcom_icc_node qhm_qpic = {
159 .name = "qhm_qpic",
160 .channels = 1,
161 .buswidth = 4,
162 .num_links = 4,
163 .link_nodes = { &qhs_aoss,
164 &qhs_audio,
165 &qhs_ipa,
166 &qns_aggre_noc },
167};
168
169static struct qcom_icc_node qhm_snoc_cfg = {
170 .name = "qhm_snoc_cfg",
171 .channels = 1,
172 .buswidth = 4,
173 .num_links = 1,
174 .link_nodes = { &srvc_snoc },
175};
176
177static struct qcom_icc_node qhm_spmi_fetcher1 = {
178 .name = "qhm_spmi_fetcher1",
179 .channels = 1,
180 .buswidth = 4,
181 .num_links = 2,
182 .link_nodes = { &qhs_aoss,
183 &qns_aggre_noc },
184};
185
186static struct qcom_icc_node qnm_aggre_noc = {
187 .name = "qnm_aggre_noc",
188 .channels = 1,
189 .buswidth = 8,
190 .num_links = 29,
191 .link_nodes = { &qhs_aoss,
192 &qhs_apss,
193 &qhs_audio,
194 &qhs_blsp1,
195 &qhs_clk_ctl,
196 &qhs_crypto0_cfg,
197 &qhs_ddrss_cfg,
198 &qhs_ecc_cfg,
199 &qhs_imem_cfg,
200 &qhs_ipa,
201 &qhs_mss_cfg,
202 &qhs_pcie_parf,
203 &qhs_pdm,
204 &qhs_prng,
205 &qhs_qdss_cfg,
206 &qhs_qpic,
207 &qhs_sdc1,
208 &qhs_snoc_cfg,
209 &qhs_spmi_fetcher,
210 &qhs_spmi_vgi_coex,
211 &qhs_tcsr,
212 &qhs_tlmm,
213 &qhs_usb3,
214 &qhs_usb3_phy,
215 &qns_snoc_memnoc,
216 &qxs_imem,
217 &xs_pcie,
218 &xs_qdss_stm,
219 &xs_sys_tcu_cfg },
220};
221
222static struct qcom_icc_node qnm_ipa = {
223 .name = "qnm_ipa",
224 .channels = 1,
225 .buswidth = 8,
226 .num_links = 26,
227 .link_nodes = { &qhs_aoss,
228 &qhs_audio,
229 &qhs_blsp1,
230 &qhs_clk_ctl,
231 &qhs_crypto0_cfg,
232 &qhs_ddrss_cfg,
233 &qhs_ecc_cfg,
234 &qhs_imem_cfg,
235 &qhs_ipa,
236 &qhs_mss_cfg,
237 &qhs_pcie_parf,
238 &qhs_pdm,
239 &qhs_prng,
240 &qhs_qdss_cfg,
241 &qhs_qpic,
242 &qhs_sdc1,
243 &qhs_snoc_cfg,
244 &qhs_spmi_fetcher,
245 &qhs_tcsr,
246 &qhs_tlmm,
247 &qhs_usb3,
248 &qhs_usb3_phy,
249 &qns_snoc_memnoc,
250 &qxs_imem,
251 &xs_pcie,
252 &xs_qdss_stm },
253};
254
255static struct qcom_icc_node qnm_memnoc = {
256 .name = "qnm_memnoc",
257 .channels = 1,
258 .buswidth = 8,
259 .num_links = 27,
260 .link_nodes = { &qhs_aoss,
261 &qhs_apss,
262 &qhs_audio,
263 &qhs_blsp1,
264 &qhs_clk_ctl,
265 &qhs_crypto0_cfg,
266 &qhs_ddrss_cfg,
267 &qhs_ecc_cfg,
268 &qhs_imem_cfg,
269 &qhs_ipa,
270 &qhs_mss_cfg,
271 &qhs_pcie_parf,
272 &qhs_pdm,
273 &qhs_prng,
274 &qhs_qdss_cfg,
275 &qhs_qpic,
276 &qhs_sdc1,
277 &qhs_snoc_cfg,
278 &qhs_spmi_fetcher,
279 &qhs_spmi_vgi_coex,
280 &qhs_tcsr,
281 &qhs_tlmm,
282 &qhs_usb3,
283 &qhs_usb3_phy,
284 &qxs_imem,
285 &xs_qdss_stm,
286 &xs_sys_tcu_cfg },
287};
288
289static struct qcom_icc_node qnm_memnoc_pcie = {
290 .name = "qnm_memnoc_pcie",
291 .channels = 1,
292 .buswidth = 8,
293 .num_links = 1,
294 .link_nodes = { &xs_pcie },
295};
296
297static struct qcom_icc_node qxm_crypto = {
298 .name = "qxm_crypto",
299 .channels = 1,
300 .buswidth = 8,
301 .num_links = 2,
302 .link_nodes = { &qhs_aoss,
303 &qns_aggre_noc },
304};
305
306static struct qcom_icc_node xm_ipa2pcie_slv = {
307 .name = "xm_ipa2pcie_slv",
308 .channels = 1,
309 .buswidth = 8,
310 .num_links = 1,
311 .link_nodes = { &xs_pcie },
312};
313
314static struct qcom_icc_node xm_pcie = {
315 .name = "xm_pcie",
316 .channels = 1,
317 .buswidth = 8,
318 .num_links = 1,
319 .link_nodes = { &qns_aggre_noc },
320};
321
322static struct qcom_icc_node xm_qdss_etr = {
323 .name = "xm_qdss_etr",
324 .channels = 1,
325 .buswidth = 8,
326 .num_links = 26,
327 .link_nodes = { &qhs_aoss,
328 &qhs_audio,
329 &qhs_blsp1,
330 &qhs_clk_ctl,
331 &qhs_crypto0_cfg,
332 &qhs_ddrss_cfg,
333 &qhs_ecc_cfg,
334 &qhs_imem_cfg,
335 &qhs_ipa,
336 &qhs_mss_cfg,
337 &qhs_pcie_parf,
338 &qhs_pdm,
339 &qhs_prng,
340 &qhs_qdss_cfg,
341 &qhs_qpic,
342 &qhs_sdc1,
343 &qhs_snoc_cfg,
344 &qhs_spmi_fetcher,
345 &qhs_spmi_vgi_coex,
346 &qhs_tcsr,
347 &qhs_tlmm,
348 &qhs_usb3,
349 &qhs_usb3_phy,
350 &qns_snoc_memnoc,
351 &qxs_imem,
352 &xs_sys_tcu_cfg },
353};
354
355static struct qcom_icc_node xm_sdc1 = {
356 .name = "xm_sdc1",
357 .channels = 1,
358 .buswidth = 8,
359 .num_links = 4,
360 .link_nodes = { &qhs_aoss,
361 &qhs_audio,
362 &qhs_ipa,
363 &qns_aggre_noc },
364};
365
366static struct qcom_icc_node xm_usb3 = {
367 .name = "xm_usb3",
368 .channels = 1,
369 .buswidth = 8,
370 .num_links = 1,
371 .link_nodes = { &qns_aggre_noc },
372};
373
374static struct qcom_icc_node ebi = {
375 .name = "ebi",
376 .channels = 1,
377 .buswidth = 4,
378};
379
380static struct qcom_icc_node qns_llcc = {
381 .name = "qns_llcc",
382 .channels = 1,
383 .buswidth = 16,
384 .num_links = 1,
385 .link_nodes = { &llcc_mc },
386};
387
388static struct qcom_icc_node qns_memnoc_snoc = {
389 .name = "qns_memnoc_snoc",
390 .channels = 1,
391 .buswidth = 8,
392 .num_links = 1,
393 .link_nodes = { &qnm_memnoc },
394};
395
396static struct qcom_icc_node qns_sys_pcie = {
397 .name = "qns_sys_pcie",
398 .channels = 1,
399 .buswidth = 8,
400 .num_links = 1,
401 .link_nodes = { &qnm_memnoc_pcie },
402};
403
404static struct qcom_icc_node qhs_aoss = {
405 .name = "qhs_aoss",
406 .channels = 1,
407 .buswidth = 4,
408};
409
410static struct qcom_icc_node qhs_apss = {
411 .name = "qhs_apss",
412 .channels = 1,
413 .buswidth = 4,
414};
415
416static struct qcom_icc_node qhs_audio = {
417 .name = "qhs_audio",
418 .channels = 1,
419 .buswidth = 4,
420};
421
422static struct qcom_icc_node qhs_blsp1 = {
423 .name = "qhs_blsp1",
424 .channels = 1,
425 .buswidth = 4,
426};
427
428static struct qcom_icc_node qhs_clk_ctl = {
429 .name = "qhs_clk_ctl",
430 .channels = 1,
431 .buswidth = 4,
432};
433
434static struct qcom_icc_node qhs_crypto0_cfg = {
435 .name = "qhs_crypto0_cfg",
436 .channels = 1,
437 .buswidth = 4,
438};
439
440static struct qcom_icc_node qhs_ddrss_cfg = {
441 .name = "qhs_ddrss_cfg",
442 .channels = 1,
443 .buswidth = 4,
444};
445
446static struct qcom_icc_node qhs_ecc_cfg = {
447 .name = "qhs_ecc_cfg",
448 .channels = 1,
449 .buswidth = 4,
450};
451
452static struct qcom_icc_node qhs_imem_cfg = {
453 .name = "qhs_imem_cfg",
454 .channels = 1,
455 .buswidth = 4,
456};
457
458static struct qcom_icc_node qhs_ipa = {
459 .name = "qhs_ipa",
460 .channels = 1,
461 .buswidth = 4,
462};
463
464static struct qcom_icc_node qhs_mss_cfg = {
465 .name = "qhs_mss_cfg",
466 .channels = 1,
467 .buswidth = 4,
468};
469
470static struct qcom_icc_node qhs_pcie_parf = {
471 .name = "qhs_pcie_parf",
472 .channels = 1,
473 .buswidth = 4,
474};
475
476static struct qcom_icc_node qhs_pdm = {
477 .name = "qhs_pdm",
478 .channels = 1,
479 .buswidth = 4,
480};
481
482static struct qcom_icc_node qhs_prng = {
483 .name = "qhs_prng",
484 .channels = 1,
485 .buswidth = 4,
486};
487
488static struct qcom_icc_node qhs_qdss_cfg = {
489 .name = "qhs_qdss_cfg",
490 .channels = 1,
491 .buswidth = 4,
492};
493
494static struct qcom_icc_node qhs_qpic = {
495 .name = "qhs_qpic",
496 .channels = 1,
497 .buswidth = 4,
498};
499
500static struct qcom_icc_node qhs_sdc1 = {
501 .name = "qhs_sdc1",
502 .channels = 1,
503 .buswidth = 4,
504};
505
506static struct qcom_icc_node qhs_snoc_cfg = {
507 .name = "qhs_snoc_cfg",
508 .channels = 1,
509 .buswidth = 4,
510 .num_links = 1,
511 .link_nodes = { &qhm_snoc_cfg },
512};
513
514static struct qcom_icc_node qhs_spmi_fetcher = {
515 .name = "qhs_spmi_fetcher",
516 .channels = 1,
517 .buswidth = 4,
518};
519
520static struct qcom_icc_node qhs_spmi_vgi_coex = {
521 .name = "qhs_spmi_vgi_coex",
522 .channels = 1,
523 .buswidth = 4,
524};
525
526static struct qcom_icc_node qhs_tcsr = {
527 .name = "qhs_tcsr",
528 .channels = 1,
529 .buswidth = 4,
530};
531
532static struct qcom_icc_node qhs_tlmm = {
533 .name = "qhs_tlmm",
534 .channels = 1,
535 .buswidth = 4,
536};
537
538static struct qcom_icc_node qhs_usb3 = {
539 .name = "qhs_usb3",
540 .channels = 1,
541 .buswidth = 4,
542};
543
544static struct qcom_icc_node qhs_usb3_phy = {
545 .name = "qhs_usb3_phy",
546 .channels = 1,
547 .buswidth = 4,
548};
549
550static struct qcom_icc_node qns_aggre_noc = {
551 .name = "qns_aggre_noc",
552 .channels = 1,
553 .buswidth = 8,
554 .num_links = 1,
555 .link_nodes = { &qnm_aggre_noc },
556};
557
558static struct qcom_icc_node qns_snoc_memnoc = {
559 .name = "qns_snoc_memnoc",
560 .channels = 1,
561 .buswidth = 16,
562 .num_links = 1,
563 .link_nodes = { &qnm_snoc_gc },
564};
565
566static struct qcom_icc_node qxs_imem = {
567 .name = "qxs_imem",
568 .channels = 1,
569 .buswidth = 8,
570};
571
572static struct qcom_icc_node srvc_snoc = {
573 .name = "srvc_snoc",
574 .channels = 1,
575 .buswidth = 4,
576};
577
578static struct qcom_icc_node xs_pcie = {
579 .name = "xs_pcie",
580 .channels = 1,
581 .buswidth = 8,
582};
583
584static struct qcom_icc_node xs_qdss_stm = {
585 .name = "xs_qdss_stm",
586 .channels = 1,
587 .buswidth = 4,
588};
589
590static struct qcom_icc_node xs_sys_tcu_cfg = {
591 .name = "xs_sys_tcu_cfg",
592 .channels = 1,
593 .buswidth = 8,
594};
595
596static struct qcom_icc_bcm bcm_ce0 = {
597 .name = "CE0",
598 .keepalive = false,
599 .num_nodes = 1,
600 .nodes = { &qxm_crypto },
601};
602
603static struct qcom_icc_bcm bcm_mc0 = {
604 .name = "MC0",
605 .keepalive = true,
606 .num_nodes = 1,
607 .nodes = { &ebi },
608};
609
610static struct qcom_icc_bcm bcm_pn0 = {
611 .name = "PN0",
612 .keepalive = true,
613 .num_nodes = 26,
614 .nodes = { &qhm_snoc_cfg,
615 &qhs_aoss,
616 &qhs_apss,
617 &qhs_audio,
618 &qhs_blsp1,
619 &qhs_clk_ctl,
620 &qhs_crypto0_cfg,
621 &qhs_ddrss_cfg,
622 &qhs_ecc_cfg,
623 &qhs_imem_cfg,
624 &qhs_ipa,
625 &qhs_mss_cfg,
626 &qhs_pcie_parf,
627 &qhs_pdm,
628 &qhs_prng,
629 &qhs_qdss_cfg,
630 &qhs_qpic,
631 &qhs_sdc1,
632 &qhs_snoc_cfg,
633 &qhs_spmi_fetcher,
634 &qhs_spmi_vgi_coex,
635 &qhs_tcsr,
636 &qhs_tlmm,
637 &qhs_usb3,
638 &qhs_usb3_phy,
639 &srvc_snoc
640 },
641};
642
643static struct qcom_icc_bcm bcm_pn1 = {
644 .name = "PN1",
645 .keepalive = false,
646 .num_nodes = 1,
647 .nodes = { &xm_sdc1 },
648};
649
650static struct qcom_icc_bcm bcm_pn2 = {
651 .name = "PN2",
652 .keepalive = false,
653 .num_nodes = 2,
654 .nodes = { &qhm_audio, &qhm_spmi_fetcher1 },
655};
656
657static struct qcom_icc_bcm bcm_pn3 = {
658 .name = "PN3",
659 .keepalive = false,
660 .num_nodes = 2,
661 .nodes = { &qhm_blsp1, &qhm_qpic },
662};
663
664static struct qcom_icc_bcm bcm_pn4 = {
665 .name = "PN4",
666 .keepalive = false,
667 .num_nodes = 1,
668 .nodes = { &qxm_crypto },
669};
670
671static struct qcom_icc_bcm bcm_sh0 = {
672 .name = "SH0",
673 .keepalive = true,
674 .num_nodes = 1,
675 .nodes = { &qns_llcc },
676};
677
678static struct qcom_icc_bcm bcm_sh1 = {
679 .name = "SH1",
680 .keepalive = false,
681 .num_nodes = 1,
682 .nodes = { &qns_memnoc_snoc },
683};
684
685static struct qcom_icc_bcm bcm_sh3 = {
686 .name = "SH3",
687 .keepalive = false,
688 .num_nodes = 1,
689 .nodes = { &xm_apps_rdwr },
690};
691
692static struct qcom_icc_bcm bcm_sn0 = {
693 .name = "SN0",
694 .keepalive = true,
695 .num_nodes = 1,
696 .nodes = { &qns_snoc_memnoc },
697};
698
699static struct qcom_icc_bcm bcm_sn1 = {
700 .name = "SN1",
701 .keepalive = false,
702 .num_nodes = 1,
703 .nodes = { &qxs_imem },
704};
705
706static struct qcom_icc_bcm bcm_sn2 = {
707 .name = "SN2",
708 .keepalive = false,
709 .num_nodes = 1,
710 .nodes = { &xs_qdss_stm },
711};
712
713static struct qcom_icc_bcm bcm_sn3 = {
714 .name = "SN3",
715 .keepalive = false,
716 .num_nodes = 1,
717 .nodes = { &xs_sys_tcu_cfg },
718};
719
720static struct qcom_icc_bcm bcm_sn5 = {
721 .name = "SN5",
722 .keepalive = false,
723 .num_nodes = 1,
724 .nodes = { &xs_pcie },
725};
726
727static struct qcom_icc_bcm bcm_sn6 = {
728 .name = "SN6",
729 .keepalive = false,
730 .num_nodes = 2,
731 .nodes = { &qhm_qdss_bam, &xm_qdss_etr },
732};
733
734static struct qcom_icc_bcm bcm_sn7 = {
735 .name = "SN7",
736 .keepalive = false,
737 .num_nodes = 4,
738 .nodes = { &qnm_aggre_noc, &xm_pcie, &xm_usb3, &qns_aggre_noc },
739};
740
741static struct qcom_icc_bcm bcm_sn8 = {
742 .name = "SN8",
743 .keepalive = false,
744 .num_nodes = 1,
745 .nodes = { &qnm_memnoc },
746};
747
748static struct qcom_icc_bcm bcm_sn9 = {
749 .name = "SN9",
750 .keepalive = false,
751 .num_nodes = 1,
752 .nodes = { &qnm_memnoc_pcie },
753};
754
755static struct qcom_icc_bcm bcm_sn10 = {
756 .name = "SN10",
757 .keepalive = false,
758 .num_nodes = 2,
759 .nodes = { &qnm_ipa, &xm_ipa2pcie_slv },
760};
761
762static struct qcom_icc_bcm * const mc_virt_bcms[] = {
763 &bcm_mc0,
764};
765
766static struct qcom_icc_node * const mc_virt_nodes[] = {
767 [MASTER_LLCC] = &llcc_mc,
768 [SLAVE_EBI1] = &ebi,
769};
770
771static const struct qcom_icc_desc sdx65_mc_virt = {
772 .nodes = mc_virt_nodes,
773 .num_nodes = ARRAY_SIZE(mc_virt_nodes),
774 .bcms = mc_virt_bcms,
775 .num_bcms = ARRAY_SIZE(mc_virt_bcms),
776};
777
778static struct qcom_icc_bcm * const mem_noc_bcms[] = {
779 &bcm_sh0,
780 &bcm_sh1,
781 &bcm_sh3,
782};
783
784static struct qcom_icc_node * const mem_noc_nodes[] = {
785 [MASTER_TCU_0] = &acm_tcu,
786 [MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
787 [MASTER_APPSS_PROC] = &xm_apps_rdwr,
788 [SLAVE_LLCC] = &qns_llcc,
789 [SLAVE_MEM_NOC_SNOC] = &qns_memnoc_snoc,
790 [SLAVE_MEM_NOC_PCIE_SNOC] = &qns_sys_pcie,
791};
792
793static const struct qcom_icc_desc sdx65_mem_noc = {
794 .nodes = mem_noc_nodes,
795 .num_nodes = ARRAY_SIZE(mem_noc_nodes),
796 .bcms = mem_noc_bcms,
797 .num_bcms = ARRAY_SIZE(mem_noc_bcms),
798};
799
800static struct qcom_icc_bcm * const system_noc_bcms[] = {
801 &bcm_ce0,
802 &bcm_pn0,
803 &bcm_pn1,
804 &bcm_pn2,
805 &bcm_pn3,
806 &bcm_pn4,
807 &bcm_sn0,
808 &bcm_sn1,
809 &bcm_sn2,
810 &bcm_sn3,
811 &bcm_sn5,
812 &bcm_sn6,
813 &bcm_sn7,
814 &bcm_sn8,
815 &bcm_sn9,
816 &bcm_sn10,
817};
818
819static struct qcom_icc_node * const system_noc_nodes[] = {
820 [MASTER_AUDIO] = &qhm_audio,
821 [MASTER_BLSP_1] = &qhm_blsp1,
822 [MASTER_QDSS_BAM] = &qhm_qdss_bam,
823 [MASTER_QPIC] = &qhm_qpic,
824 [MASTER_SNOC_CFG] = &qhm_snoc_cfg,
825 [MASTER_SPMI_FETCHER] = &qhm_spmi_fetcher1,
826 [MASTER_ANOC_SNOC] = &qnm_aggre_noc,
827 [MASTER_IPA] = &qnm_ipa,
828 [MASTER_MEM_NOC_SNOC] = &qnm_memnoc,
829 [MASTER_MEM_NOC_PCIE_SNOC] = &qnm_memnoc_pcie,
830 [MASTER_CRYPTO] = &qxm_crypto,
831 [MASTER_IPA_PCIE] = &xm_ipa2pcie_slv,
832 [MASTER_PCIE_0] = &xm_pcie,
833 [MASTER_QDSS_ETR] = &xm_qdss_etr,
834 [MASTER_SDCC_1] = &xm_sdc1,
835 [MASTER_USB3] = &xm_usb3,
836 [SLAVE_AOSS] = &qhs_aoss,
837 [SLAVE_APPSS] = &qhs_apss,
838 [SLAVE_AUDIO] = &qhs_audio,
839 [SLAVE_BLSP_1] = &qhs_blsp1,
840 [SLAVE_CLK_CTL] = &qhs_clk_ctl,
841 [SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
842 [SLAVE_CNOC_DDRSS] = &qhs_ddrss_cfg,
843 [SLAVE_ECC_CFG] = &qhs_ecc_cfg,
844 [SLAVE_IMEM_CFG] = &qhs_imem_cfg,
845 [SLAVE_IPA_CFG] = &qhs_ipa,
846 [SLAVE_CNOC_MSS] = &qhs_mss_cfg,
847 [SLAVE_PCIE_PARF] = &qhs_pcie_parf,
848 [SLAVE_PDM] = &qhs_pdm,
849 [SLAVE_PRNG] = &qhs_prng,
850 [SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
851 [SLAVE_QPIC] = &qhs_qpic,
852 [SLAVE_SDCC_1] = &qhs_sdc1,
853 [SLAVE_SNOC_CFG] = &qhs_snoc_cfg,
854 [SLAVE_SPMI_FETCHER] = &qhs_spmi_fetcher,
855 [SLAVE_SPMI_VGI_COEX] = &qhs_spmi_vgi_coex,
856 [SLAVE_TCSR] = &qhs_tcsr,
857 [SLAVE_TLMM] = &qhs_tlmm,
858 [SLAVE_USB3] = &qhs_usb3,
859 [SLAVE_USB3_PHY_CFG] = &qhs_usb3_phy,
860 [SLAVE_ANOC_SNOC] = &qns_aggre_noc,
861 [SLAVE_SNOC_MEM_NOC_GC] = &qns_snoc_memnoc,
862 [SLAVE_IMEM] = &qxs_imem,
863 [SLAVE_SERVICE_SNOC] = &srvc_snoc,
864 [SLAVE_PCIE_0] = &xs_pcie,
865 [SLAVE_QDSS_STM] = &xs_qdss_stm,
866 [SLAVE_TCU] = &xs_sys_tcu_cfg,
867};
868
869static const struct qcom_icc_desc sdx65_system_noc = {
870 .nodes = system_noc_nodes,
871 .num_nodes = ARRAY_SIZE(system_noc_nodes),
872 .bcms = system_noc_bcms,
873 .num_bcms = ARRAY_SIZE(system_noc_bcms),
874};
875
876static const struct of_device_id qnoc_of_match[] = {
877 { .compatible = "qcom,sdx65-mc-virt",
878 .data = &sdx65_mc_virt},
879 { .compatible = "qcom,sdx65-mem-noc",
880 .data = &sdx65_mem_noc},
881 { .compatible = "qcom,sdx65-system-noc",
882 .data = &sdx65_system_noc},
883 { }
884};
885MODULE_DEVICE_TABLE(of, qnoc_of_match);
886
887static struct platform_driver qnoc_driver = {
888 .probe = qcom_icc_rpmh_probe,
889 .remove = qcom_icc_rpmh_remove,
890 .driver = {
891 .name = "qnoc-sdx65",
892 .of_match_table = qnoc_of_match,
893 .sync_state = icc_sync_state,
894 },
895};
896module_platform_driver(qnoc_driver);
897
898MODULE_DESCRIPTION("Qualcomm SDX65 NoC driver");
899MODULE_LICENSE("GPL v2");