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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5
6#ifndef __INTEL_DISPLAY_IRQ_H__
7#define __INTEL_DISPLAY_IRQ_H__
8
9#include <linux/types.h>
10
11#include "intel_display_limits.h"
12
13enum pipe;
14struct drm_crtc;
15struct drm_printer;
16struct intel_display;
17struct intel_display_irq_snapshot;
18
19void valleyview_enable_display_irqs(struct intel_display *display);
20void valleyview_disable_display_irqs(struct intel_display *display);
21
22void ilk_update_display_irq(struct intel_display *display,
23 u32 interrupt_mask, u32 enabled_irq_mask);
24void ilk_enable_display_irq(struct intel_display *display, u32 bits);
25void ilk_disable_display_irq(struct intel_display *display, u32 bits);
26
27void bdw_update_port_irq(struct intel_display *display, u32 interrupt_mask, u32 enabled_irq_mask);
28void bdw_enable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
29void bdw_disable_pipe_irq(struct intel_display *display, enum pipe pipe, u32 bits);
30
31void ibx_display_interrupt_update(struct intel_display *display,
32 u32 interrupt_mask, u32 enabled_irq_mask);
33void ibx_enable_display_interrupt(struct intel_display *display, u32 bits);
34void ibx_disable_display_interrupt(struct intel_display *display, u32 bits);
35
36void gen8_irq_power_well_post_enable(struct intel_display *display, u8 pipe_mask);
37void gen8_irq_power_well_pre_disable(struct intel_display *display, u8 pipe_mask);
38
39int i8xx_enable_vblank(struct drm_crtc *crtc);
40int i915gm_enable_vblank(struct drm_crtc *crtc);
41int i965_enable_vblank(struct drm_crtc *crtc);
42int ilk_enable_vblank(struct drm_crtc *crtc);
43int bdw_enable_vblank(struct drm_crtc *crtc);
44void i8xx_disable_vblank(struct drm_crtc *crtc);
45void i915gm_disable_vblank(struct drm_crtc *crtc);
46void i965_disable_vblank(struct drm_crtc *crtc);
47void ilk_disable_vblank(struct drm_crtc *crtc);
48void bdw_disable_vblank(struct drm_crtc *crtc);
49
50void ilk_display_irq_master_disable(struct intel_display *display, u32 *de_ier, u32 *sde_ier);
51void ilk_display_irq_master_enable(struct intel_display *display, u32 de_ier, u32 sde_ier);
52bool ilk_display_irq_handler(struct intel_display *display);
53void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl);
54void gen11_display_irq_handler(struct intel_display *display);
55
56u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
57void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
58
59void i9xx_display_irq_reset(struct intel_display *display);
60void ilk_display_irq_reset(struct intel_display *display);
61void vlv_display_irq_reset(struct intel_display *display);
62void gen8_display_irq_reset(struct intel_display *display);
63void gen11_display_irq_reset(struct intel_display *display);
64
65u32 i9xx_display_irq_enable_mask(struct intel_display *display);
66void i915_display_irq_postinstall(struct intel_display *display);
67void i965_display_irq_postinstall(struct intel_display *display);
68void vlv_display_irq_postinstall(struct intel_display *display);
69void ilk_de_irq_postinstall(struct intel_display *display);
70void gen8_de_irq_postinstall(struct intel_display *display);
71void gen11_de_irq_postinstall(struct intel_display *display);
72void dg1_de_irq_postinstall(struct intel_display *display);
73
74u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
75void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
76void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
77
78void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
79
80void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
81void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
82void valleyview_pipestat_irq_handler(struct intel_display *display, u32 pipe_stats[I915_MAX_PIPES]);
83
84void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
85void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
86
87void intel_display_irq_init(struct intel_display *display);
88
89void i915gm_irq_cstate_wa(struct intel_display *display, bool enable);
90
91struct intel_display_irq_snapshot *intel_display_irq_snapshot_capture(struct intel_display *display);
92void intel_display_irq_snapshot_print(const struct intel_display_irq_snapshot *snapshot, struct drm_printer *p);
93
94#endif /* __INTEL_DISPLAY_IRQ_H__ */