tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/ti,tcan4x5x.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments TCAN4x5x CAN Controller
8
9maintainers:
10 - Marc Kleine-Budde <mkl@pengutronix.de>
11
12properties:
13 compatible:
14 oneOf:
15 - items:
16 - enum:
17 - ti,tcan4552
18 - ti,tcan4553
19 - const: ti,tcan4x5x
20 - const: ti,tcan4x5x
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27 description: The GPIO parent interrupt.
28
29 clocks:
30 maxItems: 1
31
32 clock-names:
33 items:
34 - const: cclk
35
36 reset-gpios:
37 description: Hardwired output GPIO. If not defined then software reset.
38 maxItems: 1
39
40 device-state-gpios:
41 description:
42 Input GPIO that indicates if the device is in a sleep state or if the
43 device is active. Not available with tcan4552/4553.
44 maxItems: 1
45
46 device-wake-gpios:
47 description:
48 Wake up GPIO to wake up the TCAN device.
49 Not available with tcan4552/4553.
50 maxItems: 1
51
52 bosch,mram-cfg:
53 description: |
54 Message RAM configuration data.
55 Multiple M_CAN instances can share the same Message RAM
56 and each element(e.g Rx FIFO or Tx Buffer and etc) number
57 in Message RAM is also configurable, so this property is
58 telling driver how the shared or private Message RAM are
59 used by this M_CAN controller.
60
61 The format should be as follows:
62 <offset sidf_elems xidf_elems rxf0_elems rxf1_elems rxb_elems txe_elems txb_elems>
63 The 'offset' is an address offset of the Message RAM where
64 the following elements start from. This is usually set to
65 0x0 if you're using a private Message RAM. The remain cells
66 are used to specify how many elements are used for each FIFO/Buffer.
67
68 M_CAN includes the following elements according to user manual:
69 11-bit Filter 0-128 elements / 0-128 words
70 29-bit Filter 0-64 elements / 0-128 words
71 Rx FIFO 0 0-64 elements / 0-1152 words
72 Rx FIFO 1 0-64 elements / 0-1152 words
73 Rx Buffers 0-64 elements / 0-1152 words
74 Tx Event FIFO 0-32 elements / 0-64 words
75 Tx Buffers 0-32 elements / 0-576 words
76
77 Please refer to 2.4.1 Message RAM Configuration in Bosch
78 M_CAN user manual for details.
79 $ref: /schemas/types.yaml#/definitions/int32-array
80 items:
81 - description: The 'offset' is an address offset of the Message RAM where
82 the following elements start from. This is usually set to 0x0 if
83 you're using a private Message RAM.
84 default: 0
85 - description: 11-bit Filter 0-128 elements / 0-128 words
86 minimum: 0
87 maximum: 128
88 - description: 29-bit Filter 0-64 elements / 0-128 words
89 minimum: 0
90 maximum: 64
91 - description: Rx FIFO 0 0-64 elements / 0-1152 words
92 minimum: 0
93 maximum: 64
94 - description: Rx FIFO 1 0-64 elements / 0-1152 words
95 minimum: 0
96 maximum: 64
97 - description: Rx Buffers 0-64 elements / 0-1152 words
98 minimum: 0
99 maximum: 64
100 - description: Tx Event FIFO 0-32 elements / 0-64 words
101 minimum: 0
102 maximum: 32
103 - description: Tx Buffers 0-32 elements / 0-576 words
104 minimum: 0
105 maximum: 32
106 minItems: 1
107
108 spi-max-frequency:
109 description:
110 Must be half or less of "clocks" frequency.
111 maximum: 18000000
112
113 ti,nwkrq-voltage-vio:
114 type: boolean
115 description:
116 nWKRQ Pin GPO buffer voltage configuration.
117 Set nWKRQ to use VIO voltage rail.
118 When not set nWKRQ will use internal voltage rail.
119
120 wakeup-source:
121 $ref: /schemas/types.yaml#/definitions/flag
122 description:
123 Enable CAN remote wakeup.
124
125allOf:
126 - $ref: can-controller.yaml#
127 - $ref: /schemas/spi/spi-peripheral-props.yaml#
128 - if:
129 properties:
130 compatible:
131 contains:
132 enum:
133 - ti,tcan4552
134 - ti,tcan4553
135 then:
136 properties:
137 device-state-gpios: false
138 device-wake-gpios: false
139
140required:
141 - compatible
142 - reg
143 - interrupts
144 - clocks
145 - clock-names
146 - bosch,mram-cfg
147
148unevaluatedProperties: false
149
150examples:
151 - |
152 #include <dt-bindings/gpio/gpio.h>
153 #include <dt-bindings/interrupt-controller/irq.h>
154
155 spi {
156 #address-cells = <1>;
157 #size-cells = <0>;
158
159 can@0 {
160 compatible = "ti,tcan4x5x";
161 reg = <0>;
162 clocks = <&can0_osc>;
163 clock-names = "cclk";
164 pinctrl-names = "default";
165 pinctrl-0 = <&can0_pins>;
166 spi-max-frequency = <10000000>;
167 bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
168 interrupt-parent = <&gpio1>;
169 interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
170 device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
171 device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
172 reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
173 ti,nwkrq-voltage-vio;
174 wakeup-source;
175 };
176 };
177 - |
178 #include <dt-bindings/gpio/gpio.h>
179 #include <dt-bindings/interrupt-controller/irq.h>
180
181 spi {
182 #address-cells = <1>;
183 #size-cells = <0>;
184
185 can@0 {
186 compatible = "ti,tcan4552", "ti,tcan4x5x";
187 reg = <0>;
188 clocks = <&can0_osc>;
189 clock-names = "cclk";
190 pinctrl-names = "default";
191 pinctrl-0 = <&can0_pins>;
192 spi-max-frequency = <10000000>;
193 bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
194 interrupt-parent = <&gpio1>;
195 interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
196 reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
197 wakeup-source;
198 };
199 };