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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2022 Intel Corporation
7 */
8
9#ifndef __INCLUDE_SOUND_SOF_IPC4_TOPOLOGY_H__
10#define __INCLUDE_SOUND_SOF_IPC4_TOPOLOGY_H__
11
12#include <sound/sof/ipc4/header.h>
13
14#define SOF_IPC4_FW_PAGE_SIZE BIT(12)
15#define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16#define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) - 1)))
17
18#define SOF_IPC4_MODULE_LOAD_TYPE GENMASK(3, 0)
19#define SOF_IPC4_MODULE_AUTO_START BIT(4)
20/*
21 * Two module schedule domains in fw :
22 * LL domain - Low latency domain
23 * DP domain - Data processing domain
24 * The LL setting should be equal to !DP setting
25 */
26#define SOF_IPC4_MODULE_LL BIT(5)
27#define SOF_IPC4_MODULE_DP BIT(6)
28#define SOF_IPC4_MODULE_LIB_CODE BIT(7)
29#define SOF_IPC4_MODULE_INIT_CONFIG_MASK GENMASK(11, 8)
30
31#define SOF_IPC4_MODULE_INIT_CONFIG_TYPE_BASE_CFG 0
32#define SOF_IPC4_MODULE_INIT_CONFIG_TYPE_BASE_CFG_WITH_EXT 1
33
34#define SOF_IPC4_MODULE_INSTANCE_LIST_ITEM_SIZE 12
35#define SOF_IPC4_PIPELINE_OBJECT_SIZE 448
36#define SOF_IPC4_DATA_QUEUE_OBJECT_SIZE 128
37#define SOF_IPC4_LL_TASK_OBJECT_SIZE 72
38#define SOF_IPC4_DP_TASK_OBJECT_SIZE 104
39#define SOF_IPC4_DP_TASK_LIST_SIZE (12 + 8)
40#define SOF_IPC4_LL_TASK_LIST_ITEM_SIZE 12
41#define SOF_IPC4_FW_MAX_PAGE_COUNT 20
42#define SOF_IPC4_FW_MAX_QUEUE_COUNT 8
43
44/* IPC4 sample types */
45#define SOF_IPC4_TYPE_MSB_INTEGER 0
46#define SOF_IPC4_TYPE_LSB_INTEGER 1
47#define SOF_IPC4_TYPE_SIGNED_INTEGER 2
48#define SOF_IPC4_TYPE_UNSIGNED_INTEGER 3
49#define SOF_IPC4_TYPE_FLOAT 4
50#define SOF_IPC4_TYPE_A_LAW 5
51#define SOF_IPC4_TYPE_MU_LAW 6
52
53/* Node index and mask applicable for host copier and ALH/HDA type DAI copiers */
54#define SOF_IPC4_NODE_INDEX_MASK 0xFF
55#define SOF_IPC4_NODE_INDEX(x) ((x) & SOF_IPC4_NODE_INDEX_MASK)
56#define SOF_IPC4_NODE_TYPE(x) ((x) << 8)
57#define SOF_IPC4_GET_NODE_TYPE(node_id) ((node_id) >> 8)
58
59/* Node ID for SSP type DAI copiers */
60#define SOF_IPC4_NODE_INDEX_INTEL_SSP(x) (((x) & 0xf) << 4)
61
62/* Node ID for DMIC type DAI copiers */
63#define SOF_IPC4_NODE_INDEX_INTEL_DMIC(x) ((x) & 0x7)
64
65#define SOF_IPC4_GAIN_ALL_CHANNELS_MASK 0xffffffff
66#define SOF_IPC4_VOL_ZERO_DB 0x7fffffff
67
68#define SOF_IPC4_DMA_DEVICE_MAX_COUNT 16
69
70#define SOF_IPC4_CHAIN_DMA_NODE_ID 0x7fffffff
71#define SOF_IPC4_INVALID_NODE_ID 0xffffffff
72
73/* FW requires minimum 4ms DMA buffer size */
74#define SOF_IPC4_MIN_DMA_BUFFER_SIZE 4
75
76/* ChainDMA in fw uses 5ms DMA buffer */
77#define SOF_IPC4_CHAIN_DMA_BUFFER_SIZE 5
78
79/*
80 * The base of multi-gateways. Multi-gateways addressing starts from
81 * ALH_MULTI_GTW_BASE and there are ALH_MULTI_GTW_COUNT multi-sources
82 * and ALH_MULTI_GTW_COUNT multi-sinks available.
83 * Addressing is continuous from ALH_MULTI_GTW_BASE to
84 * ALH_MULTI_GTW_BASE + ALH_MULTI_GTW_COUNT - 1.
85 */
86#define ALH_MULTI_GTW_BASE 0x50
87/* A magic number from FW */
88#define ALH_MULTI_GTW_COUNT 8
89
90enum sof_ipc4_copier_module_config_params {
91/*
92 * Use LARGE_CONFIG_SET to initialize timestamp event. Ipc mailbox must
93 * contain properly built CopierConfigTimestampInitData struct.
94 */
95 SOF_IPC4_COPIER_MODULE_CFG_PARAM_TIMESTAMP_INIT = 1,
96/*
97 * Use LARGE_CONFIG_SET to initialize copier sink. Ipc mailbox must contain
98 * properly built CopierConfigSetSinkFormat struct.
99 */
100 SOF_IPC4_COPIER_MODULE_CFG_PARAM_SET_SINK_FORMAT,
101/*
102 * Use LARGE_CONFIG_SET to initialize and enable on Copier data segment
103 * event. Ipc mailbox must contain properly built DataSegmentEnabled struct.
104 */
105 SOF_IPC4_COPIER_MODULE_CFG_PARAM_DATA_SEGMENT_ENABLED,
106/*
107 * Use LARGE_CONFIG_GET to retrieve Linear Link Position (LLP) value for non
108 * HD-A gateways.
109 */
110 SOF_IPC4_COPIER_MODULE_CFG_PARAM_LLP_READING,
111/*
112 * Use LARGE_CONFIG_GET to retrieve Linear Link Position (LLP) value for non
113 * HD-A gateways and corresponding total processed data
114 */
115 SOF_IPC4_COPIER_MODULE_CFG_PARAM_LLP_READING_EXTENDED,
116/*
117 * Use LARGE_CONFIG_SET to setup attenuation on output pins. Data is just uint32_t.
118 * note Config is only allowed when output pin is set up for 32bit and source
119 * is connected to Gateway
120 */
121 SOF_IPC4_COPIER_MODULE_CFG_ATTENUATION,
122};
123
124/* Scheduling domain, unset, Low Latency, or Data Processing */
125enum sof_comp_domain {
126 SOF_COMP_DOMAIN_UNSET = 0, /* Take domain value from manifest */
127 SOF_COMP_DOMAIN_LL, /* Low Latency scheduling domain */
128 SOF_COMP_DOMAIN_DP, /* Data Processing scheduling domain */
129};
130
131struct sof_ipc4_copier_config_set_sink_format {
132/* Id of sink */
133 u32 sink_id;
134/*
135 * Input format used by the source
136 * attention must be the same as present if already initialized.
137 */
138 struct sof_ipc4_audio_format source_fmt;
139/* Output format used by the sink */
140 struct sof_ipc4_audio_format sink_fmt;
141} __packed __aligned(4);
142
143/**
144 * struct sof_ipc4_pipeline - pipeline config data
145 * @priority: Priority of this pipeline
146 * @lp_mode: Low power mode
147 * @mem_usage: Memory usage
148 * @core_id: Target core for the pipeline
149 * @state: Pipeline state
150 * @use_chain_dma: flag to indicate if the firmware shall use chained DMA
151 * @msg: message structure for pipeline
152 * @skip_during_fe_trigger: skip triggering this pipeline during the FE DAI trigger
153 */
154struct sof_ipc4_pipeline {
155 uint32_t priority;
156 uint32_t lp_mode;
157 uint32_t mem_usage;
158 uint32_t core_id;
159 int state;
160 bool use_chain_dma;
161 struct sof_ipc4_msg msg;
162 bool skip_during_fe_trigger;
163};
164
165/**
166 * struct sof_ipc4_multi_pipeline_data - multi pipeline trigger IPC data
167 * @count: Number of pipelines to be triggered
168 * @pipeline_instance_ids: Flexible array of IDs of the pipelines to be triggered
169 */
170struct ipc4_pipeline_set_state_data {
171 u32 count;
172 DECLARE_FLEX_ARRAY(u32, pipeline_instance_ids);
173} __packed;
174
175/**
176 * struct sof_ipc4_pin_format - Module pin format
177 * @pin_index: pin index
178 * @buffer_size: buffer size in bytes
179 * @audio_fmt: audio format for the pin
180 *
181 * This structure can be used for both output or input pins and the pin_index is relative to the
182 * pin type i.e output/input pin
183 */
184struct sof_ipc4_pin_format {
185 u32 pin_index;
186 u32 buffer_size;
187 struct sof_ipc4_audio_format audio_fmt;
188};
189
190/**
191 * struct sof_ipc4_available_audio_format - Available audio formats
192 * @output_pin_fmts: Available output pin formats
193 * @input_pin_fmts: Available input pin formats
194 * @num_input_formats: Number of input pin formats
195 * @num_output_formats: Number of output pin formats
196 */
197struct sof_ipc4_available_audio_format {
198 struct sof_ipc4_pin_format *output_pin_fmts;
199 struct sof_ipc4_pin_format *input_pin_fmts;
200 u32 num_input_formats;
201 u32 num_output_formats;
202};
203
204/**
205 * struct sof_copier_gateway_cfg - IPC gateway configuration
206 * @node_id: ID of Gateway Node
207 * @dma_buffer_size: Preferred Gateway DMA buffer size (in bytes)
208 * @config_length: Length of gateway node configuration blob specified in #config_data
209 * config_data: Gateway node configuration blob
210 */
211struct sof_copier_gateway_cfg {
212 uint32_t node_id;
213 uint32_t dma_buffer_size;
214 uint32_t config_length;
215 uint32_t config_data[];
216};
217
218/**
219 * struct sof_ipc4_copier_data - IPC data for copier
220 * @base_config: Base configuration including input audio format
221 * @out_format: Output audio format
222 * @copier_feature_mask: Copier feature mask
223 * @gtw_cfg: Gateway configuration
224 */
225struct sof_ipc4_copier_data {
226 struct sof_ipc4_base_module_cfg base_config;
227 struct sof_ipc4_audio_format out_format;
228 uint32_t copier_feature_mask;
229 struct sof_copier_gateway_cfg gtw_cfg;
230};
231
232/**
233 * struct sof_ipc4_gtw_attributes: Gateway attributes
234 * @lp_buffer_alloc: Gateway data requested in low power memory
235 * @alloc_from_reg_file: Gateway data requested in register file memory
236 * @rsvd: reserved for future use
237 */
238struct sof_ipc4_gtw_attributes {
239 uint32_t lp_buffer_alloc : 1;
240 uint32_t alloc_from_reg_file : 1;
241 uint32_t rsvd : 30;
242};
243
244/**
245 * struct sof_ipc4_dma_device_stream_ch_map: abstract representation of
246 * channel mapping to DMAs
247 * @device: representation of hardware device address or FIFO
248 * @channel_mask: channels handled by @device. Channels are expected to be
249 * contiguous
250 */
251struct sof_ipc4_dma_device_stream_ch_map {
252 uint32_t device;
253 uint32_t channel_mask;
254};
255
256/**
257 * struct sof_ipc4_dma_stream_ch_map: DMA configuration data
258 * @device_count: Number valid items in mapping array
259 * @mapping: device address and channel mask
260 */
261struct sof_ipc4_dma_stream_ch_map {
262 uint32_t device_count;
263 struct sof_ipc4_dma_device_stream_ch_map mapping[SOF_IPC4_DMA_DEVICE_MAX_COUNT];
264} __packed;
265
266#define SOF_IPC4_DMA_METHOD_HDA 1
267#define SOF_IPC4_DMA_METHOD_GPDMA 2 /* defined for consistency but not used */
268
269#define SOF_IPC4_CHAIN_DMA_BUF_SIZE_MS 2
270
271/**
272 * struct sof_ipc4_dma_config: DMA configuration
273 * @dma_method: HDAudio or GPDMA
274 * @pre_allocated_by_host: 1 if host driver allocates DMA channels, 0 otherwise
275 * @dma_channel_id: for HDaudio defined as @stream_id - 1
276 * @stream_id: HDaudio stream tag
277 * @dma_stream_channel_map: array of device/channel mappings
278 * @dma_priv_config_size: currently not used
279 * @dma_priv_config: currently not used
280 */
281struct sof_ipc4_dma_config {
282 uint8_t dma_method;
283 uint8_t pre_allocated_by_host;
284 uint16_t rsvd;
285 uint32_t dma_channel_id;
286 uint32_t stream_id;
287 struct sof_ipc4_dma_stream_ch_map dma_stream_channel_map;
288 uint32_t dma_priv_config_size;
289 uint8_t dma_priv_config[];
290} __packed;
291
292#define SOF_IPC4_GTW_DMA_CONFIG_ID 0x1000
293
294/**
295 * struct sof_ipc4_dma_config: DMA configuration
296 * @type: set to SOF_IPC4_GTW_DMA_CONFIG_ID
297 * @length: sizeof(struct sof_ipc4_dma_config) + dma_config.dma_priv_config_size
298 * @dma_config: actual DMA configuration
299 */
300struct sof_ipc4_dma_config_tlv {
301 uint32_t type;
302 uint32_t length;
303 struct sof_ipc4_dma_config dma_config;
304} __packed;
305
306/** struct sof_ipc4_alh_configuration_blob: ALH blob
307 * @gw_attr: Gateway attributes
308 * @alh_cfg: ALH configuration data
309 */
310struct sof_ipc4_alh_configuration_blob {
311 struct sof_ipc4_gtw_attributes gw_attr;
312 struct sof_ipc4_dma_stream_ch_map alh_cfg;
313};
314
315/**
316 * struct sof_ipc4_copier - copier config data
317 * @data: IPC copier data
318 * @copier_config: Copier + blob
319 * @ipc_config_size: Size of copier_config
320 * @available_fmt: Available audio format
321 * @frame_fmt: frame format
322 * @msg: message structure for copier
323 * @gtw_attr: Gateway attributes for copier blob
324 * @dai_type: DAI type
325 * @dai_index: DAI index
326 * @dma_config_tlv: DMA configuration
327 */
328struct sof_ipc4_copier {
329 struct sof_ipc4_copier_data data;
330 u32 *copier_config;
331 uint32_t ipc_config_size;
332 void *ipc_config_data;
333 struct sof_ipc4_available_audio_format available_fmt;
334 u32 frame_fmt;
335 struct sof_ipc4_msg msg;
336 struct sof_ipc4_gtw_attributes *gtw_attr;
337 u32 dai_type;
338 int dai_index;
339 struct sof_ipc4_dma_config_tlv dma_config_tlv[SOF_IPC4_DMA_DEVICE_MAX_COUNT];
340};
341
342/**
343 * struct sof_ipc4_ctrl_value_chan: generic channel mapped value data
344 * @channel: Channel ID
345 * @value: Value associated with @channel
346 */
347struct sof_ipc4_ctrl_value_chan {
348 u32 channel;
349 u32 value;
350};
351
352/**
353 * struct sof_ipc4_control_data - IPC data for kcontrol IO
354 * @msg: message structure for kcontrol IO
355 * @index: pipeline ID
356 * @chanv: channel ID and value array used by volume type controls
357 * @data: data for binary kcontrols
358 */
359struct sof_ipc4_control_data {
360 struct sof_ipc4_msg msg;
361 int index;
362
363 union {
364 DECLARE_FLEX_ARRAY(struct sof_ipc4_ctrl_value_chan, chanv);
365 DECLARE_FLEX_ARRAY(struct sof_abi_hdr, data);
366 };
367};
368
369#define SOF_IPC4_SWITCH_CONTROL_PARAM_ID 200
370#define SOF_IPC4_ENUM_CONTROL_PARAM_ID 201
371
372/**
373 * struct sof_ipc4_control_msg_payload - IPC payload for kcontrol parameters
374 * @id: unique id of the control
375 * @num_elems: Number of elements in the chanv array
376 * @reserved: reserved for future use, must be set to 0
377 * @chanv: channel ID and value array
378 */
379struct sof_ipc4_control_msg_payload {
380 uint16_t id;
381 uint16_t num_elems;
382 uint32_t reserved[4];
383 DECLARE_FLEX_ARRAY(struct sof_ipc4_ctrl_value_chan, chanv);
384} __packed;
385
386/**
387 * struct sof_ipc4_gain_params - IPC gain parameters
388 * @channels: Channels
389 * @init_val: Initial value
390 * @curve_type: Curve type
391 * @reserved: reserved for future use
392 * @curve_duration_l: Curve duration low part
393 * @curve_duration_h: Curve duration high part
394 */
395struct sof_ipc4_gain_params {
396 uint32_t channels;
397 uint32_t init_val;
398 uint32_t curve_type;
399 uint32_t reserved;
400 uint32_t curve_duration_l;
401 uint32_t curve_duration_h;
402} __packed __aligned(4);
403
404/**
405 * struct sof_ipc4_gain_data - IPC gain init blob
406 * @base_config: IPC base config data
407 * @params: Initial parameters for the gain module
408 */
409struct sof_ipc4_gain_data {
410 struct sof_ipc4_base_module_cfg base_config;
411 struct sof_ipc4_gain_params params;
412} __packed __aligned(4);
413
414/**
415 * struct sof_ipc4_gain - gain config data
416 * @data: IPC gain blob
417 * @available_fmt: Available audio format
418 * @msg: message structure for gain
419 */
420struct sof_ipc4_gain {
421 struct sof_ipc4_gain_data data;
422 struct sof_ipc4_available_audio_format available_fmt;
423 struct sof_ipc4_msg msg;
424};
425
426/**
427 * struct sof_ipc4_mixer - mixer config data
428 * @base_config: IPC base config data
429 * @available_fmt: Available audio format
430 * @msg: IPC4 message struct containing header and data info
431 */
432struct sof_ipc4_mixer {
433 struct sof_ipc4_base_module_cfg base_config;
434 struct sof_ipc4_available_audio_format available_fmt;
435 struct sof_ipc4_msg msg;
436};
437
438/*
439 * struct sof_ipc4_src_data - IPC data for SRC
440 * @base_config: IPC base config data
441 * @sink_rate: Output rate for sink module
442 */
443struct sof_ipc4_src_data {
444 struct sof_ipc4_base_module_cfg base_config;
445 uint32_t sink_rate;
446} __packed __aligned(4);
447
448/**
449 * struct sof_ipc4_src - SRC config data
450 * @data: IPC base config data
451 * @available_fmt: Available audio format
452 * @msg: IPC4 message struct containing header and data info
453 */
454struct sof_ipc4_src {
455 struct sof_ipc4_src_data data;
456 struct sof_ipc4_available_audio_format available_fmt;
457 struct sof_ipc4_msg msg;
458};
459
460/*
461 * struct sof_ipc4_asrc_data - IPC data for ASRC
462 * @base_config: IPC base config data
463 * @out_freq: Output rate for sink module, passed as such from topology to FW.
464 * @asrc_mode: Control for ASRC features with bit-fields, passed as such from topolgy to FW.
465 */
466struct sof_ipc4_asrc_data {
467 struct sof_ipc4_base_module_cfg base_config;
468 uint32_t out_freq;
469 uint32_t asrc_mode;
470} __packed __aligned(4);
471
472/**
473 * struct sof_ipc4_asrc - ASRC config data
474 * @data: IPC base config data
475 * @available_fmt: Available audio format
476 * @msg: IPC4 message struct containing header and data info
477 */
478struct sof_ipc4_asrc {
479 struct sof_ipc4_asrc_data data;
480 struct sof_ipc4_available_audio_format available_fmt;
481 struct sof_ipc4_msg msg;
482};
483
484/**
485 * struct sof_ipc4_base_module_cfg_ext - base module config extension containing the pin format
486 * information for the module. Both @num_input_pin_fmts and @num_output_pin_fmts cannot be 0 for a
487 * module.
488 * @num_input_pin_fmts: number of input pin formats in the @pin_formats array
489 * @num_output_pin_fmts: number of output pin formats in the @pin_formats array
490 * @reserved: reserved for future use
491 * @pin_formats: flexible array consisting of @num_input_pin_fmts input pin format items followed
492 * by @num_output_pin_fmts output pin format items
493 */
494struct sof_ipc4_base_module_cfg_ext {
495 u16 num_input_pin_fmts;
496 u16 num_output_pin_fmts;
497 u8 reserved[12];
498 DECLARE_FLEX_ARRAY(struct sof_ipc4_pin_format, pin_formats);
499} __packed;
500
501/**
502 * struct sof_ipc4_process - process config data
503 * @base_config: IPC base config data
504 * @base_config_ext: Base config extension data for module init
505 * @output_format: Output audio format
506 * @available_fmt: Available audio format
507 * @ipc_config_data: Process module config data
508 * @ipc_config_size: Size of process module config data
509 * @msg: IPC4 message struct containing header and data info
510 * @base_config_ext_size: Size of the base config extension data in bytes
511 * @init_config: Module init config type (SOF_IPC4_MODULE_INIT_CONFIG_TYPE_*)
512 */
513struct sof_ipc4_process {
514 struct sof_ipc4_base_module_cfg base_config;
515 struct sof_ipc4_base_module_cfg_ext *base_config_ext;
516 struct sof_ipc4_audio_format output_format;
517 struct sof_ipc4_available_audio_format available_fmt;
518 void *ipc_config_data;
519 uint32_t ipc_config_size;
520 struct sof_ipc4_msg msg;
521 u32 base_config_ext_size;
522 u32 init_config;
523};
524
525bool sof_ipc4_copier_is_single_bitdepth(struct snd_sof_dev *sdev,
526 struct sof_ipc4_pin_format *pin_fmts,
527 u32 pin_fmts_size);
528#endif