tjh.dev
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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Hardware monitoring driver for Maxim MAX6620
4 *
5 * Originally from L. Grunenberg.
6 * (C) 2012 by L. Grunenberg <contact@lgrunenberg.de>
7 *
8 * Copyright (c) 2021 Dell Inc. or its subsidiaries. All Rights Reserved.
9 *
10 * based on code written by :
11 * 2007 by Hans J. Koch <hjk@hansjkoch.de>
12 * John Morris <john.morris@spirentcom.com>
13 * Copyright (c) 2003 Spirent Communications
14 * and Claus Gindhart <claus.gindhart@kontron.com>
15 *
16 * This module has only been tested with the MAX6620 chip.
17 *
18 * The datasheet was last seen at:
19 *
20 * http://pdfserv.maxim-ic.com/en/ds/MAX6620.pdf
21 *
22 */
23
24#include <linux/bits.h>
25#include <linux/err.h>
26#include <linux/hwmon.h>
27#include <linux/i2c.h>
28#include <linux/init.h>
29#include <linux/jiffies.h>
30#include <linux/module.h>
31#include <linux/slab.h>
32
33/*
34 * MAX 6620 registers
35 */
36
37#define MAX6620_REG_CONFIG 0x00
38#define MAX6620_REG_FAULT 0x01
39#define MAX6620_REG_CONF_FAN0 0x02
40#define MAX6620_REG_CONF_FAN1 0x03
41#define MAX6620_REG_CONF_FAN2 0x04
42#define MAX6620_REG_CONF_FAN3 0x05
43#define MAX6620_REG_DYN_FAN0 0x06
44#define MAX6620_REG_DYN_FAN1 0x07
45#define MAX6620_REG_DYN_FAN2 0x08
46#define MAX6620_REG_DYN_FAN3 0x09
47#define MAX6620_REG_TACH0 0x10
48#define MAX6620_REG_TACH1 0x12
49#define MAX6620_REG_TACH2 0x14
50#define MAX6620_REG_TACH3 0x16
51#define MAX6620_REG_VOLT0 0x18
52#define MAX6620_REG_VOLT1 0x1A
53#define MAX6620_REG_VOLT2 0x1C
54#define MAX6620_REG_VOLT3 0x1E
55#define MAX6620_REG_TAR0 0x20
56#define MAX6620_REG_TAR1 0x22
57#define MAX6620_REG_TAR2 0x24
58#define MAX6620_REG_TAR3 0x26
59#define MAX6620_REG_DAC0 0x28
60#define MAX6620_REG_DAC1 0x2A
61#define MAX6620_REG_DAC2 0x2C
62#define MAX6620_REG_DAC3 0x2E
63
64/*
65 * Config register bits
66 */
67
68#define MAX6620_CFG_RUN BIT(7)
69#define MAX6620_CFG_POR BIT(6)
70#define MAX6620_CFG_TIMEOUT BIT(5)
71#define MAX6620_CFG_FULLFAN BIT(4)
72#define MAX6620_CFG_OSC BIT(3)
73#define MAX6620_CFG_WD_MASK (BIT(2) | BIT(1))
74#define MAX6620_CFG_WD_2 BIT(1)
75#define MAX6620_CFG_WD_6 BIT(2)
76#define MAX6620_CFG_WD10 (BIT(2) | BIT(1))
77#define MAX6620_CFG_WD BIT(0)
78
79/*
80 * Failure status register bits
81 */
82
83#define MAX6620_FAIL_TACH0 BIT(4)
84#define MAX6620_FAIL_TACH1 BIT(5)
85#define MAX6620_FAIL_TACH2 BIT(6)
86#define MAX6620_FAIL_TACH3 BIT(7)
87#define MAX6620_FAIL_MASK0 BIT(0)
88#define MAX6620_FAIL_MASK1 BIT(1)
89#define MAX6620_FAIL_MASK2 BIT(2)
90#define MAX6620_FAIL_MASK3 BIT(3)
91
92#define MAX6620_CLOCK_FREQ 8192 /* Clock frequency in Hz */
93#define MAX6620_PULSE_PER_REV 2 /* Tachometer pulses per revolution */
94
95/* Minimum and maximum values of the FAN-RPM */
96#define FAN_RPM_MIN 240
97#define FAN_RPM_MAX 30000
98
99static const u8 config_reg[] = {
100 MAX6620_REG_CONF_FAN0,
101 MAX6620_REG_CONF_FAN1,
102 MAX6620_REG_CONF_FAN2,
103 MAX6620_REG_CONF_FAN3,
104};
105
106static const u8 dyn_reg[] = {
107 MAX6620_REG_DYN_FAN0,
108 MAX6620_REG_DYN_FAN1,
109 MAX6620_REG_DYN_FAN2,
110 MAX6620_REG_DYN_FAN3,
111};
112
113static const u8 tach_reg[] = {
114 MAX6620_REG_TACH0,
115 MAX6620_REG_TACH1,
116 MAX6620_REG_TACH2,
117 MAX6620_REG_TACH3,
118};
119
120static const u8 target_reg[] = {
121 MAX6620_REG_TAR0,
122 MAX6620_REG_TAR1,
123 MAX6620_REG_TAR2,
124 MAX6620_REG_TAR3,
125};
126
127/*
128 * Client data (each client gets its own)
129 */
130
131struct max6620_data {
132 struct i2c_client *client;
133 bool valid; /* false until following fields are valid */
134 unsigned long last_updated; /* in jiffies */
135
136 /* register values */
137 u8 fancfg[4];
138 u8 fandyn[4];
139 u8 fault;
140 u16 tach[4];
141 u16 target[4];
142};
143
144static u8 max6620_fan_div_from_reg(u8 val)
145{
146 return BIT((val & 0xE0) >> 5);
147}
148
149static u16 max6620_fan_rpm_to_tach(u8 div, int rpm)
150{
151 return (60 * div * MAX6620_CLOCK_FREQ) / (rpm * MAX6620_PULSE_PER_REV);
152}
153
154static int max6620_fan_tach_to_rpm(u8 div, u16 tach)
155{
156 return (60 * div * MAX6620_CLOCK_FREQ) / (tach * MAX6620_PULSE_PER_REV);
157}
158
159static int max6620_update_device(struct device *dev)
160{
161 struct max6620_data *data = dev_get_drvdata(dev);
162 struct i2c_client *client = data->client;
163 int i, ret;
164
165 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
166 for (i = 0; i < 4; i++) {
167 ret = i2c_smbus_read_byte_data(client, config_reg[i]);
168 if (ret < 0)
169 return ret;
170 data->fancfg[i] = ret;
171
172 ret = i2c_smbus_read_byte_data(client, dyn_reg[i]);
173 if (ret < 0)
174 return ret;
175 data->fandyn[i] = ret;
176
177 ret = i2c_smbus_read_byte_data(client, tach_reg[i]);
178 if (ret < 0)
179 return ret;
180 data->tach[i] = (ret << 3) & 0x7f8;
181 ret = i2c_smbus_read_byte_data(client, tach_reg[i] + 1);
182 if (ret < 0)
183 return ret;
184 data->tach[i] |= (ret >> 5) & 0x7;
185
186 ret = i2c_smbus_read_byte_data(client, target_reg[i]);
187 if (ret < 0)
188 return ret;
189 data->target[i] = (ret << 3) & 0x7f8;
190 ret = i2c_smbus_read_byte_data(client, target_reg[i] + 1);
191 if (ret < 0)
192 return ret;
193 data->target[i] |= (ret >> 5) & 0x7;
194 }
195
196 /*
197 * Alarms are cleared on read in case the condition that
198 * caused the alarm is removed. Keep the value latched here
199 * for providing the register through different alarm files.
200 */
201 ret = i2c_smbus_read_byte_data(client, MAX6620_REG_FAULT);
202 if (ret < 0)
203 return ret;
204 data->fault |= (ret >> 4) & (ret & 0x0F);
205
206 data->last_updated = jiffies;
207 data->valid = true;
208 }
209 return 0;
210}
211
212static umode_t
213max6620_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
214 int channel)
215{
216 switch (type) {
217 case hwmon_fan:
218 switch (attr) {
219 case hwmon_fan_alarm:
220 case hwmon_fan_input:
221 return 0444;
222 case hwmon_fan_div:
223 case hwmon_fan_target:
224 return 0644;
225 default:
226 break;
227 }
228 break;
229 default:
230 break;
231 }
232
233 return 0;
234}
235
236static int
237max6620_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
238 int channel, long *val)
239{
240 struct max6620_data *data;
241 struct i2c_client *client;
242 int ret;
243 u8 div;
244 u8 val1;
245 u8 val2;
246
247 ret = max6620_update_device(dev);
248 if (ret < 0)
249 return ret;
250 data = dev_get_drvdata(dev);
251 client = data->client;
252
253 switch (type) {
254 case hwmon_fan:
255 switch (attr) {
256 case hwmon_fan_alarm:
257 *val = !!(data->fault & BIT(channel));
258
259 /* Setting TACH count to re-enable fan fault detection */
260 if (*val == 1) {
261 val1 = (data->target[channel] >> 3) & 0xff;
262 val2 = (data->target[channel] << 5) & 0xe0;
263 ret = i2c_smbus_write_byte_data(client,
264 target_reg[channel], val1);
265 if (ret < 0)
266 return ret;
267 ret = i2c_smbus_write_byte_data(client,
268 target_reg[channel] + 1, val2);
269 if (ret < 0)
270 return ret;
271
272 data->fault &= ~BIT(channel);
273 }
274 break;
275 case hwmon_fan_div:
276 *val = max6620_fan_div_from_reg(data->fandyn[channel]);
277 break;
278 case hwmon_fan_input:
279 if (data->tach[channel] == 0) {
280 *val = 0;
281 } else {
282 div = max6620_fan_div_from_reg(data->fandyn[channel]);
283 *val = max6620_fan_tach_to_rpm(div, data->tach[channel]);
284 }
285 break;
286 case hwmon_fan_target:
287 if (data->target[channel] == 0) {
288 *val = 0;
289 } else {
290 div = max6620_fan_div_from_reg(data->fandyn[channel]);
291 *val = max6620_fan_tach_to_rpm(div, data->target[channel]);
292 }
293 break;
294 default:
295 return -EOPNOTSUPP;
296 }
297 break;
298
299 default:
300 return -EOPNOTSUPP;
301 }
302
303 return 0;
304}
305
306static int
307max6620_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
308 int channel, long val)
309{
310 struct max6620_data *data;
311 struct i2c_client *client;
312 int ret;
313 u8 div;
314 u16 tach;
315 u8 val1;
316 u8 val2;
317
318 ret = max6620_update_device(dev);
319 if (ret < 0)
320 return ret;
321 data = dev_get_drvdata(dev);
322 client = data->client;
323
324 switch (type) {
325 case hwmon_fan:
326 switch (attr) {
327 case hwmon_fan_div:
328 switch (val) {
329 case 1:
330 div = 0;
331 break;
332 case 2:
333 div = 1;
334 break;
335 case 4:
336 div = 2;
337 break;
338 case 8:
339 div = 3;
340 break;
341 case 16:
342 div = 4;
343 break;
344 case 32:
345 div = 5;
346 break;
347 default:
348 return -EINVAL;
349 }
350 data->fandyn[channel] &= 0x1F;
351 data->fandyn[channel] |= div << 5;
352 ret = i2c_smbus_write_byte_data(client, dyn_reg[channel],
353 data->fandyn[channel]);
354 break;
355 case hwmon_fan_target:
356 val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
357 div = max6620_fan_div_from_reg(data->fandyn[channel]);
358 tach = max6620_fan_rpm_to_tach(div, val);
359 val1 = (tach >> 3) & 0xff;
360 val2 = (tach << 5) & 0xe0;
361 ret = i2c_smbus_write_byte_data(client, target_reg[channel], val1);
362 if (ret < 0)
363 break;
364 ret = i2c_smbus_write_byte_data(client, target_reg[channel] + 1, val2);
365 if (ret < 0)
366 break;
367
368 /* Setting TACH count re-enables fan fault detection */
369 data->fault &= ~BIT(channel);
370
371 break;
372 default:
373 ret = -EOPNOTSUPP;
374 break;
375 }
376 break;
377
378 default:
379 ret = -EOPNOTSUPP;
380 break;
381 }
382
383 return ret;
384}
385
386static const struct hwmon_channel_info * const max6620_info[] = {
387 HWMON_CHANNEL_INFO(fan,
388 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
389 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
390 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
391 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM),
392 NULL
393};
394
395static const struct hwmon_ops max6620_hwmon_ops = {
396 .read = max6620_read,
397 .write = max6620_write,
398 .is_visible = max6620_is_visible,
399};
400
401static const struct hwmon_chip_info max6620_chip_info = {
402 .ops = &max6620_hwmon_ops,
403 .info = max6620_info,
404};
405
406static int max6620_init_client(struct max6620_data *data)
407{
408 struct i2c_client *client = data->client;
409 int config;
410 int err;
411 int i;
412 int reg;
413
414 config = i2c_smbus_read_byte_data(client, MAX6620_REG_CONFIG);
415 if (config < 0) {
416 dev_err(&client->dev, "Error reading config, aborting.\n");
417 return config;
418 }
419
420 /*
421 * Set bit 4, disable other fans from going full speed on a fail
422 * failure.
423 */
424 err = i2c_smbus_write_byte_data(client, MAX6620_REG_CONFIG, config | 0x10);
425 if (err < 0) {
426 dev_err(&client->dev, "Config write error, aborting.\n");
427 return err;
428 }
429
430 for (i = 0; i < 4; i++) {
431 reg = i2c_smbus_read_byte_data(client, config_reg[i]);
432 if (reg < 0)
433 return reg;
434 data->fancfg[i] = reg;
435
436 /* Enable RPM mode */
437 data->fancfg[i] |= 0xa8;
438 err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]);
439 if (err < 0)
440 return err;
441
442 /* 2 counts (001) and Rate change 100 (0.125 secs) */
443 data->fandyn[i] = 0x30;
444 err = i2c_smbus_write_byte_data(client, dyn_reg[i], data->fandyn[i]);
445 if (err < 0)
446 return err;
447 }
448 return 0;
449}
450
451static int max6620_probe(struct i2c_client *client)
452{
453 struct device *dev = &client->dev;
454 struct max6620_data *data;
455 struct device *hwmon_dev;
456 int err;
457
458 data = devm_kzalloc(dev, sizeof(struct max6620_data), GFP_KERNEL);
459 if (!data)
460 return -ENOMEM;
461
462 data->client = client;
463
464 err = max6620_init_client(data);
465 if (err)
466 return err;
467
468 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
469 data,
470 &max6620_chip_info,
471 NULL);
472
473 return PTR_ERR_OR_ZERO(hwmon_dev);
474}
475
476static const struct i2c_device_id max6620_id[] = {
477 { "max6620" },
478 { }
479};
480MODULE_DEVICE_TABLE(i2c, max6620_id);
481
482static struct i2c_driver max6620_driver = {
483 .class = I2C_CLASS_HWMON,
484 .driver = {
485 .name = "max6620",
486 },
487 .probe = max6620_probe,
488 .id_table = max6620_id,
489};
490
491module_i2c_driver(max6620_driver);
492
493MODULE_AUTHOR("Lucas Grunenberg");
494MODULE_DESCRIPTION("MAX6620 sensor driver");
495MODULE_LICENSE("GPL");