tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5#ifndef _XE_REGS_H_
6#define _XE_REGS_H_
7
8#include "regs/xe_reg_defs.h"
9
10#define SOC_BASE 0x280000
11
12#define GU_CNTL_PROTECTED XE_REG(0x10100C)
13#define DRIVERINT_FLR_DIS REG_BIT(31)
14
15#define GU_CNTL XE_REG(0x101010)
16#define LMEM_INIT REG_BIT(7)
17#define DRIVERFLR REG_BIT(31)
18
19#define XEHP_CLOCK_GATE_DIS XE_REG(0x101014)
20#define SGSI_SIDECLK_DIS REG_BIT(17)
21
22#define GU_DEBUG XE_REG(0x101018)
23#define DRIVERFLR_STATUS REG_BIT(31)
24
25#define VIRTUAL_CTRL_REG XE_REG(0x10108c)
26#define GUEST_GTT_UPDATE_EN REG_BIT(8)
27
28#define XEHP_MTCFG_ADDR XE_REG(0x101800)
29#define TILE_COUNT REG_GENMASK(15, 8)
30
31#define GGC XE_REG(0x108040)
32#define GMS_MASK REG_GENMASK(15, 8)
33#define GGMS_MASK REG_GENMASK(7, 6)
34
35#define DSMBASE XE_REG(0x1080C0)
36#define BDSM_MASK REG_GENMASK64(63, 20)
37
38#define GSMBASE XE_REG(0x108100)
39
40#define STOLEN_RESERVED XE_REG(0x1082c0)
41#define WOPCM_SIZE_MASK REG_GENMASK64(9, 7)
42
43#define SG_TILE_ADDR_RANGE(_idx) XE_REG(0x1083a0 + (_idx) * 4)
44
45#define MTL_RP_STATE_CAP XE_REG(0x138000)
46
47#define MTL_GT_RPA_FREQUENCY XE_REG(0x138008)
48#define MTL_GT_RPE_FREQUENCY XE_REG(0x13800c)
49
50#define MTL_MEDIAP_STATE_CAP XE_REG(0x138020)
51#define MTL_RPN_CAP_MASK REG_GENMASK(24, 16)
52#define MTL_RP0_CAP_MASK REG_GENMASK(8, 0)
53
54#define MTL_MPA_FREQUENCY XE_REG(0x138028)
55#define MTL_RPA_MASK REG_GENMASK(8, 0)
56
57#define MTL_MPE_FREQUENCY XE_REG(0x13802c)
58#define MTL_RPE_MASK REG_GENMASK(8, 0)
59
60#define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF)
61#define VF_CAP REG_BIT(0)
62
63#define PVC_RP_STATE_CAP XE_REG(0x281014)
64
65#endif