tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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kernel / drivers / gpu / drm / panel / panel-novatek-nt36523.c
at v6.19-rc7 1272 lines 62 kB view raw
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Novatek NT36523 DriverIC panels driver 4 * 5 * Copyright (c) 2022, 2023 Jianhua Lu <lujianhua000@gmail.com> 6 */ 7 8#include <linux/backlight.h> 9#include <linux/delay.h> 10#include <linux/gpio/consumer.h> 11#include <linux/module.h> 12#include <linux/of.h> 13#include <linux/of_graph.h> 14#include <linux/regulator/consumer.h> 15 16#include <video/mipi_display.h> 17 18#include <drm/drm_connector.h> 19#include <drm/drm_crtc.h> 20#include <drm/drm_mipi_dsi.h> 21#include <drm/drm_modes.h> 22#include <drm/drm_panel.h> 23 24#define DSI_NUM_MIN 1 25 26struct panel_info { 27 struct drm_panel panel; 28 struct mipi_dsi_device *dsi[2]; 29 const struct panel_desc *desc; 30 enum drm_panel_orientation orientation; 31 32 struct gpio_desc *reset_gpio; 33 struct backlight_device *backlight; 34 struct regulator *vddio; 35}; 36 37struct panel_desc { 38 unsigned int width_mm; 39 unsigned int height_mm; 40 41 unsigned int bpc; 42 unsigned int lanes; 43 unsigned long mode_flags; 44 enum mipi_dsi_pixel_format format; 45 46 const struct drm_display_mode *modes; 47 unsigned int num_modes; 48 const struct mipi_dsi_device_info dsi_info; 49 int (*init_sequence)(struct panel_info *pinfo); 50 51 bool is_dual_dsi; 52 bool has_dcs_backlight; 53}; 54 55static inline struct panel_info *to_panel_info(struct drm_panel *panel) 56{ 57 return container_of(panel, struct panel_info, panel); 58} 59 60static int elish_boe_init_sequence(struct panel_info *pinfo) 61{ 62 struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; 63 struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; 64 struct mipi_dsi_multi_context dsi_ctx = { .dsi = NULL }; 65 /* No datasheet, so write magic init sequence directly */ 66 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 67 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 68 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x05); 69 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x20); 70 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 71 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x18, 0x40); 72 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 73 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 74 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x02); 75 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x23); 76 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 77 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x00, 0x80); 78 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x01, 0x84); 79 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x05, 0x2d); 80 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x06, 0x00); 81 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x07, 0x00); 82 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x08, 0x01); 83 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x09, 0x45); 84 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x11, 0x02); 85 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x12, 0x80); 86 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x15, 0x83); 87 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x16, 0x0c); 88 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x29, 0x0a); 89 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x30, 0xff); 90 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x31, 0xfe); 91 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x32, 0xfd); 92 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x33, 0xfb); 93 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x34, 0xf8); 94 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x35, 0xf5); 95 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x36, 0xf3); 96 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x37, 0xf2); 97 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x38, 0xf2); 98 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x39, 0xf2); 99 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3a, 0xef); 100 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3b, 0xec); 101 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3d, 0xe9); 102 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3f, 0xe5); 103 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x40, 0xe5); 104 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x41, 0xe5); 105 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2a, 0x13); 106 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x45, 0xff); 107 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x46, 0xf4); 108 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x47, 0xe7); 109 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x48, 0xda); 110 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x49, 0xcd); 111 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4a, 0xc0); 112 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4b, 0xb3); 113 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4c, 0xb2); 114 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4d, 0xb2); 115 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4e, 0xb2); 116 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4f, 0x99); 117 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x50, 0x80); 118 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x68); 119 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x52, 0x66); 120 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x53, 0x66); 121 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x54, 0x66); 122 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2b, 0x0e); 123 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x58, 0xff); 124 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x59, 0xfb); 125 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5a, 0xf7); 126 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5b, 0xf3); 127 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5c, 0xef); 128 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5d, 0xe3); 129 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5e, 0xda); 130 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5f, 0xd8); 131 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x60, 0xd8); 132 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x61, 0xd8); 133 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x62, 0xcb); 134 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x63, 0xbf); 135 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x64, 0xb3); 136 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x65, 0xb2); 137 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x66, 0xb2); 138 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x67, 0xb2); 139 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x2a); 140 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 141 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x25, 0x47); 142 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x30, 0x47); 143 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x39, 0x47); 144 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x26); 145 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 146 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x19, 0x10); 147 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1a, 0xe0); 148 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1b, 0x10); 149 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1c, 0x00); 150 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2a, 0x10); 151 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2b, 0xe0); 152 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 153 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 154 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xf0); 155 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 156 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x84, 0x08); 157 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x85, 0x0c); 158 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x20); 159 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 160 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x00); 161 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 162 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 163 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x91, 0x1f); 164 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x92, 0x0f); 165 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x93, 0x01); 166 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x94, 0x18); 167 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x95, 0x03); 168 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x96, 0x01); 169 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 170 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb0, 0x01); 171 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 172 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 173 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x19, 0x1f); 174 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1b, 0x1b); 175 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x24); 176 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 177 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb8, 0x28); 178 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x27); 179 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 180 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd0, 0x31); 181 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd1, 0x20); 182 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd2, 0x30); 183 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd4, 0x08); 184 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xde, 0x80); 185 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xdf, 0x02); 186 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x26); 187 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 188 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x00, 0x81); 189 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x01, 0xb0); 190 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x22); 191 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 192 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9f, 0x50); 193 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x6f, 0x01); 194 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x70, 0x11); 195 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x73, 0x01); 196 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x74, 0x49); 197 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x76, 0x01); 198 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x77, 0x49); 199 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xa0, 0x3f); 200 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xa9, 0x50); 201 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xaa, 0x28); 202 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xab, 0x28); 203 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xad, 0x10); 204 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb8, 0x00); 205 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x49); 206 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xba, 0x49); 207 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbb, 0x49); 208 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbe, 0x04); 209 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbf, 0x49); 210 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc0, 0x04); 211 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc1, 0x59); 212 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc2, 0x00); 213 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc5, 0x00); 214 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc6, 0x01); 215 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc7, 0x48); 216 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xca, 0x43); 217 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xcb, 0x3c); 218 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xce, 0x00); 219 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xcf, 0x43); 220 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd0, 0x3c); 221 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd3, 0x43); 222 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd4, 0x3c); 223 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd7, 0x00); 224 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xdc, 0x43); 225 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xdd, 0x3c); 226 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xe1, 0x43); 227 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xe2, 0x3c); 228 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xf2, 0x00); 229 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xf3, 0x01); 230 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xf4, 0x48); 231 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 232 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 233 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x13, 0x01); 234 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x14, 0x23); 235 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbc, 0x01); 236 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbd, 0x23); 237 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x2a); 238 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 239 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x97, 0x3c); 240 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x98, 0x02); 241 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x99, 0x95); 242 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9a, 0x03); 243 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9b, 0x00); 244 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9c, 0x0b); 245 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9d, 0x0a); 246 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9e, 0x90); 247 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x22); 248 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 249 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9f, 0x50); 250 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x23); 251 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 252 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xa3, 0x50); 253 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xe0); 254 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 255 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x14, 0x60); 256 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x16, 0xc0); 257 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4f, 0x02); 258 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xf0); 259 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 260 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3a, 0x08); 261 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xd0); 262 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 263 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x02, 0xaf); 264 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x09, 0xee); 265 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1c, 0x99); 266 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1d, 0x09); 267 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 268 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 269 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x0f, 0xff); 270 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x53, 0x2c); 271 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x35, 0x00); 272 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbb, 0x13); 273 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); 274 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x11); 275 mipi_dsi_msleep(&dsi_ctx, 70); 276 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x29); 277 278 return dsi_ctx.accum_err; 279} 280 281static int elish_csot_init_sequence(struct panel_info *pinfo) 282{ 283 struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; 284 struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; 285 struct mipi_dsi_multi_context dsi_ctx = { .dsi = NULL }; 286 /* No datasheet, so write magic init sequence directly */ 287 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 288 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 289 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x05); 290 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x20); 291 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 292 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x18, 0x40); 293 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 294 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 295 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x02); 296 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xd0); 297 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 298 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x02, 0xaf); 299 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x00, 0x30); 300 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x09, 0xee); 301 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1c, 0x99); 302 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1d, 0x09); 303 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xf0); 304 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 305 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3a, 0x08); 306 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xe0); 307 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 308 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4f, 0x02); 309 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x20); 310 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 311 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x58, 0x40); 312 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 313 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 314 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x35, 0x00); 315 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x23); 316 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 317 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x00, 0x80); 318 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x01, 0x84); 319 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x05, 0x2d); 320 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x06, 0x00); 321 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x07, 0x00); 322 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x08, 0x01); 323 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x09, 0x45); 324 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x11, 0x02); 325 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x12, 0x80); 326 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x15, 0x83); 327 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x16, 0x0c); 328 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x29, 0x0a); 329 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x30, 0xff); 330 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x31, 0xfe); 331 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x32, 0xfd); 332 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x33, 0xfb); 333 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x34, 0xf8); 334 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x35, 0xf5); 335 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x36, 0xf3); 336 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x37, 0xf2); 337 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x38, 0xf2); 338 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x39, 0xf2); 339 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3a, 0xef); 340 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3b, 0xec); 341 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3d, 0xe9); 342 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3f, 0xe5); 343 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x40, 0xe5); 344 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x41, 0xe5); 345 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2a, 0x13); 346 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x45, 0xff); 347 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x46, 0xf4); 348 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x47, 0xe7); 349 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x48, 0xda); 350 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x49, 0xcd); 351 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4a, 0xc0); 352 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4b, 0xb3); 353 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4c, 0xb2); 354 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4d, 0xb2); 355 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4e, 0xb2); 356 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x4f, 0x99); 357 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x50, 0x80); 358 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x68); 359 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x52, 0x66); 360 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x53, 0x66); 361 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x54, 0x66); 362 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2b, 0x0e); 363 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x58, 0xff); 364 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x59, 0xfb); 365 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5a, 0xf7); 366 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5b, 0xf3); 367 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5c, 0xef); 368 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5d, 0xe3); 369 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5e, 0xda); 370 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x5f, 0xd8); 371 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x60, 0xd8); 372 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x61, 0xd8); 373 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x62, 0xcb); 374 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x63, 0xbf); 375 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x64, 0xb3); 376 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x65, 0xb2); 377 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x66, 0xb2); 378 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x67, 0xb2); 379 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 380 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 381 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x0f, 0xff); 382 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x53, 0x2c); 383 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x55, 0x00); 384 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbb, 0x13); 385 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); 386 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x2a); 387 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 388 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x25, 0x46); 389 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x30, 0x46); 390 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x39, 0x46); 391 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x26); 392 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 393 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x01, 0xb0); 394 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x19, 0x10); 395 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1a, 0xe0); 396 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1b, 0x10); 397 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1c, 0x00); 398 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2a, 0x10); 399 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x2b, 0xe0); 400 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0xf0); 401 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 402 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x84, 0x08); 403 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x85, 0x0c); 404 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x20); 405 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 406 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x51, 0x00); 407 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 408 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 409 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x91, 0x1f); 410 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x92, 0x0f); 411 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x93, 0x01); 412 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x94, 0x18); 413 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x95, 0x03); 414 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x96, 0x01); 415 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 416 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb0, 0x01); 417 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 418 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 419 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x19, 0x1f); 420 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x1b, 0x1b); 421 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x24); 422 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 423 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb8, 0x28); 424 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x27); 425 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 426 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd0, 0x31); 427 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd1, 0x20); 428 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd4, 0x08); 429 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xde, 0x80); 430 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xdf, 0x02); 431 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x26); 432 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 433 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x00, 0x81); 434 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x01, 0xb0); 435 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x22); 436 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 437 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x6f, 0x01); 438 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x70, 0x11); 439 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x73, 0x01); 440 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x74, 0x4d); 441 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xa0, 0x3f); 442 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xa9, 0x50); 443 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xaa, 0x28); 444 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xab, 0x28); 445 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xad, 0x10); 446 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb8, 0x00); 447 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xb9, 0x4b); 448 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xba, 0x96); 449 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbb, 0x4b); 450 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbe, 0x07); 451 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbf, 0x4b); 452 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc0, 0x07); 453 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc1, 0x5c); 454 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc2, 0x00); 455 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc5, 0x00); 456 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc6, 0x3f); 457 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xc7, 0x00); 458 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xca, 0x08); 459 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xcb, 0x40); 460 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xce, 0x00); 461 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xcf, 0x08); 462 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd0, 0x40); 463 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd3, 0x08); 464 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xd4, 0x40); 465 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x25); 466 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 467 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbc, 0x01); 468 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbd, 0x1c); 469 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x2a); 470 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01); 471 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x9a, 0x03); 472 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10); 473 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x11); 474 mipi_dsi_msleep(&dsi_ctx, 70); 475 mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0x29); 476 477 return dsi_ctx.accum_err; 478} 479 480static int j606f_boe_init_sequence(struct panel_info *pinfo) 481{ 482 struct mipi_dsi_device *dsi = pinfo->dsi[0]; 483 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; 484 485 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20); 486 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 487 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0xd9); 488 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x78); 489 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x5a); 490 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x63); 491 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x91); 492 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x73); 493 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x95, 0xeb); 494 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x96, 0xeb); 495 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x11); 496 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x66); 497 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xa2); 498 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xb3); 499 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 500 0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 501 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 502 0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 503 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 504 0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 505 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 506 0x03, 0xfd, 0x03, 0xff); 507 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 508 0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 509 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 510 0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 511 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 512 0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 513 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 514 0x03, 0xfd, 0x03, 0xff); 515 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 516 0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 517 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 518 0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 519 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 520 0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 521 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 522 0x03, 0xfd, 0x03, 0xff); 523 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x21); 524 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 525 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 526 0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 527 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 528 0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 529 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 530 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 531 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 532 0x03, 0xf5, 0x03, 0xf7); 533 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 534 0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 535 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 536 0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 537 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 538 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 539 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 540 0x03, 0xf5, 0x03, 0xf7); 541 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 542 0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 543 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 544 0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 545 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 546 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 547 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 548 0x03, 0xf5, 0x03, 0xf7); 549 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x23); 550 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 551 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x80); 552 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x00); 553 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x01); 554 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77); 555 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x07); 556 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x07); 557 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24); 558 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 559 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); 560 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x00); 561 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x1c); 562 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x1c); 563 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x1d); 564 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x1d); 565 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x04); 566 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x04); 567 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x0f); 568 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x0f); 569 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x0e); 570 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x0e); 571 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x0d); 572 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x0d); 573 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x0c); 574 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); 575 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x08); 576 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x08); 577 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x00); 578 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x00); 579 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x00); 580 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x00); 581 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x00); 582 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); 583 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x1c); 584 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x1c); 585 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x1d); 586 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x1d); 587 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x04); 588 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x04); 589 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x0f); 590 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x0f); 591 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x0e); 592 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x0e); 593 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x0d); 594 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x0d); 595 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x0c); 596 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x0c); 597 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x08); 598 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x08); 599 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x00); 600 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00); 601 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x00); 602 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x00); 603 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_LUT, 0x20); 604 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x0a); 605 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x44); 606 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0c); 607 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x32); 608 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x44); 609 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x40); 610 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); 611 612 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x9a); 613 614 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0xa0); 615 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_3D_CONTROL, 0x42); 616 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x06); 617 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x06); 618 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x66); 619 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x9a); 620 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0xa0); 621 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x91); 622 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x21); 623 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x43); 624 625 mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 18); 626 627 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x34); 628 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x82, 0x02); 629 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x04); 630 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x21); 631 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x30); 632 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0xba); 633 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0xa0); 634 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, 0x06); 635 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00); 636 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x82); 637 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x20); 638 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x3c); 639 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x04); 640 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x97, 0xc0); 641 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 642 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 643 0x05, 0x00, 0x00); 644 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0xc4); 645 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x93, 0x1a); 646 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x94, 0x5f); 647 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x55); 648 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xda, 0x0a); 649 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x08); 650 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdb, 0x05); 651 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdc, 0xc4); 652 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdd, 0x22); 653 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x05); 654 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xc4); 655 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x05); 656 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0xc4); 657 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x05); 658 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0xc4); 659 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x05); 660 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0xc4); 661 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x88); 662 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x08); 663 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8d, 0x88); 664 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0x08); 665 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x90); 666 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25); 667 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 668 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x00); 669 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x07); 670 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0xba); 671 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0xa0); 672 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0xba); 673 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0xa0); 674 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0xba); 675 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0xa0); 676 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xe0); 677 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_VSYNC_TIMING, 0x00); 678 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00); 679 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_GET_SCANLINE, 0x40); 680 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0xba); 681 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0xa0); 682 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x00); 683 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); 684 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x00); 685 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0); 686 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0xba); 687 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0xa0); 688 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf1, 0x10); 689 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); 690 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 691 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x16); 692 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x16); 693 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x16); 694 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x30); 695 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_START, 0xf3); 696 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa3, 0xff); 697 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa4, 0xff); 698 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa5, 0xff); 699 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd6, 0x08); 700 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26); 701 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 702 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0xa1); 703 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0xf2); 704 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x28); 705 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x30); 706 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x13); 707 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x0a); 708 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x0a); 709 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x00); 710 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x50); 711 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x51); 712 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x65); 713 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x00); 714 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x10); 715 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0xa0); 716 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x86); 717 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x11); 718 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x7b); 719 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x10); 720 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0xbb); 721 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x00); 722 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x00); 723 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x11); 724 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x7b); 725 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x00); 726 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0xc3); 727 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0xc3); 728 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x00); 729 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0xc3); 730 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x05); 731 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0xc3); 732 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x00); 733 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0xc3); 734 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); 735 736 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0xc3); 737 738 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x01); 739 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x11); 740 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x78); 741 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x16); 742 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc8, 0x04); 743 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc9, 0x82); 744 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0x4e); 745 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcb, 0x00); 746 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_CONTINUE, 0x4c); 747 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xaa, 0x47); 748 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x27); 749 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 750 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x06); 751 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x80); 752 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x53); 753 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x00); 754 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x14); 755 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); 756 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x01); 757 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20); 758 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x10); 759 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x00); 760 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x1d); 761 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x00); 762 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x01); 763 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x24); 764 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x1c); 765 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x00); 766 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x01); 767 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x25); 768 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); 769 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x00); 770 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x00); 771 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd1, 0x24); 772 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0x30); 773 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); 774 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 775 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x2f); 776 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x08); 777 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x00); 778 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0xc3); 779 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0xf8); 780 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x00); 781 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x1a); 782 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00); 783 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x1a); 784 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x00); 785 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_LUT, 0x1a); 786 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xe0); 787 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 788 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x60); 789 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0xc0); 790 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xf0); 791 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 792 793 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x08); 794 795 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24); 796 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 797 798 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x5d); 799 800 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x60); 801 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x5d); 802 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x60); 803 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x70); 804 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x60); 805 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x91, 0x44); 806 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x75); 807 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdb, 0x05); 808 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdc, 0x75); 809 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdd, 0x22); 810 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x05); 811 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x75); 812 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x05); 813 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x75); 814 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x05); 815 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0x75); 816 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x05); 817 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x75); 818 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); 819 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x00); 820 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8d, 0x00); 821 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0x00); 822 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25); 823 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 824 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70); 825 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x60); 826 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x70); 827 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x60); 828 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x70); 829 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x60); 830 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x70); 831 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x60); 832 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x00); 833 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x70); 834 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x60); 835 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26); 836 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 837 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x31); 838 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x0a); 839 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x7f); 840 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x0a); 841 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x0c); 842 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x0a); 843 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x7f); 844 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x75); 845 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x75); 846 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x75); 847 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, 0x75); 848 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x05); 849 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x8d); 850 851 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x75); 852 853 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); 854 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 855 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x75); 856 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); 857 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 858 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x01); 859 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20); 860 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 861 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x40); 862 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); 863 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 864 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x02); 865 866 mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); 867 868 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x13); 869 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x03, 0x5f, 0x1a, 0x04, 0x04); 870 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); 871 mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000); 872 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); 873 874 mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0); 875 876 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c); 877 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); 878 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x05, 0x01); 879 880 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); 881 mipi_dsi_msleep(&dsi_ctx, 100); 882 883 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); 884 mipi_dsi_msleep(&dsi_ctx, 30); 885 886 return dsi_ctx.accum_err; 887} 888 889static const struct drm_display_mode elish_boe_modes[] = { 890 { 891 .clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 120 / 1000, 892 .hdisplay = 1600, 893 .hsync_start = 1600 + 60, 894 .hsync_end = 1600 + 60 + 8, 895 .htotal = 1600 + 60 + 8 + 60, 896 .vdisplay = 2560, 897 .vsync_start = 2560 + 26, 898 .vsync_end = 2560 + 26 + 4, 899 .vtotal = 2560 + 26 + 4 + 168, 900 }, 901}; 902 903static const struct drm_display_mode elish_csot_modes[] = { 904 { 905 .clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 120 / 1000, 906 .hdisplay = 1600, 907 .hsync_start = 1600 + 200, 908 .hsync_end = 1600 + 200 + 40, 909 .htotal = 1600 + 200 + 40 + 52, 910 .vdisplay = 2560, 911 .vsync_start = 2560 + 26, 912 .vsync_end = 2560 + 26 + 4, 913 .vtotal = 2560 + 26 + 4 + 168, 914 }, 915}; 916 917static const struct drm_display_mode j606f_boe_modes[] = { 918 { 919 .clock = (1200 + 58 + 2 + 60) * (2000 + 26 + 2 + 93) * 60 / 1000, 920 .hdisplay = 1200, 921 .hsync_start = 1200 + 58, 922 .hsync_end = 1200 + 58 + 2, 923 .htotal = 1200 + 58 + 2 + 60, 924 .vdisplay = 2000, 925 .vsync_start = 2000 + 26, 926 .vsync_end = 2000 + 26 + 2, 927 .vtotal = 2000 + 26 + 2 + 93, 928 .width_mm = 143, 929 .height_mm = 235, 930 }, 931}; 932 933static const struct panel_desc elish_boe_desc = { 934 .modes = elish_boe_modes, 935 .num_modes = ARRAY_SIZE(elish_boe_modes), 936 .dsi_info = { 937 .type = "BOE-elish", 938 .channel = 0, 939 .node = NULL, 940 }, 941 .width_mm = 127, 942 .height_mm = 203, 943 .bpc = 8, 944 .lanes = 3, 945 .format = MIPI_DSI_FMT_RGB888, 946 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 947 .init_sequence = elish_boe_init_sequence, 948 .is_dual_dsi = true, 949}; 950 951static const struct panel_desc elish_csot_desc = { 952 .modes = elish_csot_modes, 953 .num_modes = ARRAY_SIZE(elish_csot_modes), 954 .dsi_info = { 955 .type = "CSOT-elish", 956 .channel = 0, 957 .node = NULL, 958 }, 959 .width_mm = 127, 960 .height_mm = 203, 961 .bpc = 8, 962 .lanes = 3, 963 .format = MIPI_DSI_FMT_RGB888, 964 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 965 .init_sequence = elish_csot_init_sequence, 966 .is_dual_dsi = true, 967}; 968 969static const struct panel_desc j606f_boe_desc = { 970 .modes = j606f_boe_modes, 971 .num_modes = ARRAY_SIZE(j606f_boe_modes), 972 .width_mm = 143, 973 .height_mm = 235, 974 .bpc = 8, 975 .lanes = 4, 976 .format = MIPI_DSI_FMT_RGB888, 977 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 978 MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 979 .init_sequence = j606f_boe_init_sequence, 980 .has_dcs_backlight = true, 981}; 982 983static void nt36523_reset(struct panel_info *pinfo) 984{ 985 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 986 usleep_range(12000, 13000); 987 gpiod_set_value_cansleep(pinfo->reset_gpio, 0); 988 usleep_range(12000, 13000); 989 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 990 usleep_range(12000, 13000); 991 gpiod_set_value_cansleep(pinfo->reset_gpio, 0); 992 usleep_range(12000, 13000); 993} 994 995static int nt36523_prepare(struct drm_panel *panel) 996{ 997 struct panel_info *pinfo = to_panel_info(panel); 998 int ret; 999 1000 ret = regulator_enable(pinfo->vddio); 1001 if (ret) { 1002 dev_err(panel->dev, "failed to enable vddio regulator: %d\n", ret); 1003 return ret; 1004 } 1005 1006 nt36523_reset(pinfo); 1007 1008 ret = pinfo->desc->init_sequence(pinfo); 1009 if (ret < 0) { 1010 regulator_disable(pinfo->vddio); 1011 dev_err(panel->dev, "failed to initialize panel: %d\n", ret); 1012 return ret; 1013 } 1014 1015 return 0; 1016} 1017 1018static int nt36523_disable(struct drm_panel *panel) 1019{ 1020 struct panel_info *pinfo = to_panel_info(panel); 1021 int i; 1022 1023 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1024 struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->dsi[i]}; 1025 1026 mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); 1027 } 1028 1029 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1030 struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->dsi[i]}; 1031 1032 mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); 1033 } 1034 1035 msleep(70); 1036 1037 return 0; 1038} 1039 1040static int nt36523_unprepare(struct drm_panel *panel) 1041{ 1042 struct panel_info *pinfo = to_panel_info(panel); 1043 1044 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 1045 regulator_disable(pinfo->vddio); 1046 1047 return 0; 1048} 1049 1050static void nt36523_remove(struct mipi_dsi_device *dsi) 1051{ 1052 struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); 1053 1054 drm_panel_remove(&pinfo->panel); 1055} 1056 1057static int nt36523_get_modes(struct drm_panel *panel, 1058 struct drm_connector *connector) 1059{ 1060 struct panel_info *pinfo = to_panel_info(panel); 1061 int i; 1062 1063 for (i = 0; i < pinfo->desc->num_modes; i++) { 1064 const struct drm_display_mode *m = &pinfo->desc->modes[i]; 1065 struct drm_display_mode *mode; 1066 1067 mode = drm_mode_duplicate(connector->dev, m); 1068 if (!mode) { 1069 dev_err(panel->dev, "failed to add mode %ux%u@%u\n", 1070 m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); 1071 return -ENOMEM; 1072 } 1073 1074 mode->type = DRM_MODE_TYPE_DRIVER; 1075 if (i == 0) 1076 mode->type |= DRM_MODE_TYPE_PREFERRED; 1077 1078 drm_mode_set_name(mode); 1079 drm_mode_probed_add(connector, mode); 1080 } 1081 1082 connector->display_info.width_mm = pinfo->desc->width_mm; 1083 connector->display_info.height_mm = pinfo->desc->height_mm; 1084 connector->display_info.bpc = pinfo->desc->bpc; 1085 1086 return pinfo->desc->num_modes; 1087} 1088 1089static enum drm_panel_orientation nt36523_get_orientation(struct drm_panel *panel) 1090{ 1091 struct panel_info *pinfo = to_panel_info(panel); 1092 1093 return pinfo->orientation; 1094} 1095 1096static const struct drm_panel_funcs nt36523_panel_funcs = { 1097 .disable = nt36523_disable, 1098 .prepare = nt36523_prepare, 1099 .unprepare = nt36523_unprepare, 1100 .get_modes = nt36523_get_modes, 1101 .get_orientation = nt36523_get_orientation, 1102}; 1103 1104static int nt36523_bl_update_status(struct backlight_device *bl) 1105{ 1106 struct mipi_dsi_device *dsi = bl_get_data(bl); 1107 u16 brightness = backlight_get_brightness(bl); 1108 int ret; 1109 1110 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 1111 1112 ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness); 1113 if (ret < 0) 1114 return ret; 1115 1116 dsi->mode_flags |= MIPI_DSI_MODE_LPM; 1117 1118 return 0; 1119} 1120 1121static int nt36523_bl_get_brightness(struct backlight_device *bl) 1122{ 1123 struct mipi_dsi_device *dsi = bl_get_data(bl); 1124 u16 brightness; 1125 int ret; 1126 1127 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 1128 1129 ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness); 1130 if (ret < 0) 1131 return ret; 1132 1133 dsi->mode_flags |= MIPI_DSI_MODE_LPM; 1134 1135 return brightness; 1136} 1137 1138static const struct backlight_ops nt36523_bl_ops = { 1139 .update_status = nt36523_bl_update_status, 1140 .get_brightness = nt36523_bl_get_brightness, 1141}; 1142 1143static struct backlight_device *nt36523_create_backlight(struct mipi_dsi_device *dsi) 1144{ 1145 struct device *dev = &dsi->dev; 1146 const struct backlight_properties props = { 1147 .type = BACKLIGHT_RAW, 1148 .brightness = 512, 1149 .max_brightness = 4095, 1150 .scale = BACKLIGHT_SCALE_NON_LINEAR, 1151 }; 1152 1153 return devm_backlight_device_register(dev, dev_name(dev), dev, dsi, 1154 &nt36523_bl_ops, &props); 1155} 1156 1157static int nt36523_probe(struct mipi_dsi_device *dsi) 1158{ 1159 struct device *dev = &dsi->dev; 1160 struct device_node *dsi1; 1161 struct mipi_dsi_host *dsi1_host; 1162 struct panel_info *pinfo; 1163 const struct mipi_dsi_device_info *info; 1164 int i, ret; 1165 1166 pinfo = devm_drm_panel_alloc(dev, struct panel_info, panel, 1167 &nt36523_panel_funcs, 1168 DRM_MODE_CONNECTOR_DSI); 1169 if (IS_ERR(pinfo)) 1170 return PTR_ERR(pinfo); 1171 1172 pinfo->vddio = devm_regulator_get(dev, "vddio"); 1173 if (IS_ERR(pinfo->vddio)) 1174 return dev_err_probe(dev, PTR_ERR(pinfo->vddio), "failed to get vddio regulator\n"); 1175 1176 pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 1177 if (IS_ERR(pinfo->reset_gpio)) 1178 return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), "failed to get reset gpio\n"); 1179 1180 pinfo->desc = of_device_get_match_data(dev); 1181 if (!pinfo->desc) 1182 return -ENODEV; 1183 1184 /* If the panel is dual dsi, register DSI1 */ 1185 if (pinfo->desc->is_dual_dsi) { 1186 info = &pinfo->desc->dsi_info; 1187 1188 dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1); 1189 if (!dsi1) { 1190 dev_err(dev, "cannot get secondary DSI node.\n"); 1191 return -ENODEV; 1192 } 1193 1194 dsi1_host = of_find_mipi_dsi_host_by_node(dsi1); 1195 of_node_put(dsi1); 1196 if (!dsi1_host) 1197 return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n"); 1198 1199 pinfo->dsi[1] = devm_mipi_dsi_device_register_full(dev, dsi1_host, info); 1200 if (IS_ERR(pinfo->dsi[1])) { 1201 dev_err(dev, "cannot get secondary DSI device\n"); 1202 return PTR_ERR(pinfo->dsi[1]); 1203 } 1204 } 1205 1206 pinfo->dsi[0] = dsi; 1207 mipi_dsi_set_drvdata(dsi, pinfo); 1208 1209 ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation); 1210 if (ret < 0) { 1211 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret); 1212 return ret; 1213 } 1214 1215 pinfo->panel.prepare_prev_first = true; 1216 1217 if (pinfo->desc->has_dcs_backlight) { 1218 pinfo->panel.backlight = nt36523_create_backlight(dsi); 1219 if (IS_ERR(pinfo->panel.backlight)) 1220 return dev_err_probe(dev, PTR_ERR(pinfo->panel.backlight), 1221 "Failed to create backlight\n"); 1222 } else { 1223 ret = drm_panel_of_backlight(&pinfo->panel); 1224 if (ret) 1225 return dev_err_probe(dev, ret, "Failed to get backlight\n"); 1226 } 1227 1228 drm_panel_add(&pinfo->panel); 1229 1230 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1231 pinfo->dsi[i]->lanes = pinfo->desc->lanes; 1232 pinfo->dsi[i]->format = pinfo->desc->format; 1233 pinfo->dsi[i]->mode_flags = pinfo->desc->mode_flags; 1234 1235 ret = devm_mipi_dsi_attach(dev, pinfo->dsi[i]); 1236 if (ret < 0) 1237 return dev_err_probe(dev, ret, "cannot attach to DSI%d host.\n", i); 1238 } 1239 1240 return 0; 1241} 1242 1243static const struct of_device_id nt36523_of_match[] = { 1244 { 1245 .compatible = "lenovo,j606f-boe-nt36523w", 1246 .data = &j606f_boe_desc, 1247 }, 1248 { 1249 .compatible = "xiaomi,elish-boe-nt36523", 1250 .data = &elish_boe_desc, 1251 }, 1252 { 1253 .compatible = "xiaomi,elish-csot-nt36523", 1254 .data = &elish_csot_desc, 1255 }, 1256 {}, 1257}; 1258MODULE_DEVICE_TABLE(of, nt36523_of_match); 1259 1260static struct mipi_dsi_driver nt36523_driver = { 1261 .probe = nt36523_probe, 1262 .remove = nt36523_remove, 1263 .driver = { 1264 .name = "panel-novatek-nt36523", 1265 .of_match_table = nt36523_of_match, 1266 }, 1267}; 1268module_mipi_dsi_driver(nt36523_driver); 1269 1270MODULE_AUTHOR("Jianhua Lu <lujianhua000@gmail.com>"); 1271MODULE_DESCRIPTION("DRM driver for Novatek NT36523 based MIPI DSI panels"); 1272MODULE_LICENSE("GPL");