tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Core SHA-384/SHA-512 transform using v8 Crypto Extensions
4 *
5 * Copyright (C) 2018 Linaro Ltd <ard.biesheuvel@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/linkage.h>
13#include <asm/assembler.h>
14
15 /*
16 * We have to specify the "sha3" feature here, since the GNU and clang
17 * assemblers both consider the SHA-512 instructions to be part of the
18 * "sha3" feature. (Except binutils 2.30 through 2.42, which used
19 * "sha2". But "sha3" implies "sha2", so "sha3" still works in those
20 * versions.) "sha3" doesn't make a lot of sense, since SHA-512 is part
21 * of the SHA-2 family of algorithms, and also the Arm Architecture
22 * Reference Manual defines FEAT_SHA512 and FEAT_SHA3 separately.
23 * Regardless, we must use "sha3" to be compatible with the assemblers.
24 */
25 .arch armv8-a+sha3
26
27 /*
28 * The SHA-512 round constants
29 */
30 .section ".rodata", "a"
31 .align 4
32.Lsha512_rcon:
33 .quad 0x428a2f98d728ae22, 0x7137449123ef65cd
34 .quad 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
35 .quad 0x3956c25bf348b538, 0x59f111f1b605d019
36 .quad 0x923f82a4af194f9b, 0xab1c5ed5da6d8118
37 .quad 0xd807aa98a3030242, 0x12835b0145706fbe
38 .quad 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2
39 .quad 0x72be5d74f27b896f, 0x80deb1fe3b1696b1
40 .quad 0x9bdc06a725c71235, 0xc19bf174cf692694
41 .quad 0xe49b69c19ef14ad2, 0xefbe4786384f25e3
42 .quad 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65
43 .quad 0x2de92c6f592b0275, 0x4a7484aa6ea6e483
44 .quad 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5
45 .quad 0x983e5152ee66dfab, 0xa831c66d2db43210
46 .quad 0xb00327c898fb213f, 0xbf597fc7beef0ee4
47 .quad 0xc6e00bf33da88fc2, 0xd5a79147930aa725
48 .quad 0x06ca6351e003826f, 0x142929670a0e6e70
49 .quad 0x27b70a8546d22ffc, 0x2e1b21385c26c926
50 .quad 0x4d2c6dfc5ac42aed, 0x53380d139d95b3df
51 .quad 0x650a73548baf63de, 0x766a0abb3c77b2a8
52 .quad 0x81c2c92e47edaee6, 0x92722c851482353b
53 .quad 0xa2bfe8a14cf10364, 0xa81a664bbc423001
54 .quad 0xc24b8b70d0f89791, 0xc76c51a30654be30
55 .quad 0xd192e819d6ef5218, 0xd69906245565a910
56 .quad 0xf40e35855771202a, 0x106aa07032bbd1b8
57 .quad 0x19a4c116b8d2d0c8, 0x1e376c085141ab53
58 .quad 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8
59 .quad 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb
60 .quad 0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3
61 .quad 0x748f82ee5defb2fc, 0x78a5636f43172f60
62 .quad 0x84c87814a1f0ab72, 0x8cc702081a6439ec
63 .quad 0x90befffa23631e28, 0xa4506cebde82bde9
64 .quad 0xbef9a3f7b2c67915, 0xc67178f2e372532b
65 .quad 0xca273eceea26619c, 0xd186b8c721c0c207
66 .quad 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178
67 .quad 0x06f067aa72176fba, 0x0a637dc5a2c898a6
68 .quad 0x113f9804bef90dae, 0x1b710b35131c471b
69 .quad 0x28db77f523047d84, 0x32caab7b40c72493
70 .quad 0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c
71 .quad 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a
72 .quad 0x5fcb6fab3ad6faec, 0x6c44198c4a475817
73
74 .macro dround, i0, i1, i2, i3, i4, rc0, rc1, in0, in1, in2, in3, in4
75 .ifnb \rc1
76 ld1 {v\rc1\().2d}, [x4], #16
77 .endif
78 add v5.2d, v\rc0\().2d, v\in0\().2d
79 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
80 ext v5.16b, v5.16b, v5.16b, #8
81 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
82 add v\i3\().2d, v\i3\().2d, v5.2d
83 .ifnb \in1
84 ext v5.16b, v\in3\().16b, v\in4\().16b, #8
85 sha512su0 v\in0\().2d, v\in1\().2d
86 .endif
87 sha512h q\i3, q6, v7.2d
88 .ifnb \in1
89 sha512su1 v\in0\().2d, v\in2\().2d, v5.2d
90 .endif
91 add v\i4\().2d, v\i1\().2d, v\i3\().2d
92 sha512h2 q\i3, q\i1, v\i0\().2d
93 .endm
94
95 /*
96 * size_t __sha512_ce_transform(struct sha512_block_state *state,
97 * const u8 *data, size_t nblocks);
98 */
99 .text
100SYM_FUNC_START(__sha512_ce_transform)
101 /* load state */
102 ld1 {v8.2d-v11.2d}, [x0]
103
104 /* load first 4 round constants */
105 adr_l x3, .Lsha512_rcon
106 ld1 {v20.2d-v23.2d}, [x3], #64
107
108 /* load input */
1090: ld1 {v12.2d-v15.2d}, [x1], #64
110 ld1 {v16.2d-v19.2d}, [x1], #64
111 sub x2, x2, #1
112
113CPU_LE( rev64 v12.16b, v12.16b )
114CPU_LE( rev64 v13.16b, v13.16b )
115CPU_LE( rev64 v14.16b, v14.16b )
116CPU_LE( rev64 v15.16b, v15.16b )
117CPU_LE( rev64 v16.16b, v16.16b )
118CPU_LE( rev64 v17.16b, v17.16b )
119CPU_LE( rev64 v18.16b, v18.16b )
120CPU_LE( rev64 v19.16b, v19.16b )
121
122 mov x4, x3 // rc pointer
123
124 mov v0.16b, v8.16b
125 mov v1.16b, v9.16b
126 mov v2.16b, v10.16b
127 mov v3.16b, v11.16b
128
129 // v0 ab cd -- ef gh ab
130 // v1 cd -- ef gh ab cd
131 // v2 ef gh ab cd -- ef
132 // v3 gh ab cd -- ef gh
133 // v4 -- ef gh ab cd --
134
135 dround 0, 1, 2, 3, 4, 20, 24, 12, 13, 19, 16, 17
136 dround 3, 0, 4, 2, 1, 21, 25, 13, 14, 12, 17, 18
137 dround 2, 3, 1, 4, 0, 22, 26, 14, 15, 13, 18, 19
138 dround 4, 2, 0, 1, 3, 23, 27, 15, 16, 14, 19, 12
139 dround 1, 4, 3, 0, 2, 24, 28, 16, 17, 15, 12, 13
140
141 dround 0, 1, 2, 3, 4, 25, 29, 17, 18, 16, 13, 14
142 dround 3, 0, 4, 2, 1, 26, 30, 18, 19, 17, 14, 15
143 dround 2, 3, 1, 4, 0, 27, 31, 19, 12, 18, 15, 16
144 dround 4, 2, 0, 1, 3, 28, 24, 12, 13, 19, 16, 17
145 dround 1, 4, 3, 0, 2, 29, 25, 13, 14, 12, 17, 18
146
147 dround 0, 1, 2, 3, 4, 30, 26, 14, 15, 13, 18, 19
148 dround 3, 0, 4, 2, 1, 31, 27, 15, 16, 14, 19, 12
149 dround 2, 3, 1, 4, 0, 24, 28, 16, 17, 15, 12, 13
150 dround 4, 2, 0, 1, 3, 25, 29, 17, 18, 16, 13, 14
151 dround 1, 4, 3, 0, 2, 26, 30, 18, 19, 17, 14, 15
152
153 dround 0, 1, 2, 3, 4, 27, 31, 19, 12, 18, 15, 16
154 dround 3, 0, 4, 2, 1, 28, 24, 12, 13, 19, 16, 17
155 dround 2, 3, 1, 4, 0, 29, 25, 13, 14, 12, 17, 18
156 dround 4, 2, 0, 1, 3, 30, 26, 14, 15, 13, 18, 19
157 dround 1, 4, 3, 0, 2, 31, 27, 15, 16, 14, 19, 12
158
159 dround 0, 1, 2, 3, 4, 24, 28, 16, 17, 15, 12, 13
160 dround 3, 0, 4, 2, 1, 25, 29, 17, 18, 16, 13, 14
161 dround 2, 3, 1, 4, 0, 26, 30, 18, 19, 17, 14, 15
162 dround 4, 2, 0, 1, 3, 27, 31, 19, 12, 18, 15, 16
163 dround 1, 4, 3, 0, 2, 28, 24, 12, 13, 19, 16, 17
164
165 dround 0, 1, 2, 3, 4, 29, 25, 13, 14, 12, 17, 18
166 dround 3, 0, 4, 2, 1, 30, 26, 14, 15, 13, 18, 19
167 dround 2, 3, 1, 4, 0, 31, 27, 15, 16, 14, 19, 12
168 dround 4, 2, 0, 1, 3, 24, 28, 16, 17, 15, 12, 13
169 dround 1, 4, 3, 0, 2, 25, 29, 17, 18, 16, 13, 14
170
171 dround 0, 1, 2, 3, 4, 26, 30, 18, 19, 17, 14, 15
172 dround 3, 0, 4, 2, 1, 27, 31, 19, 12, 18, 15, 16
173 dround 2, 3, 1, 4, 0, 28, 24, 12
174 dround 4, 2, 0, 1, 3, 29, 25, 13
175 dround 1, 4, 3, 0, 2, 30, 26, 14
176
177 dround 0, 1, 2, 3, 4, 31, 27, 15
178 dround 3, 0, 4, 2, 1, 24, , 16
179 dround 2, 3, 1, 4, 0, 25, , 17
180 dround 4, 2, 0, 1, 3, 26, , 18
181 dround 1, 4, 3, 0, 2, 27, , 19
182
183 /* update state */
184 add v8.2d, v8.2d, v0.2d
185 add v9.2d, v9.2d, v1.2d
186 add v10.2d, v10.2d, v2.2d
187 add v11.2d, v11.2d, v3.2d
188
189 cond_yield 3f, x4, x5
190 /* handled all input blocks? */
191 cbnz x2, 0b
192
193 /* store new state */
1943: st1 {v8.2d-v11.2d}, [x0]
195 mov x0, x2
196 ret
197SYM_FUNC_END(__sha512_ce_transform)