tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# QCOM Soc drivers
4#
5menu "Qualcomm SoC drivers"
6
7config QCOM_AOSS_QMP
8 tristate "Qualcomm AOSS Driver"
9 depends on ARCH_QCOM || COMPILE_TEST
10 depends on MAILBOX
11 depends on COMMON_CLK && PM
12 select PM_GENERIC_DOMAINS
13 help
14 This driver provides the means of communicating with and controlling
15 the low-power state for resources related to the remoteproc
16 subsystems as well as controlling the debug clocks exposed by the Always On
17 Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP).
18
19config QCOM_COMMAND_DB
20 tristate "Qualcomm Command DB"
21 depends on ARCH_QCOM || COMPILE_TEST
22 depends on OF_RESERVED_MEM
23 help
24 Command DB queries shared memory by key string for shared system
25 resources. Platform drivers that require to set state of a shared
26 resource on a RPM-hardened platform must use this database to get
27 SoC specific identifier and information for the shared resources.
28
29config QCOM_GENI_SE
30 tristate "QCOM GENI Serial Engine Driver"
31 depends on ARCH_QCOM || COMPILE_TEST
32 help
33 This driver is used to manage Generic Interface (GENI) firmware based
34 Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This
35 driver is also used to manage the common aspects of multiple Serial
36 Engines present in the QUP.
37
38config QCOM_GSBI
39 tristate "QCOM General Serial Bus Interface"
40 depends on ARCH_QCOM || COMPILE_TEST
41 select MFD_SYSCON
42 help
43 Say y here to enable GSBI support. The GSBI provides control
44 functions for connecting the underlying serial UART, SPI, and I2C
45 devices to the output pins.
46
47config QCOM_LLCC
48 tristate "Qualcomm Technologies, Inc. LLCC driver"
49 depends on ARCH_QCOM || COMPILE_TEST
50 select REGMAP_MMIO
51 help
52 Qualcomm Technologies, Inc. platform specific
53 Last Level Cache Controller(LLCC) driver for platforms such as,
54 SDM845. This provides interfaces to clients that use the LLCC.
55 Say yes here to enable LLCC slice driver.
56
57config QCOM_KRYO_L2_ACCESSORS
58 bool
59 depends on (ARCH_QCOM || COMPILE_TEST) && ARM64
60
61config QCOM_MDT_LOADER
62 tristate
63 select QCOM_SCM
64
65config QCOM_OCMEM
66 tristate "Qualcomm On Chip Memory (OCMEM) driver"
67 depends on ARCH_QCOM
68 select QCOM_SCM
69 help
70 The On Chip Memory (OCMEM) allocator allows various clients to
71 allocate memory from OCMEM based on performance, latency and power
72 requirements. This is typically used by the GPU, camera/video, and
73 audio components on some Snapdragon SoCs.
74
75config QCOM_PD_MAPPER
76 tristate "Qualcomm Protection Domain Mapper"
77 select QCOM_QMI_HELPERS
78 select QCOM_PDR_MSG
79 select AUXILIARY_BUS
80 depends on NET && QRTR && (ARCH_QCOM || COMPILE_TEST)
81 default QCOM_RPROC_COMMON
82 help
83 The Protection Domain Mapper maps registered services to the domains
84 and instances handled by the remote DSPs. This is a kernel-space
85 implementation of the service. It is a simpler alternative to the
86 userspace daemon.
87
88config QCOM_PDR_HELPERS
89 tristate
90 select QCOM_QMI_HELPERS
91 select QCOM_PDR_MSG
92 depends on NET
93
94config QCOM_PDR_MSG
95 tristate
96
97config QCOM_PMIC_PDCHARGER_ULOG
98 tristate "Qualcomm PMIC PDCharger ULOG driver"
99 depends on RPMSG
100 depends on EVENT_TRACING
101 help
102 The Qualcomm PMIC PDCharger ULOG driver provides access to logs of
103 the ADSP firmware PDCharger module in charge of Battery and Power
104 Delivery on modern systems.
105
106 Say yes here to support PDCharger ULOG event tracing on modern
107 Qualcomm platforms.
108
109config QCOM_PMIC_GLINK
110 tristate "Qualcomm PMIC GLINK driver"
111 depends on RPMSG
112 depends on TYPEC
113 depends on DRM
114 depends on NET
115 depends on OF
116 select AUXILIARY_BUS
117 select QCOM_PDR_HELPERS
118 select DRM_AUX_HPD_BRIDGE
119 help
120 The Qualcomm PMIC GLINK driver provides access, over GLINK, to the
121 USB and battery firmware running on one of the coprocessors in
122 several modern Qualcomm platforms.
123
124 Say yes here to support USB-C and battery status on modern Qualcomm
125 platforms.
126
127config QCOM_QMI_HELPERS
128 tristate
129 depends on NET
130
131config QCOM_RAMP_CTRL
132 tristate "Qualcomm Ramp Controller driver"
133 depends on ARCH_QCOM || COMPILE_TEST
134 help
135 The Ramp Controller is used to program the sequence ID for pulse
136 swallowing, enable sequence and link sequence IDs for the CPU
137 cores on some Qualcomm SoCs.
138 Say y here to enable support for the ramp controller.
139
140config QCOM_RMTFS_MEM
141 tristate "Qualcomm Remote Filesystem memory driver"
142 depends on ARCH_QCOM || COMPILE_TEST
143 select QCOM_SCM
144 help
145 The Qualcomm remote filesystem memory driver is used for allocating
146 and exposing regions of shared memory with remote processors for the
147 purpose of exchanging sector-data between the remote filesystem
148 service and its clients.
149
150 Say y here if you intend to boot the modem remoteproc.
151
152config QCOM_RPM_MASTER_STATS
153 tristate "Qualcomm RPM Master stats"
154 depends on ARCH_QCOM || COMPILE_TEST
155 help
156 The RPM Master sleep stats driver provides detailed per-subsystem
157 sleep/wake data, read from the RPM message RAM. It can be used to
158 assess whether all the low-power modes available are entered as
159 expected or to check which part of the SoC prevents it from sleeping.
160
161 Say y here if you intend to debug or monitor platform sleep.
162
163config QCOM_RPMH
164 tristate "Qualcomm RPM-Hardened (RPMH) Communication"
165 depends on ARCH_QCOM || COMPILE_TEST
166 depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB)
167 help
168 Support for communication with the hardened-RPM blocks in
169 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an
170 internal bus to transmit state requests for shared resources. A set
171 of hardware components aggregate requests for these resources and
172 help apply the aggregated state on the resource.
173
174config QCOM_SMEM
175 tristate "Qualcomm Shared Memory Manager (SMEM)"
176 depends on ARCH_QCOM || COMPILE_TEST
177 depends on HWSPINLOCK
178 help
179 Say y here to enable support for the Qualcomm Shared Memory Manager.
180 The driver provides an interface to items in a heap shared among all
181 processors in a Qualcomm platform.
182
183config QCOM_SMD_RPM
184 tristate "Qualcomm Resource Power Manager (RPM) over SMD"
185 depends on ARCH_QCOM || COMPILE_TEST
186 depends on RPMSG
187 depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n
188 help
189 If you say yes to this option, support will be included for the
190 Resource Power Manager system found in the Qualcomm 8974 based
191 devices.
192
193 This is required to access many regulators, clocks and bus
194 frequencies controlled by the RPM on these devices.
195
196 Say M here if you want to include support for the Qualcomm RPM as a
197 module. This will build a module called "qcom-smd-rpm".
198
199config QCOM_SMEM_STATE
200 bool
201
202config QCOM_SMP2P
203 tristate "Qualcomm Shared Memory Point to Point support"
204 depends on MAILBOX
205 depends on QCOM_SMEM
206 select QCOM_SMEM_STATE
207 select IRQ_DOMAIN
208 help
209 Say yes here to support the Qualcomm Shared Memory Point to Point
210 protocol.
211
212config QCOM_SMSM
213 tristate "Qualcomm Shared Memory State Machine"
214 depends on MAILBOX
215 depends on QCOM_SMEM
216 select QCOM_SMEM_STATE
217 select IRQ_DOMAIN
218 help
219 Say yes here to support the Qualcomm Shared Memory State Machine.
220 The state machine is represented by bits in shared memory.
221
222config QCOM_SOCINFO
223 tristate "Qualcomm socinfo driver"
224 depends on QCOM_SMEM
225 select SOC_BUS
226 help
227 Say yes here to support the Qualcomm socinfo driver, providing
228 information about the SoC to user space.
229
230config QCOM_SPM
231 tristate "Qualcomm Subsystem Power Manager (SPM)"
232 depends on ARCH_QCOM || COMPILE_TEST
233 select QCOM_SCM
234 help
235 Enable the support for the Qualcomm Subsystem Power Manager, used
236 to manage cores, L2 low power modes and to configure the internal
237 Adaptive Voltage Scaler parameters, where supported.
238
239config QCOM_STATS
240 tristate "Qualcomm Technologies, Inc. (QTI) Sleep stats driver"
241 depends on (ARCH_QCOM && DEBUG_FS) || COMPILE_TEST
242 depends on QCOM_SMEM
243 depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
244 help
245 Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read
246 the shared memory exported by the remote processor related to
247 various SoC level low power modes statistics and export to debugfs
248 interface.
249
250config QCOM_WCNSS_CTRL
251 tristate "Qualcomm WCNSS control driver"
252 depends on ARCH_QCOM || COMPILE_TEST
253 depends on RPMSG
254 help
255 Client driver for the WCNSS_CTRL SMD channel, used to download nv
256 firmware to a newly booted WCNSS chip.
257
258config QCOM_APR
259 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)"
260 depends on ARCH_QCOM || COMPILE_TEST
261 depends on RPMSG
262 depends on NET
263 select QCOM_PDR_HELPERS
264 help
265 Enable APR IPC protocol support between
266 application processor and QDSP6. APR is
267 used by audio driver to configure QDSP6
268 ASM, ADM and AFE modules.
269
270config QCOM_ICC_BWMON
271 tristate "QCOM Interconnect Bandwidth Monitor driver"
272 depends on ARCH_QCOM || COMPILE_TEST
273 select PM_OPP
274 select REGMAP_MMIO
275 help
276 Sets up driver monitoring bandwidth on various interconnects and
277 based on that voting for interconnect bandwidth, adjusting their
278 speed to current demand.
279 Current implementation brings support for BWMON v4, used for example
280 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last
281 Level Cache (memnoc). Usage of this BWMON allows to remove some of
282 the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high
283 memory throughput even with lower CPU frequencies.
284
285config QCOM_INLINE_CRYPTO_ENGINE
286 tristate
287 select QCOM_SCM
288
289config QCOM_PBS
290 tristate "PBS trigger support for Qualcomm Technologies, Inc. PMICS"
291 depends on SPMI
292 help
293 This driver supports configuring software programmable boot sequencer (PBS)
294 trigger event through PBS RAM on Qualcomm Technologies, Inc. PMICs.
295 This module provides the APIs to the client drivers that wants to send the
296 PBS trigger event to the PBS RAM.
297
298endmenu
299
300config QCOM_UBWC_CONFIG
301 tristate
302 help
303 Most Qualcomm SoCs feature a number of Universal Bandwidth Compression
304 (UBWC) engines across various IP blocks, which need to be initialized
305 with coherent configuration data. This module functions as a single
306 source of truth for that information.