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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2004,2007,2008 IBM Corporation 4 * 5 * Authors: 6 * Leendert van Doorn <leendert@watson.ibm.com> 7 * Dave Safford <safford@watson.ibm.com> 8 * Reiner Sailer <sailer@watson.ibm.com> 9 * Kylene Hall <kjhall@us.ibm.com> 10 * Debora Velarde <dvelarde@us.ibm.com> 11 * 12 * Maintained by: <tpmdd_devel@lists.sourceforge.net> 13 * 14 * Device driver for TCG/TCPA TPM (trusted platform module). 15 * Specifications at www.trustedcomputinggroup.org 16 */ 17#ifndef __LINUX_TPM_H__ 18#define __LINUX_TPM_H__ 19 20#include <linux/hw_random.h> 21#include <linux/acpi.h> 22#include <linux/cdev.h> 23#include <linux/fs.h> 24#include <linux/highmem.h> 25#include <crypto/hash_info.h> 26#include <crypto/aes.h> 27 28#define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */ 29#define TPM_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE 30 31struct tpm_chip; 32struct trusted_key_payload; 33struct trusted_key_options; 34/* opaque structure, holds auth session parameters like the session key */ 35struct tpm2_auth; 36 37enum tpm2_session_types { 38 TPM2_SE_HMAC = 0x00, 39 TPM2_SE_POLICY = 0x01, 40 TPM2_SE_TRIAL = 0x02, 41}; 42 43/* if you add a new hash to this, increment TPM_MAX_HASHES below */ 44enum tpm_algorithms { 45 TPM_ALG_ERROR = 0x0000, 46 TPM_ALG_SHA1 = 0x0004, 47 TPM_ALG_AES = 0x0006, 48 TPM_ALG_KEYEDHASH = 0x0008, 49 TPM_ALG_SHA256 = 0x000B, 50 TPM_ALG_SHA384 = 0x000C, 51 TPM_ALG_SHA512 = 0x000D, 52 TPM_ALG_NULL = 0x0010, 53 TPM_ALG_SM3_256 = 0x0012, 54 TPM_ALG_ECC = 0x0023, 55 TPM_ALG_CFB = 0x0043, 56}; 57 58/* 59 * maximum number of hashing algorithms a TPM can have. This is 60 * basically a count of every hash in tpm_algorithms above 61 */ 62#define TPM_MAX_HASHES 5 63 64enum tpm2_curves { 65 TPM2_ECC_NONE = 0x0000, 66 TPM2_ECC_NIST_P256 = 0x0003, 67}; 68 69struct tpm_digest { 70 u16 alg_id; 71 u8 digest[TPM_MAX_DIGEST_SIZE]; 72} __packed; 73 74struct tpm_bank_info { 75 u16 alg_id; 76 u16 digest_size; 77 u16 crypto_id; 78}; 79 80enum TPM_OPS_FLAGS { 81 TPM_OPS_AUTO_STARTUP = BIT(0), 82}; 83 84struct tpm_class_ops { 85 unsigned int flags; 86 const u8 req_complete_mask; 87 const u8 req_complete_val; 88 bool (*req_canceled)(struct tpm_chip *chip, u8 status); 89 int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len); 90 int (*send)(struct tpm_chip *chip, u8 *buf, size_t bufsiz, 91 size_t cmd_len); 92 void (*cancel) (struct tpm_chip *chip); 93 u8 (*status) (struct tpm_chip *chip); 94 void (*update_timeouts)(struct tpm_chip *chip, 95 unsigned long *timeout_cap); 96 void (*update_durations)(struct tpm_chip *chip, 97 unsigned long *duration_cap); 98 int (*go_idle)(struct tpm_chip *chip); 99 int (*cmd_ready)(struct tpm_chip *chip); 100 int (*request_locality)(struct tpm_chip *chip, int loc); 101 int (*relinquish_locality)(struct tpm_chip *chip, int loc); 102 void (*clk_enable)(struct tpm_chip *chip, bool value); 103}; 104 105#define TPM_NUM_EVENT_LOG_FILES 3 106 107/* Indexes the duration array */ 108enum tpm_duration { 109 TPM_SHORT = 0, 110 TPM_MEDIUM = 1, 111 TPM_LONG = 2, 112 TPM_LONG_LONG = 3, 113 TPM_UNDEFINED, 114 TPM_NUM_DURATIONS = TPM_UNDEFINED, 115}; 116 117#define TPM_PPI_VERSION_LEN 3 118 119struct tpm_space { 120 u32 context_tbl[3]; 121 u8 *context_buf; 122 u32 session_tbl[3]; 123 u8 *session_buf; 124 u32 buf_size; 125}; 126 127struct tpm_bios_log { 128 void *bios_event_log; 129 void *bios_event_log_end; 130}; 131 132struct tpm_chip_seqops { 133 struct tpm_chip *chip; 134 const struct seq_operations *seqops; 135}; 136 137/* fixed define for the curve we use which is NIST_P256 */ 138#define EC_PT_SZ 32 139 140/* 141 * fixed define for the size of a name. This is actually HASHALG size 142 * plus 2, so 32 for SHA256 143 */ 144#define TPM2_NAME_SIZE 34 145 146/* 147 * The maximum size for an object context 148 */ 149#define TPM2_MAX_CONTEXT_SIZE 4096 150 151struct tpm_chip { 152 struct device dev; 153 struct device devs; 154 struct cdev cdev; 155 struct cdev cdevs; 156 157 /* A driver callback under ops cannot be run unless ops_sem is held 158 * (sometimes implicitly, eg for the sysfs code). ops becomes null 159 * when the driver is unregistered, see tpm_try_get_ops. 160 */ 161 struct rw_semaphore ops_sem; 162 const struct tpm_class_ops *ops; 163 164 struct tpm_bios_log log; 165 struct tpm_chip_seqops bin_log_seqops; 166 struct tpm_chip_seqops ascii_log_seqops; 167 168 unsigned int flags; 169 170 int dev_num; /* /dev/tpm# */ 171 unsigned long is_open; /* only one allowed */ 172 173 char hwrng_name[64]; 174 struct hwrng hwrng; 175 176 struct mutex tpm_mutex; /* tpm is processing */ 177 178 unsigned long timeout_a; /* jiffies */ 179 unsigned long timeout_b; /* jiffies */ 180 unsigned long timeout_c; /* jiffies */ 181 unsigned long timeout_d; /* jiffies */ 182 bool timeout_adjusted; 183 unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */ 184 bool duration_adjusted; 185 186 struct dentry *bios_dir; 187 188 const struct attribute_group *groups[3 + TPM_MAX_HASHES]; 189 unsigned int groups_cnt; 190 191 u32 nr_allocated_banks; 192 struct tpm_bank_info *allocated_banks; 193#ifdef CONFIG_ACPI 194 acpi_handle acpi_dev_handle; 195 char ppi_version[TPM_PPI_VERSION_LEN + 1]; 196#endif /* CONFIG_ACPI */ 197 198 struct tpm_space work_space; 199 u32 last_cc; 200 u32 nr_commands; 201 u32 *cc_attrs_tbl; 202 203 /* active locality */ 204 int locality; 205 206#ifdef CONFIG_TCG_TPM2_HMAC 207 /* details for communication security via sessions */ 208 209 /* saved context for NULL seed */ 210 u8 null_key_context[TPM2_MAX_CONTEXT_SIZE]; 211 /* name of NULL seed */ 212 u8 null_key_name[TPM2_NAME_SIZE]; 213 u8 null_ec_key_x[EC_PT_SZ]; 214 u8 null_ec_key_y[EC_PT_SZ]; 215 struct tpm2_auth *auth; 216#endif 217}; 218 219#define TPM_HEADER_SIZE 10 220 221enum tpm2_const { 222 TPM2_PLATFORM_PCR = 24, 223 TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8), 224}; 225 226enum tpm2_timeouts { 227 TPM2_TIMEOUT_A = 750, 228 TPM2_TIMEOUT_B = 4000, 229 TPM2_TIMEOUT_C = 200, 230 TPM2_TIMEOUT_D = 30, 231}; 232 233enum tpm2_durations { 234 TPM2_DURATION_SHORT = 20, 235 TPM2_DURATION_LONG = 2000, 236 TPM2_DURATION_DEFAULT = 120000, 237}; 238 239enum tpm2_structures { 240 TPM2_ST_NO_SESSIONS = 0x8001, 241 TPM2_ST_SESSIONS = 0x8002, 242 TPM2_ST_CREATION = 0x8021, 243}; 244 245/* Indicates from what layer of the software stack the error comes from */ 246#define TSS2_RC_LAYER_SHIFT 16 247#define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT) 248 249enum tpm2_return_codes { 250 TPM2_RC_SUCCESS = 0x0000, 251 TPM2_RC_HASH = 0x0083, /* RC_FMT1 */ 252 TPM2_RC_HANDLE = 0x008B, 253 TPM2_RC_INTEGRITY = 0x009F, 254 TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */ 255 TPM2_RC_FAILURE = 0x0101, 256 TPM2_RC_DISABLED = 0x0120, 257 TPM2_RC_UPGRADE = 0x012D, 258 TPM2_RC_COMMAND_CODE = 0x0143, 259 TPM2_RC_TESTING = 0x090A, /* RC_WARN */ 260 TPM2_RC_REFERENCE_H0 = 0x0910, 261 TPM2_RC_RETRY = 0x0922, 262 TPM2_RC_SESSION_MEMORY = 0x0903, 263}; 264 265enum tpm2_command_codes { 266 TPM2_CC_FIRST = 0x011F, 267 TPM2_CC_HIERARCHY_CONTROL = 0x0121, 268 TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129, 269 TPM2_CC_CREATE_PRIMARY = 0x0131, 270 TPM2_CC_SEQUENCE_COMPLETE = 0x013E, 271 TPM2_CC_SELF_TEST = 0x0143, 272 TPM2_CC_STARTUP = 0x0144, 273 TPM2_CC_SHUTDOWN = 0x0145, 274 TPM2_CC_NV_READ = 0x014E, 275 TPM2_CC_CREATE = 0x0153, 276 TPM2_CC_LOAD = 0x0157, 277 TPM2_CC_SEQUENCE_UPDATE = 0x015C, 278 TPM2_CC_UNSEAL = 0x015E, 279 TPM2_CC_CONTEXT_LOAD = 0x0161, 280 TPM2_CC_CONTEXT_SAVE = 0x0162, 281 TPM2_CC_FLUSH_CONTEXT = 0x0165, 282 TPM2_CC_READ_PUBLIC = 0x0173, 283 TPM2_CC_START_AUTH_SESS = 0x0176, 284 TPM2_CC_VERIFY_SIGNATURE = 0x0177, 285 TPM2_CC_GET_CAPABILITY = 0x017A, 286 TPM2_CC_GET_RANDOM = 0x017B, 287 TPM2_CC_PCR_READ = 0x017E, 288 TPM2_CC_PCR_EXTEND = 0x0182, 289 TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185, 290 TPM2_CC_HASH_SEQUENCE_START = 0x0186, 291 TPM2_CC_CREATE_LOADED = 0x0191, 292 TPM2_CC_LAST = 0x0193, /* Spec 1.36 */ 293}; 294 295enum tpm2_permanent_handles { 296 TPM2_RH_NULL = 0x40000007, 297 TPM2_RS_PW = 0x40000009, 298}; 299 300/* Most Significant Octet for key types */ 301enum tpm2_mso_type { 302 TPM2_MSO_NVRAM = 0x01, 303 TPM2_MSO_SESSION = 0x02, 304 TPM2_MSO_POLICY = 0x03, 305 TPM2_MSO_PERMANENT = 0x40, 306 TPM2_MSO_VOLATILE = 0x80, 307 TPM2_MSO_PERSISTENT = 0x81, 308}; 309 310static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle) 311{ 312 return handle >> 24; 313} 314 315enum tpm2_capabilities { 316 TPM2_CAP_HANDLES = 1, 317 TPM2_CAP_COMMANDS = 2, 318 TPM2_CAP_PCRS = 5, 319 TPM2_CAP_TPM_PROPERTIES = 6, 320}; 321 322enum tpm2_properties { 323 TPM_PT_TOTAL_COMMANDS = 0x0129, 324}; 325 326enum tpm2_startup_types { 327 TPM2_SU_CLEAR = 0x0000, 328 TPM2_SU_STATE = 0x0001, 329}; 330 331enum tpm2_cc_attrs { 332 TPM2_CC_ATTR_CHANDLES = 25, 333 TPM2_CC_ATTR_RHANDLE = 28, 334 TPM2_CC_ATTR_VENDOR = 29, 335}; 336 337#define TPM_VID_INTEL 0x8086 338#define TPM_VID_WINBOND 0x1050 339#define TPM_VID_STM 0x104A 340#define TPM_VID_ATML 0x1114 341#define TPM_VID_IFX 0x15D1 342 343enum tpm_chip_flags { 344 TPM_CHIP_FLAG_BOOTSTRAPPED = BIT(0), 345 TPM_CHIP_FLAG_TPM2 = BIT(1), 346 TPM_CHIP_FLAG_IRQ = BIT(2), 347 TPM_CHIP_FLAG_VIRTUAL = BIT(3), 348 TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4), 349 TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5), 350 TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6), 351 TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7), 352 TPM_CHIP_FLAG_SUSPENDED = BIT(8), 353 TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9), 354 TPM_CHIP_FLAG_DISABLE = BIT(10), 355 TPM_CHIP_FLAG_SYNC = BIT(11), 356}; 357 358#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev) 359 360struct tpm_header { 361 __be16 tag; 362 __be32 length; 363 union { 364 __be32 ordinal; 365 __be32 return_code; 366 }; 367} __packed; 368 369enum tpm_buf_flags { 370 /* the capacity exceeded: */ 371 TPM_BUF_OVERFLOW = BIT(0), 372 /* TPM2B format: */ 373 TPM_BUF_TPM2B = BIT(1), 374 /* read out of boundary: */ 375 TPM_BUF_BOUNDARY_ERROR = BIT(2), 376}; 377 378/* 379 * A string buffer type for constructing TPM commands. 380 */ 381struct tpm_buf { 382 u32 flags; 383 u32 length; 384 u8 *data; 385 u8 handles; 386}; 387 388enum tpm2_object_attributes { 389 TPM2_OA_FIXED_TPM = BIT(1), 390 TPM2_OA_ST_CLEAR = BIT(2), 391 TPM2_OA_FIXED_PARENT = BIT(4), 392 TPM2_OA_SENSITIVE_DATA_ORIGIN = BIT(5), 393 TPM2_OA_USER_WITH_AUTH = BIT(6), 394 TPM2_OA_ADMIN_WITH_POLICY = BIT(7), 395 TPM2_OA_NO_DA = BIT(10), 396 TPM2_OA_ENCRYPTED_DUPLICATION = BIT(11), 397 TPM2_OA_RESTRICTED = BIT(16), 398 TPM2_OA_DECRYPT = BIT(17), 399 TPM2_OA_SIGN = BIT(18), 400}; 401 402enum tpm2_session_attributes { 403 TPM2_SA_CONTINUE_SESSION = BIT(0), 404 TPM2_SA_AUDIT_EXCLUSIVE = BIT(1), 405 TPM2_SA_AUDIT_RESET = BIT(3), 406 TPM2_SA_DECRYPT = BIT(5), 407 TPM2_SA_ENCRYPT = BIT(6), 408 TPM2_SA_AUDIT = BIT(7), 409}; 410 411struct tpm2_hash { 412 unsigned int crypto_id; 413 unsigned int tpm_id; 414}; 415 416int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal); 417void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal); 418int tpm_buf_init_sized(struct tpm_buf *buf); 419void tpm_buf_reset_sized(struct tpm_buf *buf); 420void tpm_buf_destroy(struct tpm_buf *buf); 421u32 tpm_buf_length(struct tpm_buf *buf); 422void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length); 423void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value); 424void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value); 425void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value); 426u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset); 427u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset); 428u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset); 429void tpm_buf_append_handle(struct tpm_chip *chip, struct tpm_buf *buf, u32 handle); 430 431/* 432 * Check if TPM device is in the firmware upgrade mode. 433 */ 434static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip) 435{ 436 return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE; 437} 438 439static inline u32 tpm2_rc_value(u32 rc) 440{ 441 return (rc & BIT(7)) ? rc & 0xbf : rc; 442} 443 444/* 445 * Convert a return value from tpm_transmit_cmd() to POSIX error code. 446 */ 447static inline ssize_t tpm_ret_to_err(ssize_t ret) 448{ 449 if (ret < 0) 450 return ret; 451 452 switch (tpm2_rc_value(ret)) { 453 case TPM2_RC_SUCCESS: 454 return 0; 455 case TPM2_RC_SESSION_MEMORY: 456 return -ENOMEM; 457 default: 458 return -EFAULT; 459 } 460} 461 462#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE) 463 464extern int tpm_is_tpm2(struct tpm_chip *chip); 465extern __must_check int tpm_try_get_ops(struct tpm_chip *chip); 466extern void tpm_put_ops(struct tpm_chip *chip); 467extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf, 468 size_t min_rsp_body_length, const char *desc); 469extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx, 470 struct tpm_digest *digest); 471extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, 472 struct tpm_digest *digests); 473extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max); 474extern struct tpm_chip *tpm_default_chip(void); 475void tpm2_flush_context(struct tpm_chip *chip, u32 handle); 476 477static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle) 478{ 479 /* simple authorization for empty auth */ 480 tpm_buf_append_u32(buf, 9); /* total length of auth */ 481 tpm_buf_append_u32(buf, handle); 482 tpm_buf_append_u16(buf, 0); /* nonce len */ 483 tpm_buf_append_u8(buf, 0); /* attributes */ 484 tpm_buf_append_u16(buf, 0); /* hmac len */ 485} 486#else 487static inline int tpm_is_tpm2(struct tpm_chip *chip) 488{ 489 return -ENODEV; 490} 491static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx, 492 struct tpm_digest *digest) 493{ 494 return -ENODEV; 495} 496 497static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, 498 struct tpm_digest *digests) 499{ 500 return -ENODEV; 501} 502 503static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max) 504{ 505 return -ENODEV; 506} 507 508static inline struct tpm_chip *tpm_default_chip(void) 509{ 510 return NULL; 511} 512 513static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle) 514{ 515} 516#endif 517 518static inline struct tpm2_auth *tpm2_chip_auth(struct tpm_chip *chip) 519{ 520#ifdef CONFIG_TCG_TPM2_HMAC 521 return chip->auth; 522#else 523 return NULL; 524#endif 525} 526 527void tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf, 528 u32 handle, u8 *name); 529void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf, 530 u8 attributes, u8 *passphrase, 531 int passphraselen); 532void tpm_buf_append_auth(struct tpm_chip *chip, struct tpm_buf *buf, 533 u8 attributes, u8 *passphrase, int passphraselen); 534static inline void tpm_buf_append_hmac_session_opt(struct tpm_chip *chip, 535 struct tpm_buf *buf, 536 u8 attributes, 537 u8 *passphrase, 538 int passphraselen) 539{ 540 struct tpm_header *head; 541 int offset; 542 543 if (tpm2_chip_auth(chip)) { 544 tpm_buf_append_hmac_session(chip, buf, attributes, passphrase, passphraselen); 545 } else { 546 offset = buf->handles * 4 + TPM_HEADER_SIZE; 547 head = (struct tpm_header *)buf->data; 548 549 /* 550 * If the only sessions are optional, the command tag must change to 551 * TPM2_ST_NO_SESSIONS. 552 */ 553 if (tpm_buf_length(buf) == offset) 554 head->tag = cpu_to_be16(TPM2_ST_NO_SESSIONS); 555 } 556} 557 558#ifdef CONFIG_TCG_TPM2_HMAC 559 560int tpm2_start_auth_session(struct tpm_chip *chip); 561void tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf); 562int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf, 563 int rc); 564void tpm2_end_auth_session(struct tpm_chip *chip); 565#else 566#include <linux/unaligned.h> 567 568static inline int tpm2_start_auth_session(struct tpm_chip *chip) 569{ 570 return 0; 571} 572static inline void tpm2_end_auth_session(struct tpm_chip *chip) 573{ 574} 575static inline void tpm_buf_fill_hmac_session(struct tpm_chip *chip, 576 struct tpm_buf *buf) 577{ 578} 579static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip, 580 struct tpm_buf *buf, 581 int rc) 582{ 583 return rc; 584} 585#endif /* CONFIG_TCG_TPM2_HMAC */ 586 587#endif