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1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 * Copyright 2023-2024 Rivos, Inc
4 */
5
6#ifndef _ASM_HWPROBE_H
7#define _ASM_HWPROBE_H
8
9#include <uapi/asm/hwprobe.h>
10
11#define RISCV_HWPROBE_MAX_KEY 14
12
13static inline bool riscv_hwprobe_key_is_valid(__s64 key)
14{
15 return key >= 0 && key <= RISCV_HWPROBE_MAX_KEY;
16}
17
18static inline bool hwprobe_key_is_bitmask(__s64 key)
19{
20 switch (key) {
21 case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
22 case RISCV_HWPROBE_KEY_IMA_EXT_0:
23 case RISCV_HWPROBE_KEY_CPUPERF_0:
24 case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
25 case RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0:
26 case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
27 return true;
28 }
29
30 return false;
31}
32
33static inline bool riscv_hwprobe_pair_cmp(struct riscv_hwprobe *pair,
34 struct riscv_hwprobe *other_pair)
35{
36 if (pair->key != other_pair->key)
37 return false;
38
39 if (hwprobe_key_is_bitmask(pair->key))
40 return (pair->value & other_pair->value) == other_pair->value;
41
42 return pair->value == other_pair->value;
43}
44
45#ifdef CONFIG_MMU
46void riscv_hwprobe_register_async_probe(void);
47void riscv_hwprobe_complete_async_probe(void);
48#else
49static inline void riscv_hwprobe_register_async_probe(void) {}
50static inline void riscv_hwprobe_complete_async_probe(void) {}
51#endif
52#endif