tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Last Level Cache Controller
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11
12description: |
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
14 that can be shared by multiple clients. Clients here are different cores in the
15 SoC, the idea is to minimize the local caches at the clients and migrate to
16 common pool of memory. Cache memory is divided into partitions called slices
17 which are assigned to clients. Clients can query the slice details, activate
18 and deactivate them.
19
20properties:
21 compatible:
22 enum:
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
27 - qcom,sa8775p-llcc
28 - qcom,sar1130p-llcc
29 - qcom,sar2130p-llcc
30 - qcom,sc7180-llcc
31 - qcom,sc7280-llcc
32 - qcom,sc8180x-llcc
33 - qcom,sc8280xp-llcc
34 - qcom,sdm845-llcc
35 - qcom,sm6350-llcc
36 - qcom,sm7150-llcc
37 - qcom,sm8150-llcc
38 - qcom,sm8250-llcc
39 - qcom,sm8350-llcc
40 - qcom,sm8450-llcc
41 - qcom,sm8550-llcc
42 - qcom,sm8650-llcc
43 - qcom,sm8750-llcc
44 - qcom,x1e80100-llcc
45
46 reg:
47 minItems: 1
48 maxItems: 10
49
50 reg-names:
51 minItems: 1
52 maxItems: 10
53
54 interrupts:
55 maxItems: 1
56
57 nvmem-cells:
58 items:
59 - description: Reference to an nvmem node for multi channel DDR
60
61 nvmem-cell-names:
62 items:
63 - const: multi-chan-ddr
64
65required:
66 - compatible
67 - reg
68 - reg-names
69
70allOf:
71 - if:
72 properties:
73 compatible:
74 contains:
75 enum:
76 - qcom,ipq5424-llcc
77 then:
78 properties:
79 reg:
80 items:
81 - description: LLCC0 base register region
82 reg-names:
83 items:
84 - const: llcc0_base
85
86 - if:
87 properties:
88 compatible:
89 contains:
90 enum:
91 - qcom,sar1130p-llcc
92 - qcom,sar2130p-llcc
93 then:
94 properties:
95 reg:
96 items:
97 - description: LLCC0 base register region
98 - description: LLCC1 base register region
99 - description: LLCC broadcast OR register region
100 - description: LLCC broadcast AND register region
101 - description: LLCC scratchpad broadcast OR register region
102 - description: LLCC scratchpad broadcast AND register region
103 reg-names:
104 items:
105 - const: llcc0_base
106 - const: llcc1_base
107 - const: llcc_broadcast_base
108 - const: llcc_broadcast_and_base
109 - const: llcc_scratchpad_broadcast_base
110 - const: llcc_scratchpad_broadcast_and_base
111
112 - if:
113 properties:
114 compatible:
115 contains:
116 enum:
117 - qcom,qcs615-llcc
118 - qcom,sc7180-llcc
119 - qcom,sm6350-llcc
120 then:
121 properties:
122 reg:
123 items:
124 - description: LLCC0 base register region
125 - description: LLCC broadcast base register region
126 reg-names:
127 items:
128 - const: llcc0_base
129 - const: llcc_broadcast_base
130
131 - if:
132 properties:
133 compatible:
134 contains:
135 enum:
136 - qcom,sa8775p-llcc
137 then:
138 properties:
139 reg:
140 items:
141 - description: LLCC0 base register region
142 - description: LLCC1 base register region
143 - description: LLCC2 base register region
144 - description: LLCC3 base register region
145 - description: LLCC4 base register region
146 - description: LLCC5 base register region
147 - description: LLCC broadcast base register region
148 reg-names:
149 items:
150 - const: llcc0_base
151 - const: llcc1_base
152 - const: llcc2_base
153 - const: llcc3_base
154 - const: llcc4_base
155 - const: llcc5_base
156 - const: llcc_broadcast_base
157
158 - if:
159 properties:
160 compatible:
161 contains:
162 enum:
163 - qcom,sc7280-llcc
164 then:
165 properties:
166 reg:
167 items:
168 - description: LLCC0 base register region
169 - description: LLCC1 base register region
170 - description: LLCC broadcast base register region
171 reg-names:
172 items:
173 - const: llcc0_base
174 - const: llcc1_base
175 - const: llcc_broadcast_base
176
177 - if:
178 properties:
179 compatible:
180 contains:
181 enum:
182 - qcom,qdu1000-llcc
183 - qcom,sc8180x-llcc
184 - qcom,sc8280xp-llcc
185 then:
186 properties:
187 reg:
188 items:
189 - description: LLCC0 base register region
190 - description: LLCC1 base register region
191 - description: LLCC2 base register region
192 - description: LLCC3 base register region
193 - description: LLCC4 base register region
194 - description: LLCC5 base register region
195 - description: LLCC6 base register region
196 - description: LLCC7 base register region
197 - description: LLCC broadcast base register region
198 reg-names:
199 items:
200 - const: llcc0_base
201 - const: llcc1_base
202 - const: llcc2_base
203 - const: llcc3_base
204 - const: llcc4_base
205 - const: llcc5_base
206 - const: llcc6_base
207 - const: llcc7_base
208 - const: llcc_broadcast_base
209
210 - if:
211 properties:
212 compatible:
213 contains:
214 enum:
215 - qcom,x1e80100-llcc
216 then:
217 properties:
218 reg:
219 items:
220 - description: LLCC0 base register region
221 - description: LLCC1 base register region
222 - description: LLCC2 base register region
223 - description: LLCC3 base register region
224 - description: LLCC4 base register region
225 - description: LLCC5 base register region
226 - description: LLCC6 base register region
227 - description: LLCC7 base register region
228 - description: LLCC broadcast base register region
229 - description: LLCC broadcast AND register region
230 reg-names:
231 items:
232 - const: llcc0_base
233 - const: llcc1_base
234 - const: llcc2_base
235 - const: llcc3_base
236 - const: llcc4_base
237 - const: llcc5_base
238 - const: llcc6_base
239 - const: llcc7_base
240 - const: llcc_broadcast_base
241 - const: llcc_broadcast_and_base
242
243 - if:
244 properties:
245 compatible:
246 contains:
247 enum:
248 - qcom,qcs8300-llcc
249 - qcom,sdm845-llcc
250 - qcom,sm8150-llcc
251 - qcom,sm8250-llcc
252 - qcom,sm8350-llcc
253 then:
254 properties:
255 reg:
256 items:
257 - description: LLCC0 base register region
258 - description: LLCC1 base register region
259 - description: LLCC2 base register region
260 - description: LLCC3 base register region
261 - description: LLCC broadcast base register region
262 reg-names:
263 items:
264 - const: llcc0_base
265 - const: llcc1_base
266 - const: llcc2_base
267 - const: llcc3_base
268 - const: llcc_broadcast_base
269
270 - if:
271 properties:
272 compatible:
273 contains:
274 enum:
275 - qcom,sm8450-llcc
276 - qcom,sm8550-llcc
277 - qcom,sm8650-llcc
278 - qcom,sm8750-llcc
279 then:
280 properties:
281 reg:
282 items:
283 - description: LLCC0 base register region
284 - description: LLCC1 base register region
285 - description: LLCC2 base register region
286 - description: LLCC3 base register region
287 - description: LLCC broadcast OR register region
288 - description: LLCC broadcast AND register region
289 reg-names:
290 items:
291 - const: llcc0_base
292 - const: llcc1_base
293 - const: llcc2_base
294 - const: llcc3_base
295 - const: llcc_broadcast_base
296 - const: llcc_broadcast_and_base
297
298additionalProperties: false
299
300examples:
301 - |
302 #include <dt-bindings/interrupt-controller/arm-gic.h>
303
304 soc {
305 #address-cells = <2>;
306 #size-cells = <2>;
307
308 system-cache-controller@1100000 {
309 compatible = "qcom,sdm845-llcc";
310 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
311 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
312 <0 0x01300000 0 0x50000>;
313 reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
314 "llcc3_base", "llcc_broadcast_base";
315 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
316 };
317 };