Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
4 */
5
6#include <linux/module.h>
7#include <linux/platform_device.h>
8#include <soc/tegra/fuse.h>
9
10#include "soctherm.h"
11
12#define NOMINAL_CALIB_CP 25
13
14#define FUSE_TSENSOR_CALIB_CP_TS_BASE_MASK 0x1fff
15#define FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK (0x1fff << 13)
16#define FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT 13
17
18/*
19 * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON:
20 * 3 2 1 0
21 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
22 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
23 * | BASE_FT | BASE_CP | SHFT_FT | SHIFT_CP |
24 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
25 *
26 * Tegra124:
27 * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bits,
28 * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits
29 * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0].
30 *
31 * FUSE_TSENSOR_COMMON:
32 * 3 2 1 0
33 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
34 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
35 * |-----------| SHFT_FT | BASE_FT | BASE_CP |
36 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
37 *
38 * FUSE_SPARE_REALIGNMENT_REG:
39 * 3 2 1 0
40 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
41 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
42 * |---------------------------------------------------| SHIFT_CP |
43 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
44 *
45 * Tegra114: Layout of bits in FUSE_TSENSOR_COMMON aka FUSE_VSENSOR_CALIB:
46 * 3 2 1 0
47 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
48 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
49 * | SHFT_FT | BASE_FT | SHIFT_CP | BASE_CP |
50 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
51 */
52
53#define CALIB_COEFFICIENT 1000000LL
54
55/**
56 * div64_s64_precise() - wrapper for div64_s64()
57 * @a: the dividend
58 * @b: the divisor
59 *
60 * Implements division with fairly accurate rounding instead of truncation by
61 * shifting the dividend to the left by 16 so that the quotient has a
62 * much higher precision.
63 *
64 * Return: the quotient of a / b.
65 */
66static s64 div64_s64_precise(s64 a, s32 b)
67{
68 s64 r, al;
69
70 /* Scale up for increased precision division */
71 al = a << 16;
72
73 r = div64_s64(al * 2 + 1, 2 * b);
74 return r >> 16;
75}
76
77int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
78 struct tsensor_shared_calib *shared)
79{
80 u32 val;
81 s32 shifted_cp, shifted_ft;
82 int err;
83
84 err = tegra_fuse_readl(tfuse->fuse_common_reg, &val);
85 if (err)
86 return err;
87
88 shared->base_cp = (val & tfuse->fuse_base_cp_mask) >>
89 tfuse->fuse_base_cp_shift;
90 shared->base_ft = (val & tfuse->fuse_base_ft_mask) >>
91 tfuse->fuse_base_ft_shift;
92
93 shifted_ft = (val & tfuse->fuse_shift_ft_mask) >>
94 tfuse->fuse_shift_ft_shift;
95 shifted_ft = sign_extend32(shifted_ft, 4);
96
97 if (tfuse->fuse_spare_realignment) {
98 err = tegra_fuse_readl(tfuse->fuse_spare_realignment, &val);
99 if (err)
100 return err;
101 }
102
103 shifted_cp = (val & tfuse->fuse_shift_cp_mask) >>
104 tfuse->fuse_shift_cp_shift;
105 shifted_cp = sign_extend32(val, 5);
106
107 shared->actual_temp_cp = 2 * NOMINAL_CALIB_CP + shifted_cp;
108 shared->actual_temp_ft = 2 * tfuse->nominal_calib_ft + shifted_ft;
109
110 return 0;
111}
112
113int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
114 const struct tsensor_shared_calib *shared,
115 u32 *calibration)
116{
117 const struct tegra_tsensor_group *sensor_group;
118 u32 val, calib;
119 s32 actual_tsensor_ft, actual_tsensor_cp;
120 s32 delta_sens, delta_temp;
121 s32 mult, div;
122 s16 therma, thermb;
123 s64 temp;
124 int err;
125
126 sensor_group = sensor->group;
127
128 err = tegra_fuse_readl(sensor->calib_fuse_offset, &val);
129 if (err)
130 return err;
131
132 actual_tsensor_cp = (shared->base_cp * 64) + sign_extend32(val, 12);
133 val = (val & FUSE_TSENSOR_CALIB_FT_TS_BASE_MASK) >>
134 FUSE_TSENSOR_CALIB_FT_TS_BASE_SHIFT;
135 actual_tsensor_ft = (shared->base_ft * 32) + sign_extend32(val, 12);
136
137 delta_sens = actual_tsensor_ft - actual_tsensor_cp;
138 delta_temp = shared->actual_temp_ft - shared->actual_temp_cp;
139
140 mult = sensor_group->pdiv * sensor->config->tsample_ate;
141 div = sensor->config->tsample * sensor_group->pdiv_ate;
142
143 temp = (s64)delta_temp * (1LL << 13) * mult;
144 therma = div64_s64_precise(temp, (s64)delta_sens * div);
145
146 temp = ((s64)actual_tsensor_ft * shared->actual_temp_cp) -
147 ((s64)actual_tsensor_cp * shared->actual_temp_ft);
148 thermb = div64_s64_precise(temp, delta_sens);
149
150 temp = (s64)therma * sensor->fuse_corr_alpha;
151 therma = div64_s64_precise(temp, CALIB_COEFFICIENT);
152
153 temp = (s64)thermb * sensor->fuse_corr_alpha + sensor->fuse_corr_beta;
154 thermb = div64_s64_precise(temp, CALIB_COEFFICIENT);
155
156 calib = ((u16)therma << SENSOR_CONFIG2_THERMA_SHIFT) |
157 ((u16)thermb << SENSOR_CONFIG2_THERMB_SHIFT);
158
159 *calibration = calib;
160
161 return 0;
162}
163
164MODULE_AUTHOR("Wei Ni <wni@nvidia.com>");
165MODULE_DESCRIPTION("Tegra SOCTHERM fuse management");
166MODULE_LICENSE("GPL v2");