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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SMI (Smart Multimedia Interface) Common
9
10maintainers:
11 - Yong Wu <yong.wu@mediatek.com>
12
13description: |
14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
15
16 MediaTek SMI have two generations of HW architecture, here is the list
17 which generation the SoCs use:
18 generation 1: mt2701 and mt7623.
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
20
21 There's slight differences between the two SMI, for generation 2, the
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
25 SMI generation 1 to transform the smi clock into emi clock domain, but that is
26 not needed for SMI generation 2.
27
28properties:
29 compatible:
30 oneOf:
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt6795-smi-common
36 - mediatek,mt6893-smi-common
37 - mediatek,mt8167-smi-common
38 - mediatek,mt8173-smi-common
39 - mediatek,mt8183-smi-common
40 - mediatek,mt8186-smi-common
41 - mediatek,mt8188-smi-common-vdo
42 - mediatek,mt8188-smi-common-vpp
43 - mediatek,mt8192-smi-common
44 - mediatek,mt8195-smi-common-vdo
45 - mediatek,mt8195-smi-common-vpp
46 - mediatek,mt8195-smi-sub-common
47 - mediatek,mt8365-smi-common
48
49 - description: for mt7623
50 items:
51 - const: mediatek,mt7623-smi-common
52 - const: mediatek,mt2701-smi-common
53
54 reg:
55 maxItems: 1
56
57 power-domains:
58 maxItems: 1
59
60 clocks:
61 description: |
62 apb and smi are mandatory. the async is only for generation 1 smi HW.
63 gals(global async local sync) also is optional, see below.
64 minItems: 2
65 items:
66 - description: apb is Advanced Peripheral Bus clock, It's the clock for
67 setting the register.
68 - description: smi is the clock for transfer data and command.
69 - description: Either asynchronous clock to help transform the smi clock
70 into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
71 - description: gals1 is the path1 clock of gals.
72
73 clock-names:
74 minItems: 2
75 maxItems: 4
76
77 mediatek,smi:
78 $ref: /schemas/types.yaml#/definitions/phandle
79 description: a phandle to the smi-common node above. Only for sub-common.
80
81required:
82 - compatible
83 - reg
84 - power-domains
85 - clocks
86 - clock-names
87
88allOf:
89 - if: # only for gen1 HW
90 properties:
91 compatible:
92 contains:
93 enum:
94 - mediatek,mt2701-smi-common
95 then:
96 properties:
97 clocks:
98 minItems: 3
99 maxItems: 3
100 clock-names:
101 items:
102 - const: apb
103 - const: smi
104 - const: async
105
106 - if: # only for sub common
107 properties:
108 compatible:
109 contains:
110 enum:
111 - mediatek,mt8195-smi-sub-common
112 then:
113 required:
114 - mediatek,smi
115 properties:
116 clocks:
117 minItems: 3
118 maxItems: 3
119 clock-names:
120 items:
121 - const: apb
122 - const: smi
123 - const: gals0
124 else:
125 properties:
126 mediatek,smi: false
127
128 - if: # for gen2 HW that have gals
129 properties:
130 compatible:
131 enum:
132 - mediatek,mt6779-smi-common
133 - mediatek,mt8183-smi-common
134 - mediatek,mt8186-smi-common
135 - mediatek,mt8192-smi-common
136 - mediatek,mt8195-smi-common-vdo
137 - mediatek,mt8195-smi-common-vpp
138 - mediatek,mt8365-smi-common
139
140 then:
141 properties:
142 clocks:
143 minItems: 4
144 maxItems: 4
145 clock-names:
146 items:
147 - const: apb
148 - const: smi
149 - const: gals0
150 - const: gals1
151
152 - if: # for gen2 HW that don't have gals
153 properties:
154 compatible:
155 enum:
156 - mediatek,mt2712-smi-common
157 - mediatek,mt6795-smi-common
158 - mediatek,mt8167-smi-common
159 - mediatek,mt8173-smi-common
160
161 then:
162 properties:
163 clocks:
164 minItems: 2
165 maxItems: 2
166 clock-names:
167 items:
168 - const: apb
169 - const: smi
170
171additionalProperties: false
172
173examples:
174 - |+
175 #include <dt-bindings/clock/mt8173-clk.h>
176 #include <dt-bindings/power/mt8173-power.h>
177
178 smi_common: smi@14022000 {
179 compatible = "mediatek,mt8173-smi-common";
180 reg = <0x14022000 0x1000>;
181 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
182 clocks = <&mmsys CLK_MM_SMI_COMMON>,
183 <&mmsys CLK_MM_SMI_COMMON>;
184 clock-names = "apb", "smi";
185 };