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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Support code for Analog Devices Sigma-Delta ADCs
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8#ifndef __AD_SIGMA_DELTA_H__
9#define __AD_SIGMA_DELTA_H__
10
11#include <linux/iio/iio.h>
12
13enum ad_sigma_delta_mode {
14 AD_SD_MODE_CONTINUOUS = 0,
15 AD_SD_MODE_SINGLE = 1,
16 AD_SD_MODE_IDLE = 2,
17 AD_SD_MODE_POWERDOWN = 3,
18};
19
20/**
21 * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
22 * @mode: Calibration mode.
23 * @channel: Calibration channel.
24 */
25struct ad_sd_calib_data {
26 unsigned int mode;
27 unsigned int channel;
28};
29
30struct ad_sigma_delta;
31struct device;
32struct gpio_desc;
33struct iio_dev;
34struct spi_offload;
35struct spi_offload_trigger;
36
37/**
38 * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
39 * @set_channel: Will be called to select the current channel, may be NULL.
40 * @append_status: Will be called to enable status append at the end of the sample, may be NULL.
41 * @set_mode: Will be called to select the current mode, may be NULL.
42 * @disable_all: Will be called to disable all channels, may be NULL.
43 * @disable_one: Will be called to disable a single channel after
44 * ad_sigma_delta_single_conversion(), may be NULL.
45 * Usage of this callback expects iio_chan_spec.address to contain
46 * the value required for the driver to identify the channel.
47 * @postprocess_sample: Is called for each sampled data word, can be used to
48 * modify or drop the sample data, it, may be NULL.
49 * @has_registers: true if the device has writable and readable registers, false
50 * if there is just one read-only sample data shift register.
51 * @has_named_irqs: Set to true if there is more than one IRQ line.
52 * @supports_spi_offload: Set to true if the driver supports SPI offload. Often
53 * special considerations are needed for scan_type and other channel
54 * info, so individual drivers have to set this to let the core
55 * code know that it can use SPI offload if it is available.
56 * @addr_shift: Shift of the register address in the communications register.
57 * @read_mask: Mask for the communications register having the read bit set.
58 * @status_ch_mask: Mask for the channel number stored in status register.
59 * @data_reg: Address of the data register, if 0 the default address of 0x3 will
60 * be used.
61 * @irq_flags: flags for the interrupt used by the triggered buffer
62 * @num_slots: Number of sequencer slots
63 * @num_resetclks: Number of SPI clk cycles with MOSI=1 to reset the chip.
64 */
65struct ad_sigma_delta_info {
66 int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
67 int (*append_status)(struct ad_sigma_delta *, bool append);
68 int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
69 int (*disable_all)(struct ad_sigma_delta *);
70 int (*disable_one)(struct ad_sigma_delta *, unsigned int chan);
71 int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
72 bool has_registers;
73 bool has_named_irqs;
74 bool supports_spi_offload;
75 unsigned int addr_shift;
76 unsigned int read_mask;
77 unsigned int status_ch_mask;
78 unsigned int data_reg;
79 unsigned long irq_flags;
80 unsigned int num_slots;
81 unsigned int num_resetclks;
82};
83
84/**
85 * struct ad_sigma_delta - Sigma Delta device struct
86 * @spi: The spi device associated with the Sigma Delta device.
87 * @trig: The IIO trigger associated with the Sigma Delta device.
88 *
89 * Most of the fields are private to the sigma delta library code and should not
90 * be accessed by individual drivers.
91 */
92struct ad_sigma_delta {
93 struct spi_device *spi;
94 struct iio_trigger *trig;
95
96/* private: */
97 struct completion completion;
98 spinlock_t irq_lock; /* protects .irq_dis and irq en/disable state */
99 bool irq_dis;
100
101 bool bus_locked;
102 bool keep_cs_asserted;
103
104 u8 comm;
105
106 const struct ad_sigma_delta_info *info;
107 unsigned int active_slots;
108 unsigned int current_slot;
109 unsigned int num_slots;
110 struct gpio_desc *rdy_gpiod;
111 int irq_line;
112 bool status_appended;
113 /* map slots to channels in order to know what to expect from devices */
114 unsigned int *slots;
115 struct spi_message sample_msg;
116 struct spi_transfer sample_xfer[2];
117 u8 *samples_buf;
118 struct spi_offload *offload;
119 struct spi_offload_trigger *offload_trigger;
120
121 /*
122 * DMA (thus cache coherency maintenance) requires the
123 * transfer buffers to live in their own cache lines.
124 * 'tx_buf' is up to 32 bits.
125 * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
126 * rounded to 16 bytes to take into account padding.
127 */
128 u8 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
129 u8 rx_buf[16] __aligned(8);
130 u8 sample_addr;
131};
132
133static inline bool ad_sigma_delta_has_spi_offload(struct ad_sigma_delta *sd)
134{
135 return sd->offload != NULL;
136}
137
138static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
139 unsigned int channel)
140{
141 if (sd->info->set_channel)
142 return sd->info->set_channel(sd, channel);
143
144 return 0;
145}
146
147static inline int ad_sigma_delta_append_status(struct ad_sigma_delta *sd, bool append)
148{
149 int ret;
150
151 if (sd->info->append_status) {
152 ret = sd->info->append_status(sd, append);
153 if (ret < 0)
154 return ret;
155
156 sd->status_appended = append;
157 }
158
159 return 0;
160}
161
162static inline int ad_sigma_delta_disable_all(struct ad_sigma_delta *sd)
163{
164 if (sd->info->disable_all)
165 return sd->info->disable_all(sd);
166
167 return 0;
168}
169
170static inline int ad_sigma_delta_disable_one(struct ad_sigma_delta *sd,
171 unsigned int chan)
172{
173 if (sd->info->disable_one)
174 return sd->info->disable_one(sd, chan);
175
176 return 0;
177}
178
179static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
180 unsigned int mode)
181{
182 if (sd->info->set_mode)
183 return sd->info->set_mode(sd, mode);
184
185 return 0;
186}
187
188static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
189 unsigned int raw_sample)
190{
191 if (sd->info->postprocess_sample)
192 return sd->info->postprocess_sample(sd, raw_sample);
193
194 return 0;
195}
196
197void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, u8 comm);
198int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
199 unsigned int size, unsigned int val);
200int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
201 unsigned int size, unsigned int *val);
202
203int ad_sd_reset(struct ad_sigma_delta *sigma_delta);
204
205int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
206 const struct iio_chan_spec *chan, int *val);
207int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
208 unsigned int mode, unsigned int channel);
209int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
210 const struct ad_sd_calib_data *cd, unsigned int n);
211int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
212 struct spi_device *spi, const struct ad_sigma_delta_info *info);
213
214int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev);
215
216int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
217
218#endif