Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/* Abilis Systems MODULE DESCRIPTION
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Authors: Sascha Leuenberger <sascha.leuenberger@abilis.com>
7 * Christian Ruppert <christian.ruppert@abilis.com>
8 */
9
10#include <linux/bitops.h>
11#include <linux/gpio/driver.h>
12#include <linux/gpio/generic.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/irq.h>
16#include <linux/irqdomain.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/pinctrl/consumer.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24
25#define TB10X_GPIO_DIR_IN (0x00000000)
26#define TB10X_GPIO_DIR_OUT (0x00000001)
27#define OFFSET_TO_REG_DDR (0x00)
28#define OFFSET_TO_REG_DATA (0x04)
29#define OFFSET_TO_REG_INT_EN (0x08)
30#define OFFSET_TO_REG_CHANGE (0x0C)
31#define OFFSET_TO_REG_WRMASK (0x10)
32#define OFFSET_TO_REG_INT_TYPE (0x14)
33
34
35/**
36 * @base: register base address
37 * @domain: IRQ domain of GPIO generated interrupts managed by this controller
38 * @irq: Interrupt line of parent interrupt controller
39 * @chip: Generic GPIO chip structure associated with this GPIO controller
40 */
41struct tb10x_gpio {
42 void __iomem *base;
43 struct irq_domain *domain;
44 int irq;
45 struct gpio_generic_chip chip;
46};
47
48static inline u32 tb10x_reg_read(struct tb10x_gpio *gpio, unsigned int offs)
49{
50 return ioread32(gpio->base + offs);
51}
52
53static inline void tb10x_reg_write(struct tb10x_gpio *gpio, unsigned int offs,
54 u32 val)
55{
56 iowrite32(val, gpio->base + offs);
57}
58
59static inline void tb10x_set_bits(struct tb10x_gpio *gpio, unsigned int offs,
60 u32 mask, u32 val)
61{
62 u32 r;
63
64 guard(gpio_generic_lock_irqsave)(&gpio->chip);
65
66 r = tb10x_reg_read(gpio, offs);
67 r = (r & ~mask) | (val & mask);
68
69 tb10x_reg_write(gpio, offs, r);
70}
71
72static int tb10x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
73{
74 struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip);
75
76 return irq_create_mapping(tb10x_gpio->domain, offset);
77}
78
79static int tb10x_gpio_irq_set_type(struct irq_data *data, unsigned int type)
80{
81 if ((type & IRQF_TRIGGER_MASK) != IRQ_TYPE_EDGE_BOTH) {
82 pr_err("Only (both) edge triggered interrupts supported.\n");
83 return -EINVAL;
84 }
85
86 irqd_set_trigger_type(data, type);
87
88 return IRQ_SET_MASK_OK;
89}
90
91static irqreturn_t tb10x_gpio_irq_cascade(int irq, void *data)
92{
93 struct tb10x_gpio *tb10x_gpio = data;
94 u32 r = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_CHANGE);
95 u32 m = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_INT_EN);
96 const unsigned long bits = r & m;
97 int i;
98
99 for_each_set_bit(i, &bits, 32)
100 generic_handle_domain_irq(tb10x_gpio->domain, i);
101
102 return IRQ_HANDLED;
103}
104
105static int tb10x_gpio_probe(struct platform_device *pdev)
106{
107 struct gpio_generic_chip_config config;
108 struct tb10x_gpio *tb10x_gpio;
109 struct device *dev = &pdev->dev;
110 struct device_node *np = dev->of_node;
111 int ret = -EBUSY;
112 u32 ngpio;
113
114 if (!np)
115 return -EINVAL;
116
117 if (of_property_read_u32(np, "abilis,ngpio", &ngpio))
118 return -EINVAL;
119
120 tb10x_gpio = devm_kzalloc(dev, sizeof(*tb10x_gpio), GFP_KERNEL);
121 if (tb10x_gpio == NULL)
122 return -ENOMEM;
123
124 tb10x_gpio->base = devm_platform_ioremap_resource(pdev, 0);
125 if (IS_ERR(tb10x_gpio->base))
126 return PTR_ERR(tb10x_gpio->base);
127
128 tb10x_gpio->chip.gc.label =
129 devm_kasprintf(dev, GFP_KERNEL, "%pOF", pdev->dev.of_node);
130 if (!tb10x_gpio->chip.gc.label)
131 return -ENOMEM;
132
133 /*
134 * Initialize generic GPIO with one single register for reading and setting
135 * the lines, no special set or clear registers and a data direction register
136 * wher 1 means "output".
137 */
138 config = (struct gpio_generic_chip_config) {
139 .dev = dev,
140 .sz = 4,
141 .dat = tb10x_gpio->base + OFFSET_TO_REG_DATA,
142 .dirout = tb10x_gpio->base + OFFSET_TO_REG_DDR,
143 };
144
145 ret = gpio_generic_chip_init(&tb10x_gpio->chip, &config);
146 if (ret) {
147 dev_err(dev, "unable to init generic GPIO\n");
148 return ret;
149 }
150 tb10x_gpio->chip.gc.base = -1;
151 tb10x_gpio->chip.gc.parent = dev;
152 tb10x_gpio->chip.gc.owner = THIS_MODULE;
153 /*
154 * ngpio is set by gpio_generic_chip_init() but we override it, this
155 * .request() callback also overrides the one set up by generic GPIO.
156 */
157 tb10x_gpio->chip.gc.ngpio = ngpio;
158 tb10x_gpio->chip.gc.request = gpiochip_generic_request;
159 tb10x_gpio->chip.gc.free = gpiochip_generic_free;
160
161 ret = devm_gpiochip_add_data(dev, &tb10x_gpio->chip.gc, tb10x_gpio);
162 if (ret < 0) {
163 dev_err(dev, "Could not add gpiochip.\n");
164 return ret;
165 }
166
167 platform_set_drvdata(pdev, tb10x_gpio);
168
169 if (of_property_read_bool(np, "interrupt-controller")) {
170 struct irq_chip_generic *gc;
171
172 ret = platform_get_irq(pdev, 0);
173 if (ret < 0)
174 return ret;
175
176 tb10x_gpio->chip.gc.to_irq = tb10x_gpio_to_irq;
177 tb10x_gpio->irq = ret;
178
179 ret = devm_request_irq(dev, ret, tb10x_gpio_irq_cascade,
180 IRQF_TRIGGER_NONE | IRQF_SHARED,
181 dev_name(dev), tb10x_gpio);
182 if (ret != 0)
183 return ret;
184
185 tb10x_gpio->domain = irq_domain_create_linear(dev_fwnode(dev),
186 tb10x_gpio->chip.gc.ngpio,
187 &irq_generic_chip_ops, NULL);
188 if (!tb10x_gpio->domain) {
189 return -ENOMEM;
190 }
191
192 ret = irq_alloc_domain_generic_chips(tb10x_gpio->domain,
193 tb10x_gpio->chip.gc.ngpio, 1, tb10x_gpio->chip.gc.label,
194 handle_edge_irq, IRQ_NOREQUEST, IRQ_NOPROBE,
195 IRQ_GC_INIT_MASK_CACHE);
196 if (ret)
197 goto err_remove_domain;
198
199 gc = tb10x_gpio->domain->gc->gc[0];
200 gc->reg_base = tb10x_gpio->base;
201 gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH;
202 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
203 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
204 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
205 gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type;
206 gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE;
207 gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN;
208 }
209
210 return 0;
211
212err_remove_domain:
213 irq_domain_remove(tb10x_gpio->domain);
214 return ret;
215}
216
217static void tb10x_gpio_remove(struct platform_device *pdev)
218{
219 struct tb10x_gpio *tb10x_gpio = platform_get_drvdata(pdev);
220
221 if (tb10x_gpio->chip.gc.to_irq) {
222 irq_remove_generic_chip(tb10x_gpio->domain->gc->gc[0],
223 BIT(tb10x_gpio->chip.gc.ngpio) - 1, 0, 0);
224 kfree(tb10x_gpio->domain->gc);
225 irq_domain_remove(tb10x_gpio->domain);
226 }
227}
228
229static const struct of_device_id tb10x_gpio_dt_ids[] = {
230 { .compatible = "abilis,tb10x-gpio" },
231 { }
232};
233MODULE_DEVICE_TABLE(of, tb10x_gpio_dt_ids);
234
235static struct platform_driver tb10x_gpio_driver = {
236 .probe = tb10x_gpio_probe,
237 .remove = tb10x_gpio_remove,
238 .driver = {
239 .name = "tb10x-gpio",
240 .of_match_table = tb10x_gpio_dt_ids,
241 }
242};
243
244module_platform_driver(tb10x_gpio_driver);
245MODULE_LICENSE("GPL");
246MODULE_DESCRIPTION("tb10x gpio.");