tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Miscellaneous functions for IDT EB434 board
3 *
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
6 * Copyright 2007 Florian Fainelli <florian@openwrt.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/types.h>
32#include <linux/export.h>
33#include <linux/spinlock.h>
34#include <linux/platform_device.h>
35#include <linux/gpio/driver.h>
36
37#include <asm/mach-rc32434/rb.h>
38#include <asm/mach-rc32434/gpio.h>
39
40#define GPIOBASE 0x050000
41/* Offsets relative to GPIOBASE */
42#define GPIOFUNC 0x00
43#define GPIOCFG 0x04
44#define GPIOD 0x08
45#define GPIOILEVEL 0x0C
46#define GPIOISTAT 0x10
47#define GPIONMIEN 0x14
48#define IMASK6 0x38
49
50struct rb532_gpio_chip {
51 struct gpio_chip chip;
52 void __iomem *regbase;
53};
54
55static struct resource rb532_gpio_reg0_res[] = {
56 {
57 .name = "gpio_reg0",
58 .start = REGBASE + GPIOBASE,
59 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
60 .flags = IORESOURCE_MEM,
61 }
62};
63
64/* rb532_set_bit - sanely set a bit
65 *
66 * bitval: new value for the bit
67 * offset: bit index in the 4 byte address range
68 * ioaddr: 4 byte aligned address being altered
69 */
70static inline void rb532_set_bit(unsigned bitval,
71 unsigned offset, void __iomem *ioaddr)
72{
73 unsigned long flags;
74 u32 val;
75
76 local_irq_save(flags);
77
78 val = readl(ioaddr);
79 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */
80 val |= (!!bitval << offset); /* set bit if bitval == 1 */
81 writel(val, ioaddr);
82
83 local_irq_restore(flags);
84}
85
86/* rb532_get_bit - read a bit
87 *
88 * returns the boolean state of the bit, which may be > 1
89 */
90static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
91{
92 return readl(ioaddr) & (1 << offset);
93}
94
95/*
96 * Return GPIO level */
97static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
98{
99 struct rb532_gpio_chip *gpch;
100
101 gpch = gpiochip_get_data(chip);
102 return !!rb532_get_bit(offset, gpch->regbase + GPIOD);
103}
104
105/*
106 * Set output GPIO level
107 */
108static int rb532_gpio_set(struct gpio_chip *chip, unsigned int offset,
109 int value)
110{
111 struct rb532_gpio_chip *gpch;
112
113 gpch = gpiochip_get_data(chip);
114 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
115
116 return 0;
117}
118
119/*
120 * Set GPIO direction to input
121 */
122static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
123{
124 struct rb532_gpio_chip *gpch;
125
126 gpch = gpiochip_get_data(chip);
127
128 /* disable alternate function in case it's set */
129 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
130
131 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
132 return 0;
133}
134
135/*
136 * Set GPIO direction to output
137 */
138static int rb532_gpio_direction_output(struct gpio_chip *chip,
139 unsigned offset, int value)
140{
141 struct rb532_gpio_chip *gpch;
142
143 gpch = gpiochip_get_data(chip);
144
145 /* disable alternate function in case it's set */
146 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
147
148 /* set the initial output value */
149 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
150
151 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
152 return 0;
153}
154
155static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
156{
157 return 8 + 4 * 32 + gpio;
158}
159
160static struct rb532_gpio_chip rb532_gpio_chip[] = {
161 [0] = {
162 .chip = {
163 .label = "gpio0",
164 .direction_input = rb532_gpio_direction_input,
165 .direction_output = rb532_gpio_direction_output,
166 .get = rb532_gpio_get,
167 .set = rb532_gpio_set,
168 .to_irq = rb532_gpio_to_irq,
169 .base = 0,
170 .ngpio = 32,
171 },
172 },
173};
174
175/*
176 * Set GPIO interrupt level
177 */
178void rb532_gpio_set_ilevel(int bit, unsigned gpio)
179{
180 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
181}
182EXPORT_SYMBOL(rb532_gpio_set_ilevel);
183
184/*
185 * Set GPIO interrupt status
186 */
187void rb532_gpio_set_istat(int bit, unsigned gpio)
188{
189 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
190}
191EXPORT_SYMBOL(rb532_gpio_set_istat);
192
193/*
194 * Configure GPIO alternate function
195 */
196void rb532_gpio_set_func(unsigned gpio)
197{
198 rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
199}
200EXPORT_SYMBOL(rb532_gpio_set_func);
201
202static int __init rb532_gpio_init(void)
203{
204 struct resource *r;
205
206 r = rb532_gpio_reg0_res;
207 rb532_gpio_chip->regbase = ioremap(r->start, resource_size(r));
208
209 if (!rb532_gpio_chip->regbase) {
210 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
211 return -ENXIO;
212 }
213
214 /* Register our GPIO chip */
215 gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip);
216
217 return 0;
218}
219arch_initcall(rb532_gpio_init);