tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra Audio DMA (ADMA) controller
8
9description: |
10 The Tegra Audio DMA controller is used for transferring data
11 between system memory and the Audio Processing Engine (APE).
12
13maintainers:
14 - Jon Hunter <jonathanh@nvidia.com>
15
16properties:
17 compatible:
18 oneOf:
19 - enum:
20 - nvidia,tegra210-adma
21 - nvidia,tegra186-adma
22 - nvidia,tegra264-adma
23 - items:
24 - enum:
25 - nvidia,tegra234-adma
26 - nvidia,tegra194-adma
27 - const: nvidia,tegra186-adma
28
29 reg:
30 description:
31 The 'page' region describes the address space of the page
32 used for accessing the DMA channel registers. The 'global'
33 region describes the address space of the global DMA registers.
34 In the absence of the 'reg-names' property, there must be a
35 single entry that covers the address space of the global DMA
36 registers and the DMA channel registers.
37 minItems: 1
38 maxItems: 2
39
40 reg-names:
41 minItems: 1
42 maxItems: 2
43
44 interrupts:
45 description: |
46 Should contain all of the per-channel DMA interrupts in
47 ascending order with respect to the DMA channel index.
48 minItems: 1
49 maxItems: 32
50
51 clocks:
52 description: Must contain one entry for the ADMA module clock
53 maxItems: 1
54
55 clock-names:
56 const: d_audio
57
58 "#dma-cells":
59 description: |
60 The first cell denotes the receive/transmit request number and
61 should be between 1 and the maximum number of requests supported.
62 This value corresponds to the RX/TX_REQUEST_SELECT fields in the
63 ADMA_CHn_CTRL register.
64 const: 1
65
66 dma-channel-mask:
67 maxItems: 1
68
69required:
70 - compatible
71 - reg
72 - interrupts
73 - clocks
74 - clock-names
75
76allOf:
77 - $ref: dma-controller.yaml#
78 - if:
79 properties:
80 compatible:
81 contains:
82 enum:
83 - nvidia,tegra210-adma
84 then:
85 properties:
86 reg:
87 items:
88 - description: Full address space range of DMA registers.
89
90 - if:
91 properties:
92 compatible:
93 contains:
94 enum:
95 - nvidia,tegra186-adma
96 - nvidia,tegra264-adma
97 then:
98 anyOf:
99 - properties:
100 reg:
101 items:
102 - description: Full address space range of DMA registers.
103 - properties:
104 reg:
105 items:
106 - description: Channel Page address space range of DMA registers.
107 reg-names:
108 items:
109 - const: page
110 - properties:
111 reg:
112 items:
113 - description: Channel Page address space range of DMA registers.
114 - description: Global Page address space range of DMA registers.
115 reg-names:
116 items:
117 - const: page
118 - const: global
119
120additionalProperties: false
121
122examples:
123 - |
124 #include <dt-bindings/interrupt-controller/arm-gic.h>
125 #include<dt-bindings/clock/tegra210-car.h>
126
127 dma-controller@702e2000 {
128 compatible = "nvidia,tegra210-adma";
129 reg = <0x702e2000 0x2000>;
130 interrupt-parent = <&tegra_agic>;
131 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
132 <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
133 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
134 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
135 <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
136 <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
137 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
138 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
139 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
140 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
141 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
142 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
143 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
144 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
145 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
146 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
147 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
148 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
149 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
151 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
152 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
153 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
154 clock-names = "d_audio";
155 #dma-cells = <1>;
156 };
157
158...