tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6#include "iris_core.h"
7#include "iris_ctrls.h"
8#include "iris_platform_common.h"
9#include "iris_resources.h"
10#include "iris_hfi_gen1.h"
11#include "iris_hfi_gen1_defines.h"
12#include "iris_vpu_common.h"
13
14static struct platform_inst_fw_cap inst_fw_cap_sm8250[] = {
15 {
16 .cap_id = PIPE,
17 .min = PIPE_1,
18 .max = PIPE_4,
19 .step_or_mask = 1,
20 .value = PIPE_4,
21 .hfi_id = HFI_PROPERTY_PARAM_WORK_ROUTE,
22 .set = iris_set_pipe,
23 },
24 {
25 .cap_id = STAGE,
26 .min = STAGE_1,
27 .max = STAGE_2,
28 .step_or_mask = 1,
29 .value = STAGE_2,
30 .hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
31 .set = iris_set_stage,
32 },
33};
34
35static struct platform_inst_caps platform_inst_cap_sm8250 = {
36 .min_frame_width = 128,
37 .max_frame_width = 8192,
38 .min_frame_height = 128,
39 .max_frame_height = 8192,
40 .max_mbpf = 138240,
41 .mb_cycles_vsp = 25,
42 .mb_cycles_vpp = 200,
43};
44
45static void iris_set_sm8250_preset_registers(struct iris_core *core)
46{
47 writel(0x0, core->reg_base + 0xB0088);
48}
49
50static const struct icc_info sm8250_icc_table[] = {
51 { "cpu-cfg", 1000, 1000 },
52 { "video-mem", 1000, 15000000 },
53};
54
55static const char * const sm8250_clk_reset_table[] = { "bus", "core" };
56
57static const struct bw_info sm8250_bw_table_dec[] = {
58 { ((4096 * 2160) / 256) * 60, 2403000 },
59 { ((4096 * 2160) / 256) * 30, 1224000 },
60 { ((1920 * 1080) / 256) * 60, 812000 },
61 { ((1920 * 1080) / 256) * 30, 416000 },
62};
63
64static const char * const sm8250_pmdomain_table[] = { "venus", "vcodec0" };
65
66static const char * const sm8250_opp_pd_table[] = { "mx" };
67
68static const struct platform_clk_data sm8250_clk_table[] = {
69 {IRIS_AXI_CLK, "iface" },
70 {IRIS_CTRL_CLK, "core" },
71 {IRIS_HW_CLK, "vcodec0_core" },
72};
73
74static struct tz_cp_config tz_cp_config_sm8250 = {
75 .cp_start = 0,
76 .cp_size = 0x25800000,
77 .cp_nonpixel_start = 0x01000000,
78 .cp_nonpixel_size = 0x24800000,
79};
80
81static const u32 sm8250_vdec_input_config_param_default[] = {
82 HFI_PROPERTY_CONFIG_VIDEOCORES_USAGE,
83 HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT,
84 HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO,
85 HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL,
86 HFI_PROPERTY_PARAM_VDEC_MULTI_STREAM,
87 HFI_PROPERTY_PARAM_FRAME_SIZE,
88 HFI_PROPERTY_PARAM_BUFFER_SIZE_ACTUAL,
89 HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE,
90};
91
92static const u32 sm8250_dec_ip_int_buf_tbl[] = {
93 BUF_BIN,
94 BUF_SCRATCH_1,
95};
96
97static const u32 sm8250_dec_op_int_buf_tbl[] = {
98 BUF_DPB,
99};
100
101struct iris_platform_data sm8250_data = {
102 .get_instance = iris_hfi_gen1_get_instance,
103 .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init,
104 .init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
105 .vpu_ops = &iris_vpu2_ops,
106 .set_preset_registers = iris_set_sm8250_preset_registers,
107 .icc_tbl = sm8250_icc_table,
108 .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
109 .clk_rst_tbl = sm8250_clk_reset_table,
110 .clk_rst_tbl_size = ARRAY_SIZE(sm8250_clk_reset_table),
111 .bw_tbl_dec = sm8250_bw_table_dec,
112 .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec),
113 .pmdomain_tbl = sm8250_pmdomain_table,
114 .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table),
115 .opp_pd_tbl = sm8250_opp_pd_table,
116 .opp_pd_tbl_size = ARRAY_SIZE(sm8250_opp_pd_table),
117 .clk_tbl = sm8250_clk_table,
118 .clk_tbl_size = ARRAY_SIZE(sm8250_clk_table),
119 /* Upper bound of DMA address range */
120 .dma_mask = 0xe0000000 - 1,
121 .fwname = "qcom/vpu-1.0/venus.mbn",
122 .pas_id = IRIS_PAS_ID,
123 .inst_caps = &platform_inst_cap_sm8250,
124 .inst_fw_caps = inst_fw_cap_sm8250,
125 .inst_fw_caps_size = ARRAY_SIZE(inst_fw_cap_sm8250),
126 .tz_cp_config_data = &tz_cp_config_sm8250,
127 .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
128 .num_vpp_pipe = 4,
129 .max_session_count = 16,
130 .max_core_mbpf = NUM_MBS_8K,
131 .input_config_params_default =
132 sm8250_vdec_input_config_param_default,
133 .input_config_params_default_size =
134 ARRAY_SIZE(sm8250_vdec_input_config_param_default),
135
136 .dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl,
137 .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl),
138 .dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl,
139 .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl),
140};