tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,vf610-mscm-ir.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Vybrid Miscellaneous System Control - Interrupt Router
8
9description:
10 The MSCM IP contains multiple sub modules, this binding describes the second
11 block of registers which control the interrupt router. The interrupt router
12 allows to configure the recipient of each peripheral interrupt. Furthermore
13 it controls the directed processor interrupts. The module is available in all
14 Vybrid SoC's but is only really useful in dual core configurations (VF6xx
15 which comes with a Cortex-A5/Cortex-M4 combination).
16
17
18maintainers:
19 - Frank Li <Frank.Li@nxp.com>
20
21properties:
22 compatible:
23 const: fsl,vf610-mscm-ir
24
25 reg:
26 maxItems: 1
27
28 fsl,cpucfg:
29 $ref: /schemas/types.yaml#/definitions/phandle
30 description:
31 The handle to the MSCM CPU configuration node, required
32 to get the current CPU ID
33
34 interrupt-controller: true
35
36 '#interrupt-cells':
37 const: 2
38 description:
39 Two cells, interrupt number and cells.
40 The hardware interrupt number according to interrupt
41 assignment of the interrupt router is required.
42 Flags get passed only when using GIC as parent. Flags
43 encoding as documented by the GIC bindings.
44
45required:
46 - compatible
47 - reg
48 - fsl,cpucfg
49 - interrupt-controller
50 - '#interrupt-cells'
51
52additionalProperties: false
53
54examples:
55 - |
56 interrupt-controller@40001800 {
57 compatible = "fsl,vf610-mscm-ir";
58 reg = <0x40001800 0x400>;
59 fsl,cpucfg = <&mscm_cpucfg>;
60 interrupt-controller;
61 #interrupt-cells = <2>;
62 interrupt-parent = <&intc>;
63 };