tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8650 SoC LPASS LPI TLMM
8
9maintainers:
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
12
13description:
14 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8650 SoC.
16
17properties:
18 compatible:
19 oneOf:
20 - const: qcom,sm8650-lpass-lpi-pinctrl
21 - items:
22 - const: qcom,sm8750-lpass-lpi-pinctrl
23 - const: qcom,sm8650-lpass-lpi-pinctrl
24
25 reg:
26 items:
27 - description: LPASS LPI TLMM Control and Status registers
28
29 clocks:
30 items:
31 - description: LPASS Core voting clock
32 - description: LPASS Audio voting clock
33
34 clock-names:
35 items:
36 - const: core
37 - const: audio
38
39patternProperties:
40 "-state$":
41 oneOf:
42 - $ref: "#/$defs/qcom-sm8650-lpass-state"
43 - patternProperties:
44 "-pins$":
45 $ref: "#/$defs/qcom-sm8650-lpass-state"
46 additionalProperties: false
47
48$defs:
49 qcom-sm8650-lpass-state:
50 type: object
51 description:
52 Pinctrl node's client devices use subnodes for desired pin configuration.
53 Client device subnodes use below standard properties.
54 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
55 unevaluatedProperties: false
56
57 properties:
58 pins:
59 description:
60 List of gpio pins affected by the properties specified in this
61 subnode.
62 items:
63 pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
64
65 function:
66 enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
67 dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,
68 ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,
69 i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
70 i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, i2s4_clk,
71 i2s4_data, i2s4_ws, qca_swr_clk, qca_swr_data, slimbus_clk,
72 slimbus_data, swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data,
73 wsa_swr_clk, wsa_swr_data, wsa2_swr_clk, wsa2_swr_data ]
74 description:
75 Specify the alternative function to be configured for the specified
76 pins.
77
78allOf:
79 - $ref: qcom,lpass-lpi-common.yaml#
80
81required:
82 - compatible
83 - reg
84 - clocks
85 - clock-names
86
87unevaluatedProperties: false
88
89examples:
90 - |
91 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
92
93 lpass_tlmm: pinctrl@6e80000 {
94 compatible = "qcom,sm8650-lpass-lpi-pinctrl";
95 reg = <0x06e80000 0x20000>;
96
97 clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
98 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
99 clock-names = "core", "audio";
100
101 gpio-controller;
102 #gpio-cells = <2>;
103 gpio-ranges = <&lpass_tlmm 0 0 23>;
104
105 tx-swr-sleep-clk-state {
106 pins = "gpio0";
107 function = "swr_tx_clk";
108 drive-strength = <2>;
109 bias-pull-down;
110 };
111 };