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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Trace, Profiling and Diagnostics Monitor - TPDM
9
10description: |
11 The TPDM or Monitor serves as data collection component for various dataset
12 types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
14 Single Bit (DSB). It performs data collection in the data producing clock
15 domain and transfers it to the data collection time domain, generally ATB
16 clock domain.
17
18 The primary use case of the TPDM is to collect data from different data
19 sources and send it to a TPDA for packetization, timestamping, and funneling.
20
21maintainers:
22 - Mao Jinlong <quic_jinlmao@quicinc.com>
23 - Tao Zhang <quic_taozha@quicinc.com>
24
25# Need a custom select here or 'arm,primecell' will match on lots of nodes
26select:
27 properties:
28 compatible:
29 contains:
30 enum:
31 - qcom,coresight-tpdm
32 required:
33 - compatible
34
35properties:
36 $nodename:
37 pattern: "^tpdm(@[0-9a-f]+)$"
38 compatible:
39 items:
40 - const: qcom,coresight-tpdm
41 - const: arm,primecell
42
43 reg:
44 maxItems: 1
45
46 qcom,dsb-element-bits:
47 description:
48 Specifies the DSB(Discrete Single Bit) element size supported by
49 the monitor. The associated aggregator will read this size before it
50 is enabled. DSB element size currently only supports 32-bit and 64-bit.
51 enum: [32, 64]
52
53 qcom,cmb-element-bits:
54 description:
55 Specifies the CMB(Continuous Multi-Bit) element size supported by
56 the monitor. The associated aggregator will read this size before it
57 is enabled. CMB element size currently only supports 8-bit, 32-bit
58 and 64-bit.
59 enum: [8, 32, 64]
60
61 qcom,dsb-msrs-num:
62 description:
63 Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
64 registers supported by the monitor. If this property is not configured
65 or set to 0, it means this DSB TPDM doesn't support MSR.
66 $ref: /schemas/types.yaml#/definitions/uint32
67 minimum: 0
68 maximum: 32
69
70 qcom,cmb-msrs-num:
71 description:
72 Specifies the number of CMB MSR(mux select register) registers supported
73 by the monitor. If this property is not configured or set to 0, it means
74 this TPDM doesn't support CMB MSR.
75 $ref: /schemas/types.yaml#/definitions/uint32
76 minimum: 0
77 maximum: 32
78
79 clocks:
80 maxItems: 1
81
82 clock-names:
83 items:
84 - const: apb_pclk
85
86 out-ports:
87 description: |
88 Output connections from the TPDM to coresight funnel/TPDA.
89 $ref: /schemas/graph.yaml#/properties/ports
90
91 properties:
92 port:
93 description: Output connection from the TPDM to coresight
94 funnel/TPDA.
95 $ref: /schemas/graph.yaml#/properties/port
96
97required:
98 - compatible
99 - reg
100 - clocks
101 - clock-names
102
103additionalProperties: false
104
105examples:
106 # minimum TPDM definition. TPDM connect to coresight TPDA.
107 - |
108 tpdm@684c000 {
109 compatible = "qcom,coresight-tpdm", "arm,primecell";
110 reg = <0x0684c000 0x1000>;
111
112 qcom,dsb-element-bits = <32>;
113 qcom,dsb-msrs-num = <16>;
114
115 clocks = <&aoss_qmp>;
116 clock-names = "apb_pclk";
117
118 out-ports {
119 port {
120 tpdm_prng_out_tpda_qdss: endpoint {
121 remote-endpoint =
122 <&tpda_qdss_in_tpdm_prng>;
123 };
124 };
125 };
126 };
127
128 tpdm@6c29000 {
129 compatible = "qcom,coresight-tpdm", "arm,primecell";
130 reg = <0x06c29000 0x1000>;
131
132 qcom,cmb-element-bits = <64>;
133 qcom,cmb-msrs-num = <32>;
134
135 clocks = <&aoss_qmp>;
136 clock-names = "apb_pclk";
137
138 out-ports {
139 port {
140 tpdm_ipcc_out_funnel_center: endpoint {
141 remote-endpoint = <&funnel_center_in_tpdm_ipcc>;
142 };
143 };
144 };
145 };
146...