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1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright 2024 NXP 4 */ 5 6#ifndef _SCMI_IMX_H 7#define _SCMI_IMX_H 8 9#include <linux/bitfield.h> 10#include <linux/errno.h> 11#include <linux/scmi_imx_protocol.h> 12#include <linux/types.h> 13 14#define SCMI_IMX_CTRL_PDM_CLK_SEL 0 /* AON PDM clock sel */ 15#define SCMI_IMX_CTRL_MQS1_SETTINGS 1 /* AON MQS settings */ 16#define SCMI_IMX_CTRL_SAI1_MCLK 2 /* AON SAI1 MCLK */ 17#define SCMI_IMX_CTRL_SAI3_MCLK 3 /* WAKE SAI3 MCLK */ 18#define SCMI_IMX_CTRL_SAI4_MCLK 4 /* WAKE SAI4 MCLK */ 19#define SCMI_IMX_CTRL_SAI5_MCLK 5 /* WAKE SAI5 MCLK */ 20 21int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val); 22int scmi_imx_misc_ctrl_set(u32 id, u32 val); 23 24int scmi_imx_cpu_start(u32 cpuid, bool start); 25int scmi_imx_cpu_started(u32 cpuid, bool *started); 26int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot, 27 bool resume); 28 29enum scmi_imx_lmm_op { 30 SCMI_IMX_LMM_BOOT, 31 SCMI_IMX_LMM_POWER_ON, 32 SCMI_IMX_LMM_SHUTDOWN, 33}; 34 35/* For shutdown pperation */ 36#define SCMI_IMX_LMM_OP_FORCEFUL 0 37#define SCMI_IMX_LMM_OP_GRACEFUL BIT(0) 38 39int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags); 40int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info); 41int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector); 42#endif