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Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on SA8775P
8
9maintainers:
10 - Taniya Das <quic_tdas@quicinc.com>
11
12description: |
13 Qualcomm video clock control module provides the clocks, resets and power
14 domains on SA8775P.
15
16 See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h
17
18properties:
19 compatible:
20 enum:
21 - qcom,qcs8300-videocc
22 - qcom,sa8775p-videocc
23
24 clocks:
25 items:
26 - description: Video AHB clock from GCC
27 - description: Board XO source
28 - description: Board active XO source
29 - description: Sleep Clock source
30
31 power-domains:
32 maxItems: 1
33 description: MMCX power domain
34
35required:
36 - compatible
37 - clocks
38 - power-domains
39 - '#power-domain-cells'
40
41allOf:
42 - $ref: qcom,gcc.yaml#
43
44unevaluatedProperties: false
45
46examples:
47 - |
48 #include <dt-bindings/clock/qcom,rpmh.h>
49 #include <dt-bindings/power/qcom-rpmpd.h>
50 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
51 videocc: clock-controller@abf0000 {
52 compatible = "qcom,sa8775p-videocc";
53 reg = <0x0abf0000 0x10000>;
54 clocks = <&gcc GCC_VIDEO_AHB_CLK>,
55 <&rpmhcc RPMH_CXO_CLK>,
56 <&rpmhcc RPMH_CXO_CLK_A>,
57 <&sleep_clk>;
58 power-domains = <&rpmhpd SA8775P_MMCX>;
59 #clock-cells = <1>;
60 #reset-cells = <1>;
61 #power-domain-cells = <1>;
62 };
63...