tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10 - Rob Herring <robh@kernel.org>
11
12properties:
13 $nodename:
14 pattern: '^gpu@[a-f0-9]+$'
15
16 compatible:
17 oneOf:
18 - items:
19 - enum:
20 - allwinner,sun50i-h616-mali
21 - amlogic,meson-g12a-mali
22 - mediatek,mt8183-mali
23 - mediatek,mt8183b-mali
24 - mediatek,mt8186-mali
25 - realtek,rtd1619-mali
26 - renesas,r9a07g044-mali
27 - renesas,r9a07g054-mali
28 - renesas,r9a09g047-mali
29 - renesas,r9a09g056-mali
30 - renesas,r9a09g057-mali
31 - rockchip,px30-mali
32 - rockchip,rk3562-mali
33 - rockchip,rk3568-mali
34 - rockchip,rk3576-mali
35 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
36 - items:
37 - enum:
38 - mediatek,mt8195-mali
39 - const: mediatek,mt8192-mali
40 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
41 - items:
42 - enum:
43 - mediatek,mt8188-mali
44 - mediatek,mt8192-mali
45 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
46
47 reg:
48 maxItems: 1
49
50 interrupts:
51 minItems: 3
52 items:
53 - description: Job interrupt
54 - description: MMU interrupt
55 - description: GPU interrupt
56 - description: Event interrupt
57
58 interrupt-names:
59 minItems: 3
60 items:
61 - const: job
62 - const: mmu
63 - const: gpu
64 - const: event
65
66 clocks:
67 minItems: 1
68 maxItems: 3
69
70 clock-names: true
71
72 mali-supply: true
73
74 sram-supply: true
75
76 operating-points-v2: true
77
78 power-domains:
79 minItems: 1
80 maxItems: 5
81
82 power-domain-names:
83 minItems: 2
84 maxItems: 5
85
86 resets:
87 minItems: 1
88 maxItems: 3
89
90 reset-names: true
91
92 "#cooling-cells":
93 const: 2
94
95 dynamic-power-coefficient:
96 $ref: /schemas/types.yaml#/definitions/uint32
97 description:
98 A u32 value that represents the running time dynamic
99 power coefficient in units of uW/MHz/V^2. The
100 coefficient can either be calculated from power
101 measurements or derived by analysis.
102
103 The dynamic power consumption of the GPU is
104 proportional to the square of the Voltage (V) and
105 the clock frequency (f). The coefficient is used to
106 calculate the dynamic power as below -
107
108 Pdyn = dynamic-power-coefficient * V^2 * f
109
110 where voltage is in V, frequency is in MHz.
111
112 dma-coherent: true
113
114 nvmem-cell-names:
115 items:
116 - const: speed-bin
117
118 nvmem-cells:
119 maxItems: 1
120
121required:
122 - compatible
123 - reg
124 - interrupts
125 - interrupt-names
126 - clocks
127
128additionalProperties: false
129
130allOf:
131 - if:
132 properties:
133 compatible:
134 contains:
135 const: amlogic,meson-g12a-mali
136 then:
137 properties:
138 power-domains:
139 maxItems: 1
140 power-domain-names: false
141 required:
142 - resets
143 - if:
144 properties:
145 compatible:
146 contains:
147 enum:
148 - renesas,r9a07g044-mali
149 - renesas,r9a07g054-mali
150 - renesas,r9a09g047-mali
151 - renesas,r9a09g056-mali
152 - renesas,r9a09g057-mali
153 then:
154 properties:
155 interrupts:
156 minItems: 4
157 interrupt-names:
158 minItems: 4
159 clocks:
160 minItems: 3
161 clock-names:
162 items:
163 - const: gpu
164 - const: bus
165 - const: bus_ace
166 power-domains:
167 maxItems: 1
168 power-domain-names: false
169 resets:
170 minItems: 3
171 reset-names:
172 items:
173 - const: rst
174 - const: axi_rst
175 - const: ace_rst
176 required:
177 - clock-names
178 - power-domains
179 - resets
180 - reset-names
181 - if:
182 properties:
183 compatible:
184 contains:
185 const: mediatek,mt8183-mali
186 then:
187 properties:
188 power-domains:
189 minItems: 3
190 maxItems: 3
191 power-domain-names:
192 items:
193 - const: core0
194 - const: core1
195 - const: core2
196
197 required:
198 - sram-supply
199 - power-domains
200 - power-domain-names
201 else:
202 properties:
203 sram-supply: false
204 - if:
205 properties:
206 compatible:
207 contains:
208 enum:
209 - mediatek,mt8183b-mali
210 - mediatek,mt8188-mali
211 then:
212 properties:
213 power-domains:
214 minItems: 3
215 maxItems: 3
216 power-domain-names:
217 items:
218 - const: core0
219 - const: core1
220 - const: core2
221 required:
222 - power-domains
223 - power-domain-names
224 - if:
225 properties:
226 compatible:
227 contains:
228 const: mediatek,mt8186-mali
229 then:
230 properties:
231 power-domains:
232 minItems: 2
233 maxItems: 2
234 power-domain-names:
235 items:
236 - const: core0
237 - const: core1
238 required:
239 - power-domains
240 - power-domain-names
241 - if:
242 properties:
243 compatible:
244 contains:
245 const: mediatek,mt8192-mali
246 then:
247 properties:
248 power-domains:
249 minItems: 5
250 power-domain-names:
251 items:
252 - const: core0
253 - const: core1
254 - const: core2
255 - const: core3
256 - const: core4
257 required:
258 - power-domains
259 - power-domain-names
260 - if:
261 properties:
262 compatible:
263 contains:
264 const: rockchip,rk3568-mali
265 then:
266 properties:
267 clocks:
268 minItems: 2
269 clock-names:
270 items:
271 - const: gpu
272 - const: bus
273 power-domains:
274 maxItems: 1
275 power-domain-names: false
276 required:
277 - clock-names
278
279examples:
280 - |
281 #include <dt-bindings/interrupt-controller/irq.h>
282 #include <dt-bindings/interrupt-controller/arm-gic.h>
283
284 gpu@ffe40000 {
285 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
286 reg = <0xffe40000 0x10000>;
287 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
290 interrupt-names = "job", "mmu", "gpu";
291 clocks = <&clk 1>;
292 mali-supply = <&vdd_gpu>;
293 operating-points-v2 = <&gpu_opp_table>;
294 resets = <&reset 0>, <&reset 1>;
295 };
296
297 gpu_opp_table: opp-table {
298 compatible = "operating-points-v2";
299
300 opp-533000000 {
301 opp-hz = /bits/ 64 <533000000>;
302 opp-microvolt = <1250000>;
303 };
304 opp-450000000 {
305 opp-hz = /bits/ 64 <450000000>;
306 opp-microvolt = <1150000>;
307 };
308 opp-400000000 {
309 opp-hz = /bits/ 64 <400000000>;
310 opp-microvolt = <1125000>;
311 };
312 opp-350000000 {
313 opp-hz = /bits/ 64 <350000000>;
314 opp-microvolt = <1075000>;
315 };
316 opp-266000000 {
317 opp-hz = /bits/ 64 <266000000>;
318 opp-microvolt = <1025000>;
319 };
320 opp-160000000 {
321 opp-hz = /bits/ 64 <160000000>;
322 opp-microvolt = <925000>;
323 };
324 opp-100000000 {
325 opp-hz = /bits/ 64 <100000000>;
326 opp-microvolt = <912500>;
327 };
328 };
329
330...