tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2#ifndef __SELFTESTS_X86_XSTATE_H
3#define __SELFTESTS_X86_XSTATE_H
4
5#include <stdint.h>
6
7#include "../kselftest.h"
8
9#define XSAVE_HDR_OFFSET 512
10#define XSAVE_HDR_SIZE 64
11
12/*
13 * List of XSAVE features Linux knows about. Copied from
14 * arch/x86/include/asm/fpu/types.h
15 */
16enum xfeature {
17 XFEATURE_FP,
18 XFEATURE_SSE,
19 XFEATURE_YMM,
20 XFEATURE_BNDREGS,
21 XFEATURE_BNDCSR,
22 XFEATURE_OPMASK,
23 XFEATURE_ZMM_Hi256,
24 XFEATURE_Hi16_ZMM,
25 XFEATURE_PT_UNIMPLEMENTED_SO_FAR,
26 XFEATURE_PKRU,
27 XFEATURE_PASID,
28 XFEATURE_CET_USER,
29 XFEATURE_CET_KERNEL_UNUSED,
30 XFEATURE_RSRVD_COMP_13,
31 XFEATURE_RSRVD_COMP_14,
32 XFEATURE_LBR,
33 XFEATURE_RSRVD_COMP_16,
34 XFEATURE_XTILECFG,
35 XFEATURE_XTILEDATA,
36 XFEATURE_APX,
37
38 XFEATURE_MAX,
39};
40
41/* Copied from arch/x86/kernel/fpu/xstate.c */
42static const char *xfeature_names[] =
43{
44 "x87 floating point registers",
45 "SSE registers",
46 "AVX registers",
47 "MPX bounds registers",
48 "MPX CSR",
49 "AVX-512 opmask",
50 "AVX-512 Hi256",
51 "AVX-512 ZMM_Hi256",
52 "Processor Trace (unused)",
53 "Protection Keys User registers",
54 "PASID state",
55 "Control-flow User registers",
56 "Control-flow Kernel registers (unused)",
57 "unknown xstate feature",
58 "unknown xstate feature",
59 "unknown xstate feature",
60 "unknown xstate feature",
61 "AMX Tile config",
62 "AMX Tile data",
63 "APX registers",
64 "unknown xstate feature",
65};
66
67struct xsave_buffer {
68 union {
69 struct {
70 char legacy[XSAVE_HDR_OFFSET];
71 char header[XSAVE_HDR_SIZE];
72 char extended[0];
73 };
74 char bytes[0];
75 };
76};
77
78static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm)
79{
80 uint32_t rfbm_hi = rfbm >> 32;
81 uint32_t rfbm_lo = rfbm;
82
83 asm volatile("xsave (%%rdi)"
84 : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)
85 : "memory");
86}
87
88static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
89{
90 uint32_t rfbm_hi = rfbm >> 32;
91 uint32_t rfbm_lo = rfbm;
92
93 asm volatile("xrstor (%%rdi)"
94 : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi));
95}
96
97#define CPUID_LEAF_XSTATE 0xd
98#define CPUID_SUBLEAF_XSTATE_USER 0x0
99
100static inline uint32_t get_xbuf_size(void)
101{
102 uint32_t eax, ebx, ecx, edx;
103
104 __cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER,
105 eax, ebx, ecx, edx);
106
107 /*
108 * EBX enumerates the size (in bytes) required by the XSAVE
109 * instruction for an XSAVE area containing all the user state
110 * components corresponding to bits currently set in XCR0.
111 */
112 return ebx;
113}
114
115struct xstate_info {
116 const char *name;
117 uint32_t num;
118 uint32_t mask;
119 uint32_t xbuf_offset;
120 uint32_t size;
121};
122
123static inline struct xstate_info get_xstate_info(uint32_t xfeature_num)
124{
125 struct xstate_info xstate = { };
126 uint32_t eax, ebx, ecx, edx;
127
128 if (xfeature_num >= XFEATURE_MAX) {
129 ksft_print_msg("unknown state\n");
130 return xstate;
131 }
132
133 xstate.name = xfeature_names[xfeature_num];
134 xstate.num = xfeature_num;
135 xstate.mask = 1 << xfeature_num;
136
137 __cpuid_count(CPUID_LEAF_XSTATE, xfeature_num,
138 eax, ebx, ecx, edx);
139 xstate.size = eax;
140 xstate.xbuf_offset = ebx;
141 return xstate;
142}
143
144static inline struct xsave_buffer *alloc_xbuf(void)
145{
146 uint32_t xbuf_size = get_xbuf_size();
147
148 /* XSAVE buffer should be 64B-aligned. */
149 return aligned_alloc(64, xbuf_size);
150}
151
152static inline void clear_xstate_header(struct xsave_buffer *xbuf)
153{
154 memset(&xbuf->header, 0, sizeof(xbuf->header));
155}
156
157static inline void set_xstatebv(struct xsave_buffer *xbuf, uint64_t bv)
158{
159 /* XSTATE_BV is at the beginning of the header: */
160 *(uint64_t *)(&xbuf->header) = bv;
161}
162
163/* See 'struct _fpx_sw_bytes' at sigcontext.h */
164#define SW_BYTES_OFFSET 464
165/* N.B. The struct's field name varies so read from the offset. */
166#define SW_BYTES_BV_OFFSET (SW_BYTES_OFFSET + 8)
167
168static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *xbuf)
169{
170 return xbuf + SW_BYTES_OFFSET;
171}
172
173static inline uint64_t get_fpx_sw_bytes_features(void *buffer)
174{
175 return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET);
176}
177
178static inline void set_rand_data(struct xstate_info *xstate, struct xsave_buffer *xbuf)
179{
180 int *ptr = (int *)&xbuf->bytes[xstate->xbuf_offset];
181 int data, i;
182
183 /*
184 * Ensure that 'data' is never 0. This ensures that
185 * the registers are never in their initial configuration
186 * and thus never tracked as being in the init state.
187 */
188 data = rand() | 1;
189
190 for (i = 0; i < xstate->size / sizeof(int); i++, ptr++)
191 *ptr = data;
192}
193
194/* Testing kernel's context switching and ABI support for the xstate. */
195void test_xstate(uint32_t feature_num);
196
197#endif /* __SELFTESTS_X86_XSTATE_H */