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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * arm_spe_decoder.h: Arm Statistical Profiling Extensions support
4 * Copyright (c) 2019-2020, Arm Ltd.
5 */
6
7#ifndef INCLUDE__ARM_SPE_DECODER_H__
8#define INCLUDE__ARM_SPE_DECODER_H__
9
10#include <stdbool.h>
11#include <stddef.h>
12#include <stdint.h>
13
14#include "arm-spe-pkt-decoder.h"
15
16enum arm_spe_sample_type {
17 ARM_SPE_L1D_ACCESS = 1 << 0,
18 ARM_SPE_L1D_MISS = 1 << 1,
19 ARM_SPE_LLC_ACCESS = 1 << 2,
20 ARM_SPE_LLC_MISS = 1 << 3,
21 ARM_SPE_TLB_ACCESS = 1 << 4,
22 ARM_SPE_TLB_MISS = 1 << 5,
23 ARM_SPE_BRANCH_MISS = 1 << 6,
24 ARM_SPE_REMOTE_ACCESS = 1 << 7,
25 ARM_SPE_SVE_PARTIAL_PRED = 1 << 8,
26 ARM_SPE_SVE_EMPTY_PRED = 1 << 9,
27 ARM_SPE_BRANCH_NOT_TAKEN = 1 << 10,
28 ARM_SPE_IN_TXN = 1 << 11,
29};
30
31enum arm_spe_op_type {
32 /* First level operation type */
33 ARM_SPE_OP_OTHER = 1 << 0,
34 ARM_SPE_OP_LDST = 1 << 1,
35 ARM_SPE_OP_BRANCH_ERET = 1 << 2,
36
37 /* Second level operation type for OTHER */
38 ARM_SPE_OP_SVE_OTHER = 1 << 16,
39 ARM_SPE_OP_SVE_FP = 1 << 17,
40 ARM_SPE_OP_SVE_PRED_OTHER = 1 << 18,
41
42 /* Second level operation type for LDST */
43 ARM_SPE_OP_LD = 1 << 16,
44 ARM_SPE_OP_ST = 1 << 17,
45 ARM_SPE_OP_ATOMIC = 1 << 18,
46 ARM_SPE_OP_EXCL = 1 << 19,
47 ARM_SPE_OP_AR = 1 << 20,
48 ARM_SPE_OP_SIMD_FP = 1 << 21,
49 ARM_SPE_OP_GP_REG = 1 << 22,
50 ARM_SPE_OP_UNSPEC_REG = 1 << 23,
51 ARM_SPE_OP_NV_SYSREG = 1 << 24,
52 ARM_SPE_OP_SVE_LDST = 1 << 25,
53 ARM_SPE_OP_SVE_PRED_LDST = 1 << 26,
54 ARM_SPE_OP_SVE_SG = 1 << 27,
55
56 /* Second level operation type for BRANCH_ERET */
57 ARM_SPE_OP_BR_COND = 1 << 16,
58 ARM_SPE_OP_BR_INDIRECT = 1 << 17,
59 ARM_SPE_OP_BR_GCS = 1 << 18,
60 ARM_SPE_OP_BR_CR_BL = 1 << 19,
61 ARM_SPE_OP_BR_CR_RET = 1 << 20,
62 ARM_SPE_OP_BR_CR_NON_BL_RET = 1 << 21,
63};
64
65enum arm_spe_common_data_source {
66 ARM_SPE_COMMON_DS_L1D = 0x0,
67 ARM_SPE_COMMON_DS_L2 = 0x8,
68 ARM_SPE_COMMON_DS_PEER_CORE = 0x9,
69 ARM_SPE_COMMON_DS_LOCAL_CLUSTER = 0xa,
70 ARM_SPE_COMMON_DS_SYS_CACHE = 0xb,
71 ARM_SPE_COMMON_DS_PEER_CLUSTER = 0xc,
72 ARM_SPE_COMMON_DS_REMOTE = 0xd,
73 ARM_SPE_COMMON_DS_DRAM = 0xe,
74};
75
76enum arm_spe_ampereone_data_source {
77 ARM_SPE_AMPEREONE_LOCAL_CHIP_CACHE_OR_DEVICE = 0x0,
78 ARM_SPE_AMPEREONE_SLC = 0x3,
79 ARM_SPE_AMPEREONE_REMOTE_CHIP_CACHE = 0x5,
80 ARM_SPE_AMPEREONE_DDR = 0x7,
81 ARM_SPE_AMPEREONE_L1D = 0x8,
82 ARM_SPE_AMPEREONE_L2D = 0x9,
83};
84
85enum arm_spe_hisi_hip_data_source {
86 ARM_SPE_HISI_HIP_PEER_CPU = 0,
87 ARM_SPE_HISI_HIP_PEER_CPU_HITM = 1,
88 ARM_SPE_HISI_HIP_L3 = 2,
89 ARM_SPE_HISI_HIP_L3_HITM = 3,
90 ARM_SPE_HISI_HIP_PEER_CLUSTER = 4,
91 ARM_SPE_HISI_HIP_PEER_CLUSTER_HITM = 5,
92 ARM_SPE_HISI_HIP_REMOTE_SOCKET = 6,
93 ARM_SPE_HISI_HIP_REMOTE_SOCKET_HITM = 7,
94 ARM_SPE_HISI_HIP_LOCAL_MEM = 8,
95 ARM_SPE_HISI_HIP_REMOTE_MEM = 9,
96 ARM_SPE_HISI_HIP_NC_DEV = 13,
97 ARM_SPE_HISI_HIP_L2 = 16,
98 ARM_SPE_HISI_HIP_L2_HITM = 17,
99 ARM_SPE_HISI_HIP_L1 = 18,
100};
101
102struct arm_spe_record {
103 enum arm_spe_sample_type type;
104 int err;
105 u32 op;
106 u32 latency;
107 u64 from_ip;
108 u64 to_ip;
109 u64 prev_br_tgt;
110 u64 timestamp;
111 u64 virt_addr;
112 u64 phys_addr;
113 u64 context_id;
114 u16 source;
115};
116
117struct arm_spe_insn;
118
119struct arm_spe_buffer {
120 const unsigned char *buf;
121 size_t len;
122 u64 offset;
123 u64 trace_nr;
124};
125
126struct arm_spe_params {
127 int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
128 void *data;
129};
130
131struct arm_spe_decoder {
132 int (*get_trace)(struct arm_spe_buffer *buffer, void *data);
133 void *data;
134 struct arm_spe_record record;
135
136 const unsigned char *buf;
137 size_t len;
138
139 struct arm_spe_pkt packet;
140};
141
142struct arm_spe_decoder *arm_spe_decoder_new(struct arm_spe_params *params);
143void arm_spe_decoder_free(struct arm_spe_decoder *decoder);
144
145int arm_spe_decode(struct arm_spe_decoder *decoder);
146
147#endif