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Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos8895-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos8895 SoC clock controller
8
9maintainers:
10 - Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13
14description: |
15 Exynos8895 clock controller is comprised of several CMU units, generating
16 clocks for different domains. Those CMU units are modeled as separate device
17 tree nodes, and might depend on each other. The root clock in that root tree
18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
19 as a fixed-rate clock in dts.
20
21 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
22 dividers; all other clocks of function blocks (other CMUs) are usually
23 derived from CMU_TOP.
24
25 Each clock is assigned an identifier and client nodes can use this identifier
26 to specify the clock which they consume. All clocks available for usage
27 in clock consumer nodes are defined as preprocessor macros in
28 'include/dt-bindings/clock/samsung,exynos8895.h' header.
29
30properties:
31 compatible:
32 enum:
33 - samsung,exynos8895-cmu-fsys0
34 - samsung,exynos8895-cmu-fsys1
35 - samsung,exynos8895-cmu-peric0
36 - samsung,exynos8895-cmu-peric1
37 - samsung,exynos8895-cmu-peris
38 - samsung,exynos8895-cmu-top
39
40 clocks:
41 minItems: 1
42 maxItems: 16
43
44 clock-names:
45 minItems: 1
46 maxItems: 16
47
48 "#clock-cells":
49 const: 1
50
51 reg:
52 maxItems: 1
53
54required:
55 - compatible
56 - clocks
57 - clock-names
58 - reg
59 - "#clock-cells"
60
61allOf:
62 - if:
63 properties:
64 compatible:
65 contains:
66 const: samsung,exynos8895-cmu-fsys0
67
68 then:
69 properties:
70 clocks:
71 items:
72 - description: External reference clock (26 MHz)
73 - description: CMU_FSYS0 BUS clock (from CMU_TOP)
74 - description: CMU_FSYS0 DPGTC clock (from CMU_TOP)
75 - description: CMU_FSYS0 MMC_EMBD clock (from CMU_TOP)
76 - description: CMU_FSYS0 UFS_EMBD clock (from CMU_TOP)
77 - description: CMU_FSYS0 USBDRD30 clock (from CMU_TOP)
78
79 clock-names:
80 items:
81 - const: oscclk
82 - const: bus
83 - const: dpgtc
84 - const: mmc
85 - const: ufs
86 - const: usbdrd30
87
88 - if:
89 properties:
90 compatible:
91 contains:
92 const: samsung,exynos8895-cmu-fsys1
93
94 then:
95 properties:
96 clocks:
97 items:
98 - description: External reference clock (26 MHz)
99 - description: CMU_FSYS1 BUS clock (from CMU_TOP)
100 - description: CMU_FSYS1 PCIE clock (from CMU_TOP)
101 - description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP)
102 - description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP)
103
104 clock-names:
105 items:
106 - const: oscclk
107 - const: bus
108 - const: pcie
109 - const: ufs
110 - const: mmc
111
112 - if:
113 properties:
114 compatible:
115 contains:
116 const: samsung,exynos8895-cmu-peric0
117
118 then:
119 properties:
120 clocks:
121 items:
122 - description: External reference clock (26 MHz)
123 - description: CMU_PERIC0 BUS clock (from CMU_TOP)
124 - description: CMU_PERIC0 UART_DBG clock (from CMU_TOP)
125 - description: CMU_PERIC0 USI00 clock (from CMU_TOP)
126 - description: CMU_PERIC0 USI01 clock (from CMU_TOP)
127 - description: CMU_PERIC0 USI02 clock (from CMU_TOP)
128 - description: CMU_PERIC0 USI03 clock (from CMU_TOP)
129
130 clock-names:
131 items:
132 - const: oscclk
133 - const: bus
134 - const: uart
135 - const: usi0
136 - const: usi1
137 - const: usi2
138 - const: usi3
139
140 - if:
141 properties:
142 compatible:
143 contains:
144 const: samsung,exynos8895-cmu-peric1
145
146 then:
147 properties:
148 clocks:
149 items:
150 - description: External reference clock (26 MHz)
151 - description: CMU_PERIC1 BUS clock (from CMU_TOP)
152 - description: CMU_PERIC1 SPEEDY2 clock (from CMU_TOP)
153 - description: CMU_PERIC1 SPI_CAM0 clock (from CMU_TOP)
154 - description: CMU_PERIC1 SPI_CAM1 clock (from CMU_TOP)
155 - description: CMU_PERIC1 UART_BT clock (from CMU_TOP)
156 - description: CMU_PERIC1 USI04 clock (from CMU_TOP)
157 - description: CMU_PERIC1 USI05 clock (from CMU_TOP)
158 - description: CMU_PERIC1 USI06 clock (from CMU_TOP)
159 - description: CMU_PERIC1 USI07 clock (from CMU_TOP)
160 - description: CMU_PERIC1 USI08 clock (from CMU_TOP)
161 - description: CMU_PERIC1 USI09 clock (from CMU_TOP)
162 - description: CMU_PERIC1 USI10 clock (from CMU_TOP)
163 - description: CMU_PERIC1 USI11 clock (from CMU_TOP)
164 - description: CMU_PERIC1 USI12 clock (from CMU_TOP)
165 - description: CMU_PERIC1 USI13 clock (from CMU_TOP)
166
167 clock-names:
168 items:
169 - const: oscclk
170 - const: bus
171 - const: speedy
172 - const: cam0
173 - const: cam1
174 - const: uart
175 - const: usi4
176 - const: usi5
177 - const: usi6
178 - const: usi7
179 - const: usi8
180 - const: usi9
181 - const: usi10
182 - const: usi11
183 - const: usi12
184 - const: usi13
185
186 - if:
187 properties:
188 compatible:
189 contains:
190 const: samsung,exynos8895-cmu-peris
191
192 then:
193 properties:
194 clocks:
195 items:
196 - description: External reference clock (26 MHz)
197 - description: CMU_PERIS BUS clock (from CMU_TOP)
198
199 clock-names:
200 items:
201 - const: oscclk
202 - const: bus
203
204 - if:
205 properties:
206 compatible:
207 contains:
208 const: samsung,exynos8895-cmu-top
209
210 then:
211 properties:
212 clocks:
213 items:
214 - description: External reference clock (26 MHz)
215
216 clock-names:
217 items:
218 - const: oscclk
219
220additionalProperties: false
221
222examples:
223 - |
224 #include <dt-bindings/clock/samsung,exynos8895.h>
225
226 cmu_fsys1: clock-controller@11400000 {
227 compatible = "samsung,exynos8895-cmu-fsys1";
228 reg = <0x11400000 0x8000>;
229 #clock-cells = <1>;
230
231 clocks = <&oscclk>,
232 <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>,
233 <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>,
234 <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>,
235 <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>;
236 clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
237 };
238
239...